Preliminary Data Sheet No. PD60166-G IR2136/IR21362/IR21363 (J&S) 3-PHASE BRIDGE DRIVER Features * Floating channel designed for bootstrap operation * * * * * * * * * * Fully operational to +600V Tolerant to negative transient voltage dV/dt immune Gate drive supply range from 10 to 20V (IR2136/ IR21363) or 12 to 20V (IR21362) Undervoltage lockout for all channels Over-current shutdown turns off all six drivers Independent 3 half-bridge drivers Matched propagation delay for all channels Lowside outputs out of phase with inputs. High side outputs out of phase (IR2136/IR21363) or in phase (IR21362) with inputs. Cross-conduction prevention logic 3.3V logic compatible Lower di/dt gate driver for better noise immunity Externally programmable delay for automatic fault clear Product Summary VOFFSET 600V max. IO+/120 mA / 250 mA 10 - 20V or 12V - 20V VOUT Deadtime (typ.) 200 nsec ton/off (typ.) 400 nsec Packages Description 28-Lead SOIC The IR2136/IR21362/IR21363(J&S) are high votage, high speed power MOSFET and IGBT drivers with three independent high and low side referenced output channels for 3-phase applications. Proprietary HVIC technology enables ruggedized monolithic construction. Logic inputs are compatible with CMOS or LSTTL outputs, down to 3.3V logic. A current trip function which terminates all six outputs can be derived from an external current sense resistor. An enable function is available to terminate all six outputs simultaneously. An open-drain FAULT signal is provided to indicate that an overcurrent or undervoltage shutdown has occurred. Overcurrent fault conditions are cleared 28-Lead PDIP 44-Lead PLCC w/o 12 leads automatically after a delay programmed externally via an RC network connected to the RCIN input. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. Propagation delays are matched to simplify use in high frequency applications. The floating channel can be used to drive N-channel power MOSFETs or IGBTs in the high side configuration which operates up to 600 volts. Typical Connection VCC HIN1,2,3 / HIN1,2,3 LIN1,2,3 up to 600V VCC HIN1,2,3 / HIN1,2,3 VB1,2,3 LIN1,2,3 HO1,2,3 FAULT EN FAULT EN VS1,2,3 TO LOAD RCIN (Refer to Lead Assignments for correct pin configuration). This/ These diagram(s) show electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout. www.irf.com ITRIP VSS LO1,2,3 COM IR2136(2)(3) GND 1 IR2136/IR21362/IR21363(J&S) Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Symbol Definition Min. Max. Units VS High side offset voltage -0.3 600 VBS High side floating supply voltage -0.3 25 VHO High side floating output voltage VS1,2,3 - 0.3 VB1,2,3 + 0.3 VCC Low side and logic fixed supply voltage VSS Logic ground VLO1,2,3 VIN -0.3 25 VCC - 25 VCC + 0.3 -0.3 VCC + 0.3 EN, RCIN VSS - 0.3 VSS + 15 VSS - 0.3 VCC + 0.3 -- -- -- -- -- -- -- 50 1.5 1.6 2.0 83 78 63 Low side output voltage V Input voltage LIN ,HIN(IR2136/IR21363),HIN (IR21362) ITRIP, VFLT FAULT output voltage dV/dt PD Allowable offset voltage slew rate Package power dissipation @ TA +25C RthJA Thermal resistance, junction to ambient (28 lead PDIP) (28 lead SOIC) (44 lead PLCC) (28 lead PDIP) (28 lead SOIC) (44 lead PLCC) TJ Junction temperature -- 125 TS Storage temperature -55 150 TL Lead temperature (soldering, 10 seconds) -- 300 V/ns W C/W C Recommended Operating Conditions The Input/Output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended conditions. All voltage parameters are absolute referenced to COM. The VS offset rating is tested with all supplies biased at 15V differential. Symbol Definition Min. Max. VS1,2,3 + 10 VS1,2,3 + 20 VB1,2,3 High side floating supply voltage VS1,2,3 High side floating supply offset voltage Note 1 600 VHO1,2,3 High side output voltage VS1,2,3 VB1,2,3 VLO1,2,3 Low side output voltage 0 VCC VCC Low side and logic fixed supply voltage 10 20 VSS Logic ground -5 5 VFLT VCC FAULT output voltage VSS VRCIN RCIN input voltage VSS VCC VITRIP ITRIP input voltage VSS VSS +5 VIN Logic input voltage LIN , HIN (IR2136), HIN(IR21362), EN VSS VSS +5 TA Ambient temperature -40 125 Units V C Note 1: Logic operational for VS of COM -5 to COM +600V. Logic state held for VS of COM -5V to -COM -VBS. (Please refer to the Design Tip DT97-3 for more details). Note 2: All input pins and the ITRIP pin are internally clamped with a 5.2V zener diode. 2 www.irf.com IR2136/IR21362/IR21363(J&S) Static Electrical Characteristics VBIAS (VCC , VBS 1,2,3) = 15V unless otherwise specified. The VIN, VTH and IIN parameters are referenced to VSS and are applicable to all six channels (HS1,2,3 and LS1,2,3). The VO and IO parameters are referenced to COM and VS1,2,3 and are applicable to the respective output leads: HO1,2,3 and LO1,2,3. Symbol VIH Definition Min. Typ. Max. Units Test Conditions Logic "0" input voltage LIN1,2,3, HIN1,2,3 3 -- -- -- -- 0.8 Logic "1" input voltage HIN1,2,3 VIL Logic "1" input voltage LIN1,2,3, HIN1,2,3 V Logic "0" input voltage HIN1,2,3 VEN,TH+ EN positive going threshold -- -- 3 VEN,TH- EN negative going threshold 0.8 -- -- VIT,TH+ ITRIP positive going threshold 370 460 550 VIT,HYS ITRIPinput hysteresis -- 70 -- VRCIN,TH+ RCIN positive going threshold -- 8 -- VRCIN,HYS RCIN input hysteresis -- 3 -- VOH High level output voltage, VBIAS - VO -- 0.8 1.4 IO = 20 mA VOL Low level output voltage, VO -- 0.3 0.6 IO = 20 mA VCCUV+ VCC and VBS supply undervoltage VBSUV+ positive going threshold VCCUV- VCC and VBS supply undervoltage VBSUV- negative going threshold VCCUVH VCC and VBS supply undervoltage VBSUVH lockout hysteresis ILK IR2136 8.0 8.9 9.8 IR21362 IR21363 9.6 10.7 10.4 11.2 11.2 11.7 IR2136 7.4 8.2 9.0 IR21362 IR21363 8.6 10.5 9.4 11.0 10.2 11.5 IR2136 0.3 0.7 -- IR21362 0.5 1.0 -- IR21363 -- 0.2 -- -- -- 50 Offset supply leakage current mV V VB1,2,3=VS1,2,3 A = 600V IQBS Quiescent VBS supply current 20 60 150 IQCC Quiescent VCC supply current -- 1 2 mA Input clamp voltage (HIN, LIN, ITRIP and EN) 4.9 5.2 5.5 V ILIN+ Input bias current (LOUT = HI) -- 150 400 ILIN- Input bias current (LOUT = LO) -- 100 250 VLIN = 5V IHIN+ Input bias current (HOUT = HI) IR2136(3) -- 150 300 VHIN = 0V -- 100 Input bias current (HOUT = LO) IR21362 IR2136(3) -- IHIN- -- 100 250 VHIN = 5V VHIN = 5V IR21362 -- 0 1 VHIN = 0V VIN, CLAMP VIN = 0V or 5V IIN =100A VLIN = 0V A IITRIP+ "high" ITRIP input bias current -- -- 100 VITRIP = 5V IITRIP- "low" ITRIP input bias current -- 0 1 VITRIP = 0V www.irf.com 3 IR2136/IR21362/IR21363(J&S) Static Electrical Characteristics cont. VBIAS (VCC , VBS 1,2,3) = 15V unless otherwise specified. The VIN, VTH and IIN parameters are referenced to VSS and are applicable to all six channels (HS1,2,3 and L S1,2,3). The VO and IO parameters are referenced to COM and VS1,2,3 and are applicable to the respective output leads: HO1,2,3 and LO1,2,3. Symbol Definition Min. Typ. Max. Units Test Conditions IEN+ "high" ENABLE input bias current -- -- 100 IEN- "low" ENABLE input bias current -- 0 1 IRCIN RCIN input bias current VENABLE= 5V A VENABLE = 0V -- 0 1 VRCIN = 0V or 15V IO+ Output high short circuit pulsed current 120 200 -- VO=0V, PW 10 s IO- Output low short circuit pulsed current 250 350 -- RON,RCIN RCIN low on resistance -- 60 -- RON,FLT FAULT low on resistance -- 60 -- mA VO=15V, PW 10 s Dynamic Electrical Characteristics VCC = VBS = VBIAS = 15V, VS1,2,3 = VSS = COM, TA = 25oC and CL = 1000 pF unless otherwise specified. Symbol Min. Typ. ton Turn-on propagation delay -- 400 -- toff Turn-off propagation delay -- 380 -- VIN = 0 & 5V tr Turn-on rise time -- 110 -- VS1,2,3 = 0 to 600V tf tEN Turn-off fall time -- 50 -- ENABLE low to output shutdown propagation delay -- 400 -- tITRIP tbl Definition Max. Units Test Conditions ITRIP to output shutdown propagation delay -- 700 -- ITRIP blanking time 100 150 -- VIN, VEN = 0V or 5V nS VITRIP = 5V VIN = 0V or 5V VITRIP = 5V tFLT ITRIP to FAULT propagation delay -- 500 -- VIN = 0V or 5V VITRIP = 5V tFILIN tFLTCLR Input filter time (HIN, LIN, EN) 100 200 -- FAULT clear time RCIN: R=2meg, C=1nF -- 1.8 -- VIN = 0 & 5V mS VIN = 0V or 5V VITRIP = 0V DT Deadtime -- 250 -- MT Matching delay ON and OFF -- 0 80 Matching delay, max (ton ,toff) - min (ton,toff), (ton,toff are applicable to all 3 channels) -- 0 75 Output pulse width matching, PWin - PWout (fig.2) -- MDT PM VIN = 0 & 5V nS 0 75 External dead time >400nsec NOTE: For high side PWM, HIN pulse width must be 1sec 4 www.irf.com IR2136/IR21362/IR21363(J&S) VCC <UVCC VBS X ITRIP X ENABLE X FAULT 0 (note 1) LO1,2,3 0 HO1,2,3 0 15V <UVBS 0V 5V high imp LIN1,2,3 0 15V 15V 0V 5V high imp LIN1,2,3 15V 15V 5V 0 (note 2) 0 0 15V 15V >VITRIP 0V 0V high imp 0 0 HIN1,2,3 Note: A shoot-through prevention logic prevents LO1,2,3 and HO1,2,3 for each channel from turning on simultaneously. Note 1: UVCC is not latched, when VCC>UVCC, FAULT returns to high impedance. Note 2: When ITRIP <VITRIP, FAULT returns to high-impedance after RCIN pin becomes greater than 8V (@ VCC = 15V) Functional Block Diagram HIN1 INPUT NOISE FILTER LIN1 INPUT NOISE FILTER HIN2 INPUT NOISE FILTER 2136/21363 VSS/COM LEVEL SHIFTER DEADTIME & SHOOT-THROUGH PREVENTION VB1 HV LEVEL SHIFTER SET RESET LATCH DRIVER HO1 UV DETECT VS1 VB2 LIN2 INPUT NOISE FILTER HIN3 INPUT NOISE FILTER LIN3 INPUT NOISE FILTER VSS/COM LEVEL SHIFTER DEADTIME & SHOOT-THROUGH PREVENTION HV LEVEL SHIFTER SET RESET LATCH DRIVER HO2 UV DETECT VS2 VB3 VSS/COM LEVEL SHIFTER DEADTIME & SHOOT-THROUGH PREVENTION HV LEVEL SHIFTER SET RESET LATCH DRIVER VS3 VSS VCC UV DETECT INPUT NOISE FILTER EN ITRIP HO3 UV DETECT + - 0.5V VSS/COM LEVEL SHIFTER DELAY DRIVER LO1 VSS/COM LEVEL SHIFTER DELAY DRIVER LO2 VSS/COM LEVEL SHIFTER DELAY DRIVER LO3 INPUT NOISE FILTER S SET R DOMINANT LATCH Q RCIN FAULT COM www.irf.com 5 IR2136/IR21362/IR21363(J&S) Functional Block Diagram HIN1 INPUT NOISE FILTER LIN1 INPUT NOISE FILTER HIN2 INPUT NOISE FILTER IR21362 VB1 VSS/COM LEVEL SHIFTER DEADTIME & SHOOT-THROUGH PREVENTION HV LEVEL SHIFTER SET RESET LATCH DRIVER UV DETECT HO1 VS1 VB2 LIN2 INPUT NOISE FILTER HIN3 INPUT NOISE FILTER VSS/COM LEVEL SHIFTER DEADTIME & SHOOT-THROUGH PREVENTION HV LEVEL SHIFTER SET RESET LATCH DRIVER UV DETECT HO2 VS2 VB3 INPUT NOISE FILTER LIN3 VSS/COM LEVEL SHIFTER DEADTIME & SHOOT-THROUGH PREVENTION HV LEVEL SHIFTER SET RESET LATCH DRIVER UV DETECT VS3 VSS VCC UV DETECT INPUT NOISE FILTER EN ITRIP HO3 + - 0.5V VSS/COM LEVEL SHIFTER DELAY DRIVER LO1 VSS/COM LEVEL SHIFTER DELAY DRIVER LO2 VSS/COM LEVEL SHIFTER DELAY DRIVER LO3 INPUT NOISE FILTER S R SET DOMINANT LATCH Q RCIN FAULT COM 6 www.irf.com IR2136/IR21362/IR21363(J&S) Lead Definitions Symbol Description VCC Low side and logic fixed supply VSS Logic Ground HIN1,2,3 Logic inputs for high side gate driver outputs (HO1,2,3), out of phase (IR2136/IR21363) HIN1,2,3 Logic inputs for high side gate driver outputs (HO1,2,3), in phase (IR21362) LIN1,2,3 FAULT Logic inputs for low side gate driver outputs (LO1,2,3), out of phase Indicates over-current (ITRIP) or low-side undervoltage lockout has occured. Negative logic, open-drain output EN COM Logic input to enable I/O functionality. Positive logic, i.e. I/O logic functions when ENABLE is high. No effect on FAULT and not latched Analog input for overcurrent shutdown. When active, ITRIP shuts down outputs and activates FAULT and RCIN low. When ITRIP becomes inactive, FAULT stays active low for an externally set time TFLTCLR, then automatically becomes inactive (open-drain high impedance). External RC network input used to define FAULT CLEAR delay, TFLTCLR, approximately equal to R*C. When RCIN>8V, the FAULT pin goes back into open-drain high-impedance Low side gate driver return VB1,2,3 HO1,2,3 VS1,2,3 LO1,2,3 High side floating supply High side gate driver outputs High voltage floating supply returns Low side gate driver output ITRIP RCIN Lead Assignments 1 VCC V B 1 28 1 VCC V B 1 28 2 HIN1 HO1 2 HIN1 H O 1 27 3 HIN2 V S 1 26 3 HIN2 V S 1 26 4 HIN3 25 4 HIN3 25 5 LIN1 V B 2 24 5 LIN1 V B 2 24 6 LIN2 HO2 H O 2 23 7 LIN3 V S 2 22 8 FAULT 9 ITRIP V B 3 20 10 EN HO3 11 RCIN V S 3 18 12 VSS 13 14 HIN3 HIN2 HIN1 VCC VB1 HO1 VS1 27 6 5 4 3 43 42 41 7 LIN1 23 8 LIN2 9 37 VB2 6 LIN2 LIN3 10 36 HO2 7 LIN3 11 35 VS2 8 FAULT 9 ITRIP V B 3 20 10 EN H O 3 19 11 RCIN V S 3 18 IR2136 21 FAULT 12 13 19 ITRIP IR2136 44 LEAD PLCC w/o 12 LEADS V S 2 22 IR2136 21 14 15 31 VB3 17 EN 16 30 HO3 12 VSS COM L O 1 16 RCIN 17 29 VS3 13 COM L O 1 16 LO3 L O 2 15 14 LO3 L O 2 15 28 Lead PDIP IR2136/IR21363 www.irf.com 23 24 LO2 22 25 LO1 21 LO3 20 COM 19 VSS 18 17 44 Lead PLCC w/o 12 leads IR2136J/IR21363J 28 lead SOIC (wide body) IR2136S/IR21363S 7 ITRIP HO1 VS1 3 HIN2 VS1 26 LIN1 8 4 HIN3 LIN2 9 37 VB2 5 LIN1 VB2 24 LIN3 10 36 HO2 6 LIN2 HO2 23 11 35 VS2 7 LIN3 VS2 22 12 8 FAULT 13 9 ITRIP VB3 20 14 10 EN HO3 19 VS3 18 21 VB3 20 EN HO3 19 RCIN 15 31 VB3 11 RCIN EN 16 30 HO3 12 VSS RCIN 17 29 VS3 13 COM LO1 16 14 LO3 LO2 15 VS3 18 VSS 17 17 LO1 16 20 21 22 23 24 25 LO2 15 VSS LO3 19 LO2 COM 18 14 25 21 LO1 13 VB1 27 7 LO3 12 VCC 28 COM 11 HIN1 VB1 HO1 ITRIP 10 2 VS2 22 FAULT 9 41 HIN1 FAULT 8 42 HO2 23 LIN3 7 43 VB2 24 LIN2 6 3 25 LIN1 5 4 VS1 26 HIN3 4 5 HO1 27 HIN2 3 1 6 VCC VB1 28 HIN1 2 HIN2 VCC 1 HIN3 IR2136/IR21362/IR21363(J&S) 28 Lead PDIP IR21362 44 Lead PLCC w/o 12 leads IR21362J 28 lead SOIC (wide body) IR21362S HIN1,2,3 HIN1,2,3 LIN1,2,3 EN ITRIP FAULT RCIN HO1,2,3 LO1,2,3 Figure 1. Input/Output Timing Diagram 8 www.irf.com IR2136/IR21362/IR21363(J&S) LIN1,2,3 HIN1,2,3 50% 50% PW IN LIN1,2,3 50% 50% HIN1,2,3 ton tr toff tf PW OUT HO1,2,3 LO1,2,3 90% 90% 10% 10% Figure 2. Switching Time Waveforms LIN1,2,3 50% 50% 50% 50% HIN1,2,3 LIN1,2,3 HIN1,2,3 50% LO1,2,3 50% DT HO1,2,3 DT 50% 50% Figure 3. Internal Deadtime Timing Waveforms Vrcin,th+ RCIN 50% EN 50% ITRIP 50% ten FAULT 50% tflt 50% 90% 90% tfltclr Any output titrip Figure 4. ITRIP/RCIN Timing Waveforms www.irf.com HO1,2,3 LO1,2,3 Figure 5. Output Enable Timing Waveform 9 IR2136/IR21362/IR21363(J&S) Case outlines 28-Lead PDIP (wide body) 28-Lead SOIC (wide body) 10 01-6011 01-3024 02 (MS-011AB) 01-6013 01-3040 02 (MS-013AE) www.irf.com IR2136/IR21362/IR21363(J&S) NOTES 44-Lead PLCC w/o 12 leads 01-6009 00 01-3004 02(mod. ) (MS-018AC) WORLD HEADQUARTERS: 233 Kansas Street, El Segundo, California 90245 Tel: (310) 252-7105 http://www.irf.com/ Data and specifications subject to change without notice. 7/25/2001 www.irf.com 11