Typical Connection
Product Summary
VOFFSET 600V max.
IO+/- 120 mA / 250 mA
VOUT 10 - 20V or 12V - 20V
Deadtime (typ.) 200 nsec
ton/off (typ.) 400 nsec
3-PHASE BRIDGE DRIVER
Features
•Floating channel designed for bootstrap operation
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
•Gate drive supply range from 10 to 20V (IR2136/
IR21363) or 12 to 20V (IR21362)
•Under voltage lockout for all channels
•Over-current shutdown turns off all six dr ivers
•Independent 3 half-bridge dr ivers
•Matched propagation delay for all channels
•Lowside outputs out of phase with inputs. High
side outputs out of phase (IR2136/IR21363) or in
phase (IR21362) with inputs.
•Cross-conduction prevention logic
•3.3V logic compatible
•Lower di/dt gate driver for better noise immunity
•Exter nally programmable delay for automatic fault
clear
Description
The IR2136/IR21362/IR21363(J&S) are high votage, high
speed power MOSFET and IGBT drivers with three in-
dependent high and low side referenced output
channels for 3-phase applications. Proprietary HVIC
technology enables ruggedized monolithic construc-
tion. Logic inputs are compatible with CMOS or
LSTTL outputs, down to 3.3V logic. A current trip
function which terminates all six outputs can be de-
rived from an external current sense resistor . An enable
function is available to terminate all six outputs sim ul-
taneously. An open-drain FAULT signal is provided to
indicate that an overcurrent or underv oltage shutdow n
has occurred. Overcurrent fault conditions are cleared
Packages
automatically after a delay programmed externally via
an RC network connected to the RCIN input. The out-
put drivers feature a high pulse current buffer stage
designed for minim um dr iver cross-conduction. Propa-
gation delays are matched to simplify use in high
frequency applications. The floating channel can be used
to drive N-channel power MOSFETs or IGBTs in the
high side configuration which operates up to 600 volts.
28-Lead PDIP
28-Lead SOIC
44-Lead PLCC w/o 12 leads
Preliminary Data Sheet No. PD60166-G
IR2136/IR21362/IR21363 (J&S)
www.irf.com 1
(Refer to Lead Assignments for
correct pin configuration). This/
These diagram(s) show electrical
connections only . Please refer to
our Application Notes and
DesignTips for proper circuit
board layout.
VCC
HIN1,2,3 / HIN1,2,3
LIN1,2,3
FAULT
ITRIP
RCIN
EN
VSS COM
LO1,2,3
VS1,2,3
HO1,2,3
VB1,2,3
IR2136
(
2
)(
3
)
TO
LOAD
VCC
HIN1,2,3 / HIN1,2,3
LIN1,2,3
FAULT
EN
GND
up to 600V
IR2136/IR21362/IR21363(J&S)
2www.irf.com
Symbol Definition Min. Max. Units
VSHigh side offset voltage -0.3 600
VBS High side floating supply voltage -0.3 25
VHO High side floating output voltage VS1,2,3 - 0.3 VB1,2,3 + 0.3
VCC Low side and logic fixed supply voltage -0.3 25
VSS Logic ground VCC - 25 VCC + 0.3
VLO1,2,3 Low side output voltage -0.3 VCC + 0.3
VIN Input voltage LIN,HIN(IR2136/IR21363),HIN (IR21362) ITRIP,
EN, RCIN VSS - 0.3 VSS + 15
VFLT FAULT output voltage VSS - 0.3 VCC + 0.3
dV/d t Allowable offset voltage slew rate — 50 V/ns
PDPackage power dissipation @ TA ≤ +25°C (28 lead PDIP) — 1.5
(28 lead SOIC) — 1.6
(44 lead PLCC) — 2.0
RthJA Thermal resistance, junction to ambient (28 lead PDIP) — 83
(28 lead SOIC) — 78
(44 lead PLCC) — 63
TJJunction temperature — 125
TSStorage temperature -55 150
TLLead temperature (soldering, 10 seconds) — 30 0
V
°C
°C/W
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits be y ond which damage to the device ma y occur. All voltage par ameters
are absolute voltages ref erenced to COM. The thermal resistance and power dissipation ratings are measured under board
mounted and still air conditions.
W
Note 1: Logic operational for V S of COM -5 to COM +600V. Logic state held fo r VS of COM -5V to -COM -VBS. (Please
refer to the Design Tip DT97-3 for more details).
Note 2: All input pins and the ITRIP pin are internally clamped with a 5.2V zener diode.
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recom-
mended conditions. All voltage parameters are absolute referenced to COM. The VS offset rating is tested with all supplies
biased at 15V differential.
VB1,2,3 High side floating supply voltage VS1,2,3 + 10 VS1,2,3 + 20
VS1,2,3 High side floating supply offset voltage Note 1 600
VHO1,2,3 High side output voltage VS1,2,3 VB1,2,3
VLO1,2,3 Low side output voltage 0 VCC
VCC Low side and logic fixed supply voltage 10 20
VSS Logic ground -5 5
VFLT FAULT output voltage VSS VCC
VRCIN RCIN input voltage VSS VCC
VITRIP ITRIP input voltage VSS VSS +5
VIN Logic input voltage LIN, HIN (IR2136), HIN(IR21362), EN VSS VSS +5
TAAmbient temperature -40 125 °C
Symbol Definition Min. Max. Units
V
www.irf.com 3
IR2136/IR21362/IR21363(J&S)
Static Electrical Characteristics
VBIAS (VCC, VBS1,2,3) = 15V unless otherwise specified. The VIN, VTH and IIN par ameters are referenced to VSS and
are applicable to all six channels (HS1,2,3 and L S1,2,3). T he VO and IO parameters are referenced to COM and VS1,2,3
and are applicable to the respective output leads: HO1,2,3 and LO1,2,3.
Symbol Definition Min. Typ. Max. Units Test Conditions
VIH Logic “0” input voltage LIN1,2,3, HIN1,2,3 3 ——
Logic “1” input voltage HIN1,2,3
VIL Logic “1” input voltage LIN1,2,3, HIN1,2,3 ——0.8
Logic “0” input voltage HIN1,2,3
VEN,TH+ EN positive going threshold ——3
VEN,TH- EN negative going threshold 0.8 ——
VIT,TH+ ITRIP positive going threshold 370 460 550
VIT,HYS ITRIPinput hysteresis —70 —
VRCIN,TH+ RCIN positive going threshold —8—
VRCIN,HYS RCIN input hysteresis —3—
VOH High level output voltage, VBIAS - VO—0.8 1.4 IO = 20 mA
VOL Low level output voltage, VO—0.3 0.6 IO = 20 mA
VCCUV+ VCC and VBS supply undervoltage IR2136 8.0 8.9 9.8
VBSUV+ positive going threshold IR21362 9.6 10.4 11.2
IR21363 10.7 11.2 11.7
VCCUV- VCC and VBS supply undervoltage IR2136 7.4 8.2 9.0
VBSUV- negative going threshold IR21362 8.6 9.4 10.2
IR21363 10.5 11.0 11.5
VCCUVH VCC and VBS supply undervoltage IR2136 0.3 0.7 —
VBSUVH lockout hysteresis IR21362 0.5 1.0 —
IR21363 —0.2 —
ILK Offset supply leakage current ——50 VB1,2,3=VS1,2,3
= 600V
IQBS Quiescent VBS supply current 20 60 150
IQCC Quiescent VCC supply current —12mA
VIN, CLAMP Input clamp voltage (HIN, LIN, ITRIP and EN) 4.9 5.2 5.5 V IIN =100µA
ILIN+ Input bias current (LOUT = HI) —150 400 VLIN = 0V
ILIN- Input bias current (LOUT = LO) —100 250 VLIN = 5V
IHIN+ Input bias current (HOUT = HI) IR2136(3) —150 300 VHIN = 0V
IR21362 ——100 VHIN = 5V
IHIN- Input bias current (HOUT = LO) IR2136(3) —100 250 VHIN = 5V
IR21362 —01 V
HIN = 0V
IITRIP+ “high” ITRIP input bias current ——100 VITRIP = 5V
IITRIP- “low” ITRIP input bias current —01 V
ITRIP = 0V
V
VIN = 0V or 5V
mV
V
µA
µA
IR2136/IR21362/IR21363(J&S)
4www.irf.com
NOTE: For high side PWM, HIN pulse width must be ≥ 1µsec
Static Electrical Characteristics cont.
VBIAS (VCC, VBS1 ,2, 3) = 15 V unless otherwise specified. The VIN, VTH and IIN parameters are referenced to VSS and
are applicable to all six channels (HS1,2,3 and L S1,2,3). The VO and IO parameters are referenced to COM and V S1,2,3
and are applicable to the respective output leads: HO1,2,3 and LO1,2,3.
Dynamic Electrical Characteristics
VCC = VBS = VBIAS = 15V, VS1,2,3 = VSS = COM, TA = 25oC and CL = 1000 pF unless otherwise specified.
Symbol Definition Min. Typ. Max. Units Test Conditions
ton Turn-on propagation delay —400 —
toff Turn-off propagation delay —380 —
trTurn-on rise time —110 —
tfTurn-off fall time —50 —
tEN ENABLE lo w to output shutdown propagation delay —400 —VIN, VEN = 0V or 5V
tITRIP ITRIP to output shutdown propagation delay —700 —VITRIP = 5V
tbl ITRIP blanking time 100 150 —VIN = 0V or 5V
VITRIP = 5V
tFLT ITRIP to FAU LT propagation delay —500 —VIN = 0V or 5V
VITRIP = 5V
tFILIN Input filter time (HIN, LIN, EN) 100 200 —VIN = 0 & 5V
tFLTCLR FAULT clear time RCIN: R=2meg, C=1nF —1.8 —mS VIN = 0V or 5V
VITRIP = 0V
DT Deadtime —250 —VIN = 0 & 5V
MT Matching delay ON and OFF —080
MDT Matching delay, max (ton,toff) - min (ton,toff), —075
(ton,toff are applicable to all 3 channels)
PM Output pulse width matching, PWin - PWout (fig.2) —075
nS
VIN = 0 & 5V
VS1,2,3 = 0 to 600V
nS External dead
time
>400nsec
Symbol Definition Min. Typ. Max. Units Test Conditions
IEN+ “high” ENABLE input bias current ——100 VENABLE= 5 V
IEN- “low” ENABLE input bias current —01 V
ENABLE = 0V
IRCIN RCIN input bias current —01 V
RCIN = 0V or 15V
IO+ Output high short circuit pulsed current 120 200 —VO=0V, PW ≤ 10 µs
IO- Output low shor t circuit pulsed current 250 350 —VO=15V, PW ≤10 µs
RON,RCIN RCIN low on resistance —60 —
RON,FLT FAULT low on resistance —60 —
mA
Ω
µA
www.irf.com 5
IR2136/IR21362/IR21363(J&S)
Functional Block Diagram
VCC VBS ITRIP ENABLE FAULT LO1,2,3 HO1,2,3
<UVCC X X X 0 (note 1) 0 0
15V <UVBS 0V 5V high imp LIN1,2,3 0
15V 15V 0V 5V high imp LIN1,2,3 HIN1,2,3
15V 15V >VITRIP 5 V 0 (note 2) 0 0
15V 15V 0V 0V high imp 0 0
Note: A shoot-through prevention logic prevents LO1,2,3 and HO1,2,3 for each channel from turning on simultaneously.
Note 1: UVCC is not latched, when VCC>UVCC, FAULT returns to high impedance.
Note 2: When ITRIP <VITRIP, FAULT retur ns to high-impedance after RCIN pin becomes greater than 8V (@ VCC = 15V)
2136/21363
COM
VCC
LO1
LO2
LO3
DELAY
VSS/COM
LEVEL
SHIFTER
DELAY
VSS/COM
LEVEL
SHIFTER
DELAY
VSS/COM
LEVEL
SHIFTER
LIN1
HIN1
LIN2
HIN2
LIN3
HIN3
DEADTIME &
SHOOT-THROUGH
PREVENTION
DEADTIME &
SHOOT-THROUGH
PREVENTION
DEADTIME &
SHOOT-THROUGH
PREVENTION
VS1
HO1
VB1
HV
LEVEL
SHIFTER
VSS/COM
LEVEL
SHIFTER
LATCH
UV
DETECT
SET
RESET DRIVER
VS2
HO2
VB2
HV
LEVEL
SHIFTER
VSS/COM
LEVEL
SHIFTER
LATCH
UV
DETECT
SET
RESET DRIVER
VS3
HO3
VB3
HV
LEVEL
SHIFTER
VSS/COM
LEVEL
SHIFTER
LATCH
UV
DETECT
SET
RESET DRIVER
DRIVER
DRIVER
DRIVER
INPUT
NOISE
FILTER
INPUT
NOISE
FILTER
INPUT
NOISE
FILTER
INPUT
NOISE
FILTER
INPUT
NOISE
FILTER
INPUT
NOISE
FILTER
UV
DETECT
EN
ITRIP +
-
0.5V
RCIN
S
R
Q
FAULT
INPUT
NOISE
FILTER
VSS
INPUT
NOISE
FILTER
SET
DOMINANT
LATCH
IR2136/IR21362/IR21363(J&S)
6www.irf.com
IR21362
COM
VCC
LO1
LO2
LO3
DELAY
VSS/COM
LEVEL
SHIFTER
DELAY
VSS/COM
LEVEL
SHIFTER
DELAY
VSS/COM
LEVEL
SHIFTER
LIN1
HIN1
LIN2
HIN2
LIN3
HIN3
DEADTIME &
SHOOT-THROUGH
PREVENTION
DEADTIME &
SHOOT-THROUGH
PREVENTION
DEADTIME &
SHOOT-THROUGH
PREVENTION
VS1
HO1
VB1
HV
LEVEL
SHIFTER
VSS/COM
LEVEL
SHIFTER
LATCH
UV
DETECT
SET
RESET DRIVER
VS2
HO2
VB2
HV
LEVEL
SHIFTER
VSS/COM
LEVEL
SHIFTER
LATCH
UV
DETECT
SET
RESET DRIVER
VS3
HO3
VB3
HV
LEVEL
SHIFTER
VSS/COM
LEVEL
SHIFTER
LATCH
UV
DETECT
SET
RESET DRIVER
DRIVER
DRIVER
DRIVER
INPUT
NOISE
FILTER
INPUT
NOISE
FILTER
INPUT
NOISE
FILTER
INPUT
NOISE
FILTER
INPUT
NOISE
FILTER
INPUT
NOISE
FILTER
UV
DETECT
EN
ITRIP
+
-
0.5V
RCIN
S
R
Q
FAULT
INPUT
NOISE
FILTER
VSS
INPUT
NOISE
FILTER
SET
DOMINANT
LATCH
Functional Block Diagram
www.irf.com 7
IR2136/IR21362/IR21363(J&S)
28 Lead PDIP 44 Lead PLCC w/o 12 leads 28 lead SOIC (wide body)
IR2136/IR21363 IR2136J/IR21363J IR2136S/IR21363S
1
VCC
2
HIN1
3
HIN2
4
HIN3
5
LIN1
6
LIN2
7
LIN3
8
FAULT
9
ITRIP
10
EN
11
RCIN
12
VSS
13
COM
14
LO3
28
VB1
27
HO1
26
VS1
25
24
VB2
23
HO2
22
VS2
21
20
VB3
19
HO3
18
VS3
17
16
LO1
15
LO2
IR2136
FAULT
8
9
10
11
LIN1
12
LIN2
13
LIN3
14
15
ITRIP
16
EN
17
7
VSS
LO1
18
LO3
VS3
HO3
VB3
29
41
VS1
LO2
COM
30
31
VS2
HO2
VB2
35
36
37
19 20 21 22 23 24 25
HO1
VB1
VCC
HIN1
HIN2
HIN3
42433456
IR2136
44 LEAD PLCC w/o 12 LEADS
RCIN
1
VCC
2
HIN1
3
HIN2
4
HIN3
5
LIN1
6
LIN2
7
LIN3
8
FAULT
9
ITRIP
10
EN
11
RCIN
12
VSS
13
COM
14
LO3
28
VB1
27
HO1
26
VS1
25
24
VB2
23
HO2
22
VS2
21
20
VB3
19
HO3
18
VS3
17
16
LO1
15
LO2
IR2136
Lead Definitions
Symbol Description
VCC Low side and logic fixed supply
VSS Logic Ground
HIN1,2,3 Logic inputs for high side gate driver outputs (HO1,2,3), out of phase (IR2136/IR21363)
HIN1,2,3 Logic inputs for high side gate driver outputs (HO1,2,3), in phase (IR21362)
LIN1,2,3 Logic inputs for low side gate driver outputs (LO1,2,3), out of phase
FAULT Indicates over-current (ITRIP) or low-side undervoltage lockout has occured. Negative logic,
open-drain output
EN Logic input to enable I/O functionality. Positive logic, i.e. I/O logic functions when ENABLE is
high. No effect on FAULT and not latched
ITRIP Analog input for overcurrent shutdown. When active, ITRIP shuts down outputs and activates
FAULT and RCIN low. When ITRIP becomes inactive, FAULT stays active low for an externally
set time TFLTCLR, then automatically becomes inactive (open-drain high impedance).
RCIN External RC networ k input used to define FAULT CLEAR delay, TFLTCLR, approximately equal
to R*C. When RCIN>8V, the FAULT pin goes back into open-drain high-impedance
COM Low side gate driver return
VB1,2,3 High side floating supply
HO1,2,3 High side gate driver outputs
VS1,2,3 High voltage floating supply returns
LO1,2,3 L ow side gate driver output
Lead Assignments
IR2136/IR21362/IR21363(J&S)
8www.irf.com
28 Lead PDIP 44 Lead PLCC w/o 12 leads 28 lead SOIC (wide body)
IR21362 IR21362J IR21362S
1
VCC
2
HIN1
3
HIN2
4
HIN3
5
LIN1
6
LIN2
7
LIN3
8
FAULT
9
ITRIP
10
EN
11
RCIN
12
VSS
13
COM
14
LO3
28
VB1
27
HO1
26
VS1
25
24
VB2
23
HO2
22
VS2
21
20
VB3
19
HO3
18
VS3
17
16
LO1
15
LO2
1
VCC
2
HIN1
3
HIN2
4
HIN3
5
LIN1
6
LIN2
7
LIN3
8
FAULT
9
ITRIP
10
EN
11
RCIN
12
VSS
13
COM
14
LO3
28
VB1
27
HO1
26
VS1
25
24
VB2
23
HO2
22
VS2
21
20
VB3
19
HO3
18
VS3
17
16
LO1
15
LO2
FAULT
8
9
10
11
LIN1
12
LIN2
13
LIN3
14
15
ITRIP
16
EN
17
7
VSS
LO1
18
LO3
VS3
HO3
VB3
29
41
VS1
LO2
COM
30
31
VS2
HO2
VB2
35
36
37
19 20 21 22 23 24 25
HO1
VB1
VCC
HIN1
HIN2
HIN3
42433456
RCIN
Figure 1. Input/Output Timing Diagram
HIN1,2,3
LIN1,2,3
EN
ITRIP
FAULT
RCIN
HO1,2,3
LO1,2,3
HIN1,2,3
www.irf.com 9
IR2136/IR21362/IR21363(J&S)
Figure 3. Internal Deadtime Timing Waveforms
LIN1,2,3
HIN1,2,3
HO1,2,3
LO1,2,3
50% 50%
LIN1,2,3
HIN1,2,3
50% 50%
50% 50%
50% 50%
DT DT
Figure 2. Switching Time Waveforms
LIN1,2,3
HIN1,2,3
HO1,2,3
LO1,2,3
50% 50%
90%
10%10%
90%
ton tr tftoff
LIN1,2,3
HIN1,2,3
50% 50%
PW
IN
PW
OUT
Figure 4. ITRIP/RCIN Timing Waveforms
RCIN
Any
output
tflt
ITRIP
FAULT
50%
50%
titrip
90%
50%
50%
tfltclr
Vrcin,th+
Figure 5. Output Enable Timing Waveform
EN
HO1,2,3
LO1,2,3
50%
90%
ten
IR2136/IR21362/IR21363(J&S)
10 www.irf.com
28-Lead PDIP (wide body) 01-6011
01-3024 02 (MS-011AB)
Case outlines
01-6013
01-3040 02 (MS-013AE)28-Lead SOIC (wide body)
www.irf.com 11
IR2136/IR21362/IR21363(J&S)
01-6009 00
01-3004 02(mod.) (MS-018AC)
44-Lead PLCC w/o 12 leads
NOTES
WORLD HEADQUARTERS: 233 Kansas Street, El Segundo, California 90245 Tel: (310) 252-7105
http://www.irf.com/ Data and specifications subject to change without notice. 7/25/2001
