
10 Semtech Broadcast Video Selector Guide • Fall 2017
EQ
Transmitter
w/CD
11
11
Complete Complete
Complete Solution Transmitter/Receiver
EQ+Receiver
SDI Output
SDI Input Low-End FPGA
Spartan 3A, Cyclone III
Proprietary Customer
Logic
Receiver
VCXO
Digital
SMPTE processing
Proprietary Customer Logic
CD
Reclocker
EQ
Receiver
Transmitter
Integrated Transceiver FPGAs
12
EQ
Digital
SMPTE processing
Proprietary Customer Logic
Receiver Transmitter
w/CD
PartialPartial
12
FPGA-Helper SERDES
SDI Output SDI Input
High-End FPGA
Virtex 5, Stratix II GX
SDI Output SDI Input
High-End FPGA
Virtex 5, Stratix II
EQ
Transmitter
w/CD
11
11
Complete Complete
Complete Solution Transmitter/Receiver
EQ+Receiver
SDI Output
SDI Input Low-End FPGA
Spartan 3A, Cyclone III
Proprietary Customer
Logic
Receiver
VCXO
Digital
SMPTE processing
Proprietary Customer Logic
CD
Reclocker
EQ
Receiver
Transmitter
Integrated Transceiver FPGAs
12
EQ
Digital
SMPTE processing
Proprietary Customer Logic
Receiver Transmitter
w/CD
PartialPartial
12
FPGA-Helper SERDES
SDI Output SDI Input
High-End FPGA
Virtex 5, Stratix II GX
SDI Output
SDI Input
High-End FPGA
Virtex 5, Stratix II
EQ
Transmitter
w/CD
11
11
Complete Complete
Complete Solution Transmitter/Receiver
EQ+Receiver
SDI Output
SDI Input Low-End FPGA
Spartan 3A, Cyclone III
Proprietary Customer
Logic
Receiver
VCXO
Digital
SMPTE processing
Proprietary Customer Logic
CD
Reclocker
EQ
Receiver
Transmitter
Integrated Transceiver FPGAs
12
EQ
Digital
SMPTE processing
Proprietary Customer Logic
Receiver Transmitter
w/CD
PartialPartial
12
FPGA-Helper SERDES
SDI Output SDI Input
High-End FPGA
Virtex 5, Stratix II GX
SDI Output SDI Input
High-End FPGA
Virtex 5, Stratix II
Designers have the choice of selecting components
from different vendors, but when it comes to designs
with SDI transmitters and SDI receivers, they must first
choose an architecture. In implementing a design with
a SDI transmitter and/or SDI receiver, there are three
architectural choices: Semtech’s complete SDI transmitter/
SDI receiver solution architecture, an integrated-
transceiver FPGA architecture, and a FPGA-helper
architecture. Let’s explore these three options with an
assessment of the following key parameters: jitter, power
consumption, integration (component/features), time-to-
market, system size, and cost.
SEMTECH’S COMPLETE SOLUTION ARCHITECTURE
Leveraging our expertise in signal integrity and our deep
understanding of broadcast video technologies, Semtech’s
SDI transmitter and SDI receiver offering encapsulates
all the analog components (SerDes, VCO, CD, EQ and
Reclocker) and digital SMPTE video and audio processing
required to transmit and receive SDI video. Integrating
all of these components into one package reduces the
PCB footprint required to implement SDI transmit/receive,
and the solution benefits from Semtech’s superior jitter
performance. This optimized, cost-effective and power
efficient ASIC implementation allows customers to focus
on their unique value-added processing for quicker time-to-
market. Only Semtech offers a solution that scores high for
each evaluation parameter.
INTEGRATED-TRANSCEIVER FPGA ARCHITECTURE
Integrated-transceiver FPGAs typically offer the worst
specifications in terms of jitter. Maximum output jitter and
input jitter tolerance (IJT) are typically at the limit of the
SMPTE standards and, in some cases, actually in violation
of industry norms. That is why extra components, namely
VCXOs and reclockers, are required to get the system
jitter performance to an acceptable level. This comes at a
penalty of higher power consumption, system footprint
size and cost. Because of all the fine tuning required
to get this architecture to work and because of the IP
licensing/development required for the digital SMPTE
video processing, this architecture unnecessarily prolongs
time-to-market. Finally, while FPGAs integrate transceivers,
they do not integrate routing components like cable
drivers and equalizers.
FPGA-HELPER ARCHITECTURE
The FPGA-helper architecture, as depicted below, involves
the use of a component that includes the physical media
attachment part of a SMPTE SDI receiver/SDI transmitter
with the digital SMPTE processing implemented in the
FPGA. The result is an architecture that is taxing in terms
of power consumption, and those FPGA-helper parts are
lacking even basic SMPTE digital processing.
In many cases, product specific FPGA IP already requires
high utilization factors in small, low-cost FPGAs, and the
added requirement of digital SMPTE video processing
in the FPGA may drive adoption of a larger FPGA. This
results in further penalties in power consumption, size
and system cost. And while this architecture fares well
in system jitter performance in certain cases, the added
engineering effort in developing (or licensing) and
stitching that video processing logic to product specific
code ensures a slower time-to-market. Finally, while some
FPGA-helper parts integrate a cable driver, the offering
lacks an integrated equalizer.
HOW THE SEMTECH SOLUTION STACKS UP
Compare the ratings of each of the three architectures for key
parameters in an implementation of 1Rx and 1Tx channel.
SDI Transmitters and Receivers
Choose the right SDI transmitter and SDI receiver for your system.
Semtech
Complete
Solution
Integrated
Transceiver
FPGA
FPGA-Helper
SerDes
Jitter Performance
Time-to-Market
Power Consumption
Integration
Overall PCB Space
System Cost