PackageFootprintComparison(toScale)
PackageHeight (toScale)Comparison
D(SO-8) DBV(SOT23-5) DRL(SOT553)
OPA171
OPA2171
OPA4171
www.ti.com
SBOS516C SEPTEMBER 2010REVISED JUNE 2011
36V, Single-Supply, SOT553, General-Purpose
OPERATIONAL AMPLIFIERS
Check for Samples: OPA171,OPA2171,OPA4171
1FEATURES DESCRIPTION
The OPA171, OPA2171 and OPA4171 (OPAx171)
2Supply Range: +2.7V to +36V, ±1.35V to ±18V are a family of 36V, single-supply, low-noise
Low Noise: 14nV/Hz operational amplifiers with the ability to operate on
Low Offset Drift: ±0.3µV/°C (typ) supplies ranging from +2.7V (±1.35V) to +36V
RFI Filtered Inputs (±18V). These devices are available in
micro-packages and offer low offset, drift, and
Input Range Includes the Negative Supply bandwidth with low quiescent current. The single,
Input Range Operates to Positive Supply dual, and quad versions all have identical
Rail-to-Rail Output specifications for maximum design flexibility.
Gain Bandwidth: 3MHz Unlike most op amps, which are specified at only one
Low Quiescent Current: 475µA per Amplifier supply voltage, the OPAx171 family is specified from
High Common-Mode Rejection: 120dB (typ) +2.7V to +36V. Input signals beyond the supply rails
Low Input Bias Current: 8pA do not cause phase reversal. The OPAx171 family is
stable with capacitive loads up to 300pF. The input
Industry-Standard Packages: can operate 100mV below the negative rail and within
8-Pin SOIC 2V of the top rail during normal operation. Note that
8-Pin MSOP these devices can operate with full rail-to-rail input
14-Pin TSSOP 100mV beyond the top rail, but with reduced
microPackages: performance within 2V of the top rail.
Single in SOT553 The OPAx171 series of op amps are specified
Dual in VSSOP-8 from 40°C to +125°C.
APPLICATIONS
Tracking Amplifier in Power Modules
Merchant Power Supplies
Transducer Amplifiers
Bridge Amplifiers
Temperature Measurements
Strain Gauge Amplifiers
Precision Integrators
Battery-Powered Instruments
Test Equipment
Product Family
DEVICE PACKAGE
OPA171 SOT553, SOT23-5, SO-8
OPA2171 (dual) VSSOP-8, SO-8, MSOP-8
OPA4171 (quad) TSSOP-14, SO-14
Smallest Packaging for 36V Op Amps
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright ©20102011, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
OPA171
OPA2171
OPA4171
SBOS516C SEPTEMBER 2010REVISED JUNE 2011
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PACKAGE/ORDERING INFORMATION (1)
PACKAGE PACKAGE TRANSPORT MEDIA,
PRODUCT PACKAGE-LEAD DESIGNATOR MARKING ORDERING NUMBER QUANTITY
OPA171AIDRLT Tape and Reel, 250
SOT553 DRL DAP OPA171AIDRLR Tape and Reel, 4000
OPA171AIDBVT Tape and Reel, 250
OPA171 SOT23-5 DBV OSUI OPA171AIDBVR Tape and Reel, 3000
OPA171AID Rail, 75
SO-8 D O171A OPA171AIDR Tape and Reel, 2500
OPA2171AIDGK Rail, 80
MSOP-8 DGK OPMI OPA2171AIDGKR Tape and Reel, 2500
OPA2171AIDCUT Tape and Reel, 250
OPA2171 VSSOP-8 DCU OPOC OPA2171AIDCUR Tape and Reel, 3000
OPA2171AID Rail, 75
SO-8 D 2171A OPA2171AIDR Tape and Reel, 2500
OPA4171AID Rail, 50
SO-14 D OPA4171 OPA4171AIDR Tape and Reel, 2500
OPA4171 OPA4171AIPW Rail, 90
TSSOP-14 PW OPA4171 OPA4171AIPWR Tape and Reel, 2000
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or visit the
device product folder at www.ti.com.
ABSOLUTE MAXIMUM RATINGS(1)
Over operating free-air temperature range, unless otherwise noted. OPAx171 UNIT
Supply voltage ±20 V
Voltage (V)0.5 to (V+) + 0.5 V
Signal input terminals Current ±10 mA
Output short circuit(2) Continuous
Operating temperature 55 to +150 °C
Storage temperature 65 to +150 °C
Junction temperature +150 °C
Human body model (HBM) 4 kV
ESD ratings: Charged device model (CDM) 750 V
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
(2) Short-circuit to ground, one amplifier per package.
2Copyright ©20102011, Texas Instruments Incorporated
OPA171
OPA2171
OPA4171
www.ti.com
SBOS516C SEPTEMBER 2010REVISED JUNE 2011
ELECTRICAL CHARACTERISTICS
Boldface limits apply over the specified temperature range, TA=40°C to +125°C.
At TA= +25°C, VS= +2.7V to +36V, VCM = VOUT = VS/2, and RLOAD = 10kΩconnected to VS/2, unless otherwise noted.
OPA171, OPA2171, OPA4171
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
Input offset voltage VOS 0.25 ±1.8 mV
Over temperature 0.3 ±2 mV
Drift dVOS/dT 0.3 ±2µV/°C
vs power supply PSRR VS= +4V to +36V 1 ±3µV/V
Channel separation, dc dc 5 µV/V
INPUT BIAS CURRENT
Input bias current IB±8±15 pA
Over temperature ±3.5 nA
Input offset current IOS ±4 pA
Over temperature ±3.5 nA
NOISE
Input voltage noise f = 0.1Hz to 10Hz 3 µVPP
f = 100Hz 25 nV/Hz
Input voltage noise density enf = 1kHz 14 nV/Hz
INPUT VOLTAGE
Common-mode voltage range(1) VCM (V)0.1V (V+) 2V V
VS=±2V, (V)0.1V <VCM <(V+) 2V 90 104 dB
Common-mode rejection ratio CMRR VS=±18V, (V)0.1V <VCM <(V+) 2V 104 120 dB
INPUT IMPEDANCE
Differential 100 || 3 MΩ|| pF
1012Ω||
Common-mode 6 || 3 pF
OPEN-LOOP GAIN
Open-loop voltage gain AOL VS= +4V to +36V, (V) + 0.35V <VO<(V+) 0.35V 110 130 dB
FREQUENCY RESPONSE
Gain bandwidth product GBP 3.0 MHz
Slew rate SR G = +1 1.5 V/µs
To 0.1%, VS=±18V, G = +1, 10V step 6 µs
Settling time tSTo 0.01% (12 bit), VS=±18V, G = +1, 10V step 10 µs
Overload recovery time VIN ×Gain >VS2µs
Total harmonic distortion + noise THD+N G = +1, f = 1kHz, VO= 3VRMS 0.0002 %
OUTPUT
Voltage output swing from rail VOVS= 5V, RL= 10kΩ30 mV
Over temperature RL= 10kΩ, AOL 110dB (V) + 0.35 (V+) 0.35 V
Short-circuit current ISC +25/35 mA
Capacitive load drive CLOAD See Typical Characteristics pF
Open-loop output resistance ROf = 1MHz, IO= 0A 150 Ω
POWER SUPPLY
Specified voltage range VS+2.7 +36 V
Quiescent current per amplifier IQIO= 0A 475 595 µA
Over temperature IO= 0A 650 µA
TEMPERATURE
Specified range 40 +125 °C
Operating range 55 +150 °C
(1) The input range can be extended beyond (V+) 2V up to V+. See the Typical Characteristics and Application Information sections for
additional information.
Copyright ©20102011, Texas Instruments Incorporated 3
OPA171
OPA2171
OPA4171
SBOS516C SEPTEMBER 2010REVISED JUNE 2011
www.ti.com
THERMAL INFORMATION: OPA171 OPA171
THERMAL METRIC(1) D (SO) DBV (SOT23) DRL (SOT553) UNITS
8 PINS 5 PINS 5 PINS
θJA Junction-to-ambient thermal resistance 149.5 245.8 208.1
θJC(top) Junction-to-case(top) thermal resistance 97.9 133.9 0.1
θJB Junction-to-board thermal resistance 87.7 83.6 42.4 °C/W
ψJT Junction-to-top characterization parameter 35.5 18.2 0.5
ψJB Junction-to-board characterization parameter 89.5 83.1 42.2
θJC(bottom) Junction-to-case(bottom) thermal resistance N/A N/A N/A
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
THERMAL INFORMATION: OPA2171 OPA2171
THERMAL METRIC(1) D (SO) DCU (VSSOP) DGK (MSOP) UNITS
8 PINS 8 PINS 8 PINS
θJA Junction-to-ambient thermal resistance 134.3 175.2 195.3
θJC(top) Junction-to-case(top) thermal resistance 72.1 74.9 59.4
θJB Junction-to-board thermal resistance 60.6 22.2 115.1 °C/W
ψJT Junction-to-top characterization parameter 18.2 1.6 4.7
ψJB Junction-to-board characterization parameter 53.8 22.8 114.4
θJC(bottom) Junction-to-case(bottom) thermal resistance N/A N/A N/A
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
THERMAL INFORMATION: OPA4171 OPA4171
THERMAL METRIC(1) D (SO) PW (TSSOP) UNITS
14 PINS 14 PINS
θJA Junction-to-ambient thermal resistance 93.2 106.9
θJC(top) Junction-to-case(top) thermal resistance 51.8 24.4
θJB Junction-to-board thermal resistance 49.4 59.3 °C/W
ψJT Junction-to-top characterization parameter 13.5 0.6
ψJB Junction-to-board characterization parameter 42.2 54.3
θJC(bottom) Junction-to-case(bottom) thermal resistance N/A N/A
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
4Copyright ©20102011, Texas Instruments Incorporated
1
2
3
5
4
V+
OUT
IN+
V-
IN-
1
2
3
4
8
7
6
5
V+
OUTB
-INB
+INB
OUTA
-INA
+INA
V-
1
2
3
5
4
V+
-IN
OUT
V-
+IN
1
2
3
4
14
13
12
11
OUTD
-IND
+IND
V-
OUTA
-INA
+INA
V+
5
6
7
10
9
8
+INC
-INC
OUTC
+INB
-INB
OUTB
1
2
3
4
8
7
6
5
NC(1)
V+
OUT
NC(1)
NC(1)
-IN
+IN
V-
OPA171
OPA2171
OPA4171
www.ti.com
SBOS516C SEPTEMBER 2010REVISED JUNE 2011
PIN CONFIGURATIONS
DRL PACKAGE: OPA171 D, DCU, AND DGK PACKAGES: OPA2171
SOT-553 SO-8, VSSOP-8, AND MSOP-8
(TOP VIEW) (TOP VIEW)
DBV PACKAGE: OPA171
SOT23-5
(TOP VIEW) D AND PW PACKAGES: OPA4171
SO-14 AND TSSOP-14
(TOP VIEW)
D PACKAGE: OPA171
SO-8
(TOP VIEW)
(1) No internal connection.
Copyright ©20102011, Texas Instruments Incorporated 5
OPA171
OPA2171
OPA4171
SBOS516C SEPTEMBER 2010REVISED JUNE 2011
www.ti.com
TYPICAL CHARACTERISTICS
TABLE OF GRAPHS
Table 1. Characteristic Performance Measurements
DESCRIPTION FIGURE
Offset Voltage Production Distribution Figure 1
Offset Voltage Drift Distribution Figure 2
Offset Voltage vs Temperature Figure 3
Offset Voltage vs Common-Mode Voltage Figure 4
Offset Voltage vs Common-Mode Voltage (Upper Stage) Figure 5
Offset Voltage vs Power Supply Figure 6
IBand IOS vs Common-Mode Voltage Figure 7
Input Bias Current vs Temperature Figure 8
Output Voltage Swing vs Output Current (Maximum Supply) Figure 9
CMRR and PSRR vs Frequency (Referred-to Input) Figure 10
CMRR vs Temperature Figure 11
PSRR vs Temperature Figure 12
0.1Hz to 10Hz Noise Figure 13
Input Voltage Noise Spectral Density vs Frequency Figure 14
THD+N Ratio vs Frequency Figure 15
THD+N vs Output Amplitude Figure 16
Quiescent Current vs Temperature Figure 17
Quiescent Current vs Supply Voltage Figure 18
Open-Loop Gain and Phase vs Frequency Figure 19
Closed-Loop Gain vs Frequency Figure 20
Open-Loop Gain vs Temperature Figure 21
Open-Loop Output Impedance vs Frequency Figure 22
Small-Signal Overshoot vs Capacitive Load (100mV Output Step) Figure 23,Figure 24
No Phase Reversal Figure 25
Positive Overload Recovery Figure 26
Negative Overload Recovery Figure 27
Small-Signal Step Response (100mV) Figure 28,Figure 29
Large-Signal Step Response Figure 30,Figure 31
Large-Signal Settling Time (10V Positive Step) Figure 32
Large-Signal Settling Time (10V Negative Step) Figure 33
Short-Circuit Current vs Temperature Figure 34
Maximum Output Voltage vs Frequency Figure 35
Channel Separation vs Frequency Figure 36
6Copyright ©20102011, Texas Instruments Incorporated
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.1
1.2
1.3
2
OffsetVoltageDrift( V/ C)m °
PercentageofAmplifiers(%)
25
20
15
10
5
0
1
DistributionTakenFrom110Amplifiers
1.5
1.7
1.9
1.8
1.6
1.4
-1200
-1100
-1000
-900
-800
-700
-600
-500
-400
-300
-100
0
100
200
300
400
500
600
700
800
900
1000
1200
OffsetVoltage( V)m
PercentageofAmplifiers(%)
16
14
12
10
8
6
4
2
0
-200
1100
DistributionTakenFrom3500Amplifiers
600
400
200
0
200
400
600
800
-
-
-
-
OffsetVoltage( V)m
-75 -50 -25 0 25 150
Temperature( C)°
50 12510075
5TypicalUnitsShown
10000
8000
6000
4000
2000
0
2000
4000
6000
8000
10000
-
-
-
-
-
V ( V)m
OS
15.5 16 16.5 17 17.5 18 18.5
V (V)
CM
10TypicalUnitsShown
Normal
Operation V =+18.1V
CM
350
250
150
50
50
150
250
350
-
-
-
-
V ( V)m
OS
0 2 4 6 8 16 20
V (V)
SUPPLY
V = 1.35Vto 18V
10TypicalUnitsShown
±
SUPPLY ±
18141210
OPA171
OPA2171
OPA4171
www.ti.com
SBOS516C SEPTEMBER 2010REVISED JUNE 2011
TYPICAL CHARACTERISTICS
VS=±18V, VCM = VS/2, RLOAD = 10kΩconnected to VS/2, and CL= 100pF, unless otherwise noted.
OFFSET VOLTAGE PRODUCTION DISTRIBUTION OFFSET VOLTAGE DRIFT DISTRIBUTION
Figure 1. Figure 2.
OFFSET VOLTAGE vs TEMPERATURE OFFSET VOLTAGE vs COMMON-MODE VOLTAGE
Figure 3. Figure 4.
OFFSET VOLTAGE vs COMMON-MODE VOLTAGE
(Upper Stage) OFFSET VOLTAGE vs POWER SUPPLY
Figure 5. Figure 6.
Copyright ©20102011, Texas Instruments Incorporated 7
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
I andI (pA)
B OS
-20 -12 -6 0 6 20
V (V)
CM
12
-IB
+IB
-IOS
-18 18
V = 18.1V-
CM V =16V
CM
IB+
IB-
IOS
10000
1000
100
10
1
0
InputBiasCurrent(pA)
-75 -50 -25 0 25 150
Temperature( C)°
50 12510075
IB
IOS
18
OutputVoltage(V)
0 2 4 6 8 16
OutputCurrent(mA)
10 12 14
17
16
15
14.5
-14.5
-15
-16
-17
-18
- °40 C
+25 C°
+85 C°
+125 C°
140
120
100
80
60
40
20
0
Common-ModeRejectionRatio(dB),
Power-SupplyRejectionRatio(dB)
1 10 100 1k 10k 10M
Frequency(Hz)
100k 1M
+PSRR
-PSRR
CMRR
30
20
10
0
10
20
30
-
-
-
Common-ModeRejectionRatio( V/V)m
-75 -50 -25 0 25 150
Temperature( C)°
50 12510075
V =2.7V
S
V =4V
S
V =36V
S
3
2
1
0
1
2
3
-
-
-
Power-SupplyRejectionRatio( V/V)m
-75 -50 -25 0 25 150
Temperature( C)°
50 12510075
V =2.7Vto36V
S
V =4Vto36V
S
OPA171
OPA2171
OPA4171
SBOS516C SEPTEMBER 2010REVISED JUNE 2011
www.ti.com
TYPICAL CHARACTERISTICS (continued)
VS=±18V, VCM = VS/2, RLOAD = 10kΩconnected to VS/2, and CL= 100pF, unless otherwise noted.
IBAND IOS vs COMMON-MODE VOLTAGE INPUT BIAS CURRENT vs TEMPERATURE
Figure 7. Figure 8.
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT CMRR AND PSRR vs FREQUENCY
(Maximum Supply) (Referred-to Input)
Figure 9. Figure 10.
CMRR vs TEMPERATURE PSRR vs TEMPERATURE
Figure 11. Figure 12.
8Copyright ©20102011, Texas Instruments Incorporated
1 V/divm
Time(1s/div)
1000
100
10
1
VoltageNoiseDensity(nV/ )ÖHz
1 10 100 1k 10k 1M
Frequency(Hz)
100k
0.01
0.001
0.0001
0.00001
TotalHarmonicDistortion+Noise(%)
10 100 1k 10k 20k
Frequency(Hz)
TotalHarmonicDistortion+Noise(dB)
V =3V
BW=80kHz
OUT RMS
G=+1,R =10kW
L
G= 1,R =2k- W
L
-80
-100
-120
-140
0.1
0.01
0.001
0.0001
0.00001
TotalHarmonicDistortion+Noise(%)
0.01 0.1 1 10 20
OutputAmplitude(V )
RMS
-80
TotalHarmonicDistortion+Noise(dB)
BW=80kHz
G=+1,R =10kW
L
G= 1,R =2k- W
L
-100
-120
-140
0.65
0.6
0.55
0.5
0.45
0.4
0.35
I (mA)
Q
-75 -50 -25 0 25 150
Temperature( C)°
1251007550
OPA171
OPA2171
OPA4171
www.ti.com
SBOS516C SEPTEMBER 2010REVISED JUNE 2011
TYPICAL CHARACTERISTICS (continued)
VS=±18V, VCM = VS/2, RLOAD = 10kΩconnected to VS/2, and CL= 100pF, unless otherwise noted.
INPUT VOLTAGE NOISE SPECTRAL DENSITY vs
0.1Hz TO 10Hz NOISE FREQUENCY
Figure 13. Figure 14.
THD+N RATIO vs FREQUENCY THD+N vs OUTPUT AMPLITUDE
Figure 15. Figure 16.
QUIESCENT CURRENT vs TEMPERATURE QUIESCENT CURRENT vs SUPPLY VOLTAGE
Figure 17. Figure 18.
Copyright ©20102011, Texas Instruments Incorporated 9
180
135
90
45
0
45-
Gain(dB)
1 10 100 1k 10k 10M
Frequency(Hz)
1M100k
Phase
Gain
Phase( )°
180
135
90
45
0
-45
25
20
15
10
5
0
5
10
15
20
-
-
-
-
Gain(dB)
10k 100M
Frequency(Hz)
1M100k 10M
G=10
G=1
G= 1-
3
2.5
2
1.5
1
0.5
0
A ( V/V)m
OL
-75 150
Temperature( C)°
-25-50 0
5TypicalUnitsShown
125100755025
V =2.7V
S
V =4V
S
V =36V
S
50
45
40
35
30
25
20
15
10
5
0
Overshoot(%)
0 100 200 300 400 500 600 700 800 900 1000
CapacitiveLoad(pF)
+18V
-18V
ROUT
CL
OPA171
RL
G=+1
R =0W
OUT
R =25W
OUT
R =50W
OUT
R =10kW
L
50
45
40
35
30
25
20
15
10
5
0
Overshoot(%)
0 100 200 300 400 500 600 700 800 900 1000
CapacitiveLoad(pF)
OPA171
R =
I10kW
ROUT
CL
RF=10kW
+18V
-18V
G= 1-
R =0W
OUT
R =25W
OUT
R =50W
OUT
OPA171
OPA2171
OPA4171
SBOS516C SEPTEMBER 2010REVISED JUNE 2011
www.ti.com
TYPICAL CHARACTERISTICS (continued)
VS=±18V, VCM = VS/2, RLOAD = 10kΩconnected to VS/2, and CL= 100pF, unless otherwise noted.
OPEN-LOOP GAIN AND PHASE vs FREQUENCY CLOSED-LOOP GAIN vs FREQUENCY
Figure 19. Figure 20.
OPEN-LOOP GAIN vs TEMPERATURE OPEN-LOOP OUTPUT IMPEDANCE vs FREQUENCY
Figure 21. Figure 22.
SMALL-SIGNAL OVERSHOOT vs CAPACITIVE LOAD SMALL-SIGNAL OVERSHOOT vs CAPACITIVE LOAD
(100mV Output Step) (100mV Output Step)
Figure 23. Figure 24.
10 Copyright ©20102011, Texas Instruments Incorporated
Output
Output
Time(100 s/div)m
5V/div
+18V
-18V
37VPP
SineWave
( 18.5V)±
OPA171
Time(5 s/div)m
5V/div
VIN
VOUT
2kW
20kW
VIN
VOUT
OPA171
G= 10-
+18V
-18V
Time(5 s/div)m
5V/div
VIN
VOUT
2kW
20kW
VIN
VOUT
OPA171
G= 10-
+18V
-18V
20mV/div
Time(1 s/div)m
+18V
-18V CL
RL
OPA171
G=+1
R =10k
C =100pF
W
L
L
Time(20 s/div)m
20mV/div
+18V
-18V
R 2kW
F=
R 2kW
I=
CL
OPA171
G= 1-
C =100pF
L
2V/div
Time(5 s/div)m
G=+1
R =10k
C =100pF
W
L
L
OPA171
OPA2171
OPA4171
www.ti.com
SBOS516C SEPTEMBER 2010REVISED JUNE 2011
TYPICAL CHARACTERISTICS (continued)
VS=±18V, VCM = VS/2, RLOAD = 10kΩconnected to VS/2, and CL= 100pF, unless otherwise noted.
NO PHASE REVERSAL POSITIVE OVERLOAD RECOVERY
Figure 25. Figure 26.
SMALL-SIGNAL STEP RESPONSE
NEGATIVE OVERLOAD RECOVERY (100mV)
Figure 27. Figure 28.
SMALL-SIGNAL STEP RESPONSE
(100mV) LARGE-SIGNAL STEP RESPONSE
Figure 29. Figure 30.
Copyright ©20102011, Texas Instruments Incorporated 11
Time(4 s/div)m
2V/div
G= 1
R =10k
C =100pF
-
W
L
L
10
8
6
4
2
0
2
4
6
8
10
-
-
-
-
-
DFromFinalValue(mV)
0 36
Time( s)m
84 28 3224201612
12-BitSettling
( 1/2LSB= 0.024%)± ±
G= 1-
10
8
6
4
2
0
2
4
6
8
10
-
-
-
-
-
DFromFinalValue(mV)
0 36
Time( s)m
84 28 3224201612
12-BitSettling
( 1/2LSB= 0.024%)± ±
G= 1-
50
45
40
35
30
25
20
15
10
5
0
I (mA)
SC
-75 -50 -25 0 25 150
Temperature( C)°
50 125
I ,Source
SC
10075
I ,Sink
SC
15
12.5
10
7.5
5
2.5
0
OutputVoltage(V )
PP
10k 100k 1M 10M
Frequency(Hz)
V = 15V±
S
V = 5V±
S
V = 1.35V±
S
Maximumoutputvoltagewithout
slew-rateinduceddistortion.
-60
70
80
90
100
110
120
-
-
-
-
-
-
ChannelSeparation(dB)
10 100 1k 10k 100k
Frequency(Hz)
OPA171
OPA2171
OPA4171
SBOS516C SEPTEMBER 2010REVISED JUNE 2011
www.ti.com
TYPICAL CHARACTERISTICS (continued)
VS=±18V, VCM = VS/2, RLOAD = 10kΩconnected to VS/2, and CL= 100pF, unless otherwise noted.
LARGE-SIGNAL SETTLING TIME
LARGE-SIGNAL STEP RESPONSE (10V Positive Step)
Figure 31. Figure 32.
LARGE-SIGNAL SETTLING TIME
(10V Negative Step) SHORT-CIRCUIT CURRENT vs TEMPERATURE
Figure 33. Figure 34.
MAXIMUM OUTPUT VOLTAGE vs FREQUENCY CHANNEL SEPARATION vs FREQUENCY
Figure 35. Figure 36.
12 Copyright ©20102011, Texas Instruments Incorporated
Output
Output
Time(100 s/div)m
5V/div
+18V
-18V
37VPP
SineWave
( 18.5V)±
OPA171
OPA171
OPA2171
OPA4171
www.ti.com
SBOS516C SEPTEMBER 2010REVISED JUNE 2011
APPLICATION INFORMATION
The OPAx171 family of operational amplifiers provide This device can operate with full rail-to-rail input
high overall performance, making them ideal for many 100mV beyond the top rail, but with reduced
general-purpose applications. The excellent offset performance within 2V of the top rail. The typical
drift of only 2µV/°C provides excellent stability over performance in this range is summarized in Table 2.
the entire temperature range. In addition, the device
offers very good overall performance with high PHASE-REVERSAL PROTECTION
CMRR, PSRR, and AOL. As with all amplifiers, The OPAx171 family has an internal phase-reversal
applications with noisy or high-impedance power protection. Many op amps exhibit a phase reversal
supplies require decoupling capacitors close to the when the input is driven beyond its linear
device pins. In most cases, 0.1µF capacitors are common-mode range. This condition is most often
adequate. encountered in noninverting circuits when the input is
driven beyond the specified common-mode voltage
OPERATING CHARACTERISTICS range, causing the output to reverse into the opposite
The OPAx171 family of amplifiers is specified for rail. The input of the OPAx171 prevents phase
operation from 2.7V to 36V (±1.35V to ±18V). Many reversal with excessive common-mode voltage.
of the specifications apply from 40°C to +125°C. Instead, the output limits into the appropriate rail. This
Parameters that can exhibit significant variance with performance is shown in Figure 37.
regard to operating voltage or temperature are
presented in the Typical Characteristics.
GENERAL LAYOUT GUIDELINES
For best operational performance of the device, good
printed circuit board (PCB) layout practices are
recommended. Low-loss, 0.1µF bypass capacitors
shou