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SWITCHES - MATRIX - SMT
12 - 120
The HMC596LP4(E) switch can operate as a 4x4 switch by
connecting the 4 inputs of two switches directly together.
The VL, VH, HL, and HH inputs of the rst switch should be
connected to the second switch, as illustrated.
Mirror image switch performance can be realized by invert-
ing the HV1 & HV2 logic control signals of one of the
HMC596LP4(E) switches.
The input loading impedance of two switches in parallel
should be 31.25 ohms. The output loading impedance on
each output should be 75 ohms. The interconnect RF line
between the switch’s inputs should be an RF trace with a
characteristic impedance of 62.5 ohms. This will allow the
switch to remain matched in all possible switch states.
The HMC596LP4(E) does not provide output to output (OP1
to OP2) isolation. For this reason, it is recommended that
external ampli ers should be used at each output. The
ampli er’s reverse isolation will provide output to output isolation, if this is necessary.
Each HMC596LP4(E) requires DC blocking capacitors on ALL RF input and output ports.
Switch Application Circuit for 4x4 Switch Matrix
Pin Descriptions
Pin Number Function Description Interface Schematic
1, 2, 4 - 6, 13 - 15,
17, 18 GND Package bottom has exposed metal paddle
that must be connected to PCB RF ground.
3, 16, 19, 24 HL, VL, VH, HH
Switch RF Input. This pin is DC coupled and should be DC
blocked externally using a series capacitor. Select value
based on lowest frequency of operation.
7, 12 OP1, OP2
Switch RF Input. This pin is DC coupled and should be DC
blocked externally using a series capacitor. Select value
based on lowest frequency of operation.
8HV2
Control Inputs. See truth and control voltage table.
9TONE2
10 TONE1
11 HV1
20, 22, 23 N/C Not connected.
21 Vdd Supply Voltage
HMC596LP4 / 596LP4E
v01.0409
SMT CMOS 4x2 SWITCH
MATRIX, 0.2 - 3.0 GHz