H-Family AC-DC Converters <100 W Benign Environment
10 - 62 Edition 2/96 - © Melcher AG
MELCHER
The Power Partners.
10.3
50 W AC-DC Converters H-Family
Single output: series 110H/230H1000
Dual output: series 110H/230H2000
Triple output: series 110H/230H3000
• Two input voltage r anges suitable for most AC mains
• Efficient input filter and built-in surge and transient
suppression circuitry
•3 kV
rms input to output electric strength test
• Outputs individually isolated
• Outputs fully protected against overload
Safety according to IEC 950
LGA
C
Table of Contents...........................................Page
Description ..............................................................10 - 62
Type Survey ............................................................10 - 63
Safety and Installation Instructions .........................10 - 63
Functional Description ............................................10 - 64
Electrical Input Data................................................ 10 - 65
Electrical Output Data ............................................. 10 - 66
EMC and Immunity to Input Transients ................... 10 - 69
Supplementary Data ............................................... 10 - 70
Description of Options............................................. 10 - 71
Immunity to Environmental Conditions.................... 10 - 75
Mechanical Data .....................................................10 - 76
Type Key and Product Marking ............................... 10 - 77
Description
The H-family of AC-DC converters represents a broad and
flexible range of power supplies for use in advanced elec-
tronic systems. Features include high efficiency, reliability
and low output voltage noise.
The conv erter inputs are protected against surges and tran-
sients occuring at the source lines. An input over- and
undervoltage cut-out circuitry disab les the outputs if the in-
put voltage is outside the specified range. The modules in-
clude an inrush current limitation preventing circuit break-
ers and fuses from being damaged at switch-on.
All outputs are open- and short-circuit proof and are pro-
tected against ov ervoltages by means of b uilt-in suppressor
diodes. The outputs can be inhibited by a logic signal ap-
plied to the connector pin 2(i). If the inhibit function is not
used pin 2 should be connected with pin 23 to enable the
outputs.
LED indicators displa y the status of the conv erter and allow
visual monitoring of the system at any time.
Full input to output, input to case, output to case and output
to output isolation is provided. The modules are designed
and built according to the international safety standard
IEC 950 and have been approved by the safety agencies
LGA (Germany) and UL (USA). The UL Mark for Canada
has been officially recognized be regulator y authorities in
provinces across Canada.
The case design allows operation at nominal load up to
50°C in a free air ambient temperature. If forced cooling is
provided, the ambient temperature may exceed 50 °C but
the case temperature should remain below 8 0°C under all
conditions.
A temperature sensor generates an inhibit signal which
disab les the outputs if the case temperature
T
C exceeds the
limit. The outputs are automatically re-enabled when the
temperature drops below the limit.
Various options are available to adapt the converters to in-
dividual applications.
The modules may either be plugged into 19 inch rack sys-
tems according to DIN 41494, or be chassis mounted.
Case: aluminium, black finish, self cooling.
Dimensions: 38.7 × 111.2 × 168.5 mm. Weight: 770 g
Benign Environment AC-DC Converters <100 W H-Family
Edition 2/96 - © Melcher AG 10 - 63
MELCHER
The Power Partners.
10.3
Type Survey
Options see "Descriptions of Options"
Table 1: Type survey
Output 1 Output 2 Output 3 Input Voltage Range and Efficiency 1 Option
U
o nom
I
o nom
U
o nom
I
o nom
U
o nom
I
o nom
U
i min...
U
i max
η
min
U
i min...
U
i max
η
min
V DC A V DC A V DC A 85...132 V AC %187...255 V AC %
47...63 Hz 47...63 Hz
5.1 8.0 110H1001-2R 74 230H1001-2R 74 V2, V3
12.0 4.0 110H1301-2R 81 230H1301-2R 81 D1...D8
15.0 3.4 110H1501-2R 83 230H1501-2R 82
24.0 2.0 110H1601-2R 83 230H1601-2R 82
48.0 1.0 110H1901-2R 85 230H1901-2R 85
12.0 2.0 12.0 2.0 110H2320-2 81 230H2320-2 81
15.0 1.7 15.0 1.7 110H2540-2 82 230H2540-2 82
5.1 5.0 12.0 0.7 12.0 0.7 110H3020-2 79 230H3020-2 78
5.1 5.0 15.0 0.6 15.0 0.6 110H3040-2 79 230H3040-2 79
1Efficiency measured at
U
i nom and
I
o nom
Safety and Installation Instructions
Safety
If the output circuit of an AC-DC converter is operator-ac-
cessible according to the IEC 950 related safety standards,
it shall be an SELV circuit (Safety Extr a Lo w V oltage circuit,
i.e. a circuit, separated from mains by at least basic insula-
tion, that is so designed and protected such that under nor-
mal and single fault conditions, the voltage between any
two conductors and between any conductor and earth does
not exceed 60 V DC).
In the following section an interpretation is provided of the
IEC 950 safety standard with respect to the safety status of
the output circuit. Howev er , it is the sole responsibility of the
installer or user to assure the compliance with the relevant
and applicable safety standards:
If the A C-DC converter is installed according to the rele v ant
safety regulations its outputs are considered to be SELV
circuits up to a nominal output voltage of 36 V.
For safety reasons, the modules must be wired via the
f emale connector H11 (according to DIN 41612 see sec-
tion "Accessories") in order to meet national and interna-
tional safety requirements!
The connector protective earthing pin is leading. During the
production process, all transformers and each of the fully
assembled modules are individually tested for electric
strength and earth continuity (see "Supplementary Data").
All electric strength tests are performed as factory tests.
Installation Instruction
Installation of the power supply must strictly follow the na-
tional safety regulations. To observe the safety require-
ments according to EN 60950/IEC 950, the module shall be
connected via the female connector type H11 see section
"Accessories". Other installation methods may not meet the
safety requirements. The modules do not incorporate any
fuse. At least one e xternal fuse, installed in the wiring to the
input is essential! See "Fuse types".
Whenever the inhibit function is not required, pin 2 (i)
should be connected to pin 23 to enable the output(s).
Important Advice
Electric strength tests should not be repeated in the field. Improper test methods, for example overshooting or oscillating
test voltages, voltage slopes exceeding 1 k V/µs, internal Y-capacitors not carefully discharged, etc. can cause severe
damage to switching devices and ICs. Melcher AG will not honour any guarantee / warranty claims resulting from high
voltage field tests.
H-Family AC-DC Converters <100 W Benign Environment
10 - 64 Edition 2/96 - © Melcher AG
MELCHER
The Power Partners.
10.3
Table 2: H11 connector pin allocation
Electrical Determination H1000 H2000 H3000
Pin Ident Pin Ident Pin Ident
Inhibit control input 2 i 2 i 2 i
Safe Data or ACFAIL 5 D or V 5 D or V 5 D or V
Output voltage (positive) 8 Vo1+ 8 8 Vo3+
Output voltage (negative) 11 Vo1– 11 11 Vo3–
Control input + 14 R
Control input – 17 G
Output voltage (positive) 14 Vo2+ 14 Vo2+
Output voltage (negative) 17 Vo2– 17 Vo2–
Output voltage (positive) 20 Vo1+ 20 Vo1+ 20 Vo1+
Output voltage (negative) 23 Vo1– 23 Vo1– 23 Vo1–
Protective earthing 1 26 26 26
AC input voltage 29 N 29 N 29 N
AC input voltage 32 P 32 P 32 P
1Leading pin (pregrounding)
Degree of Protection
Condition: Female connector fitted to the unit
IP 40: All units, except those with options D or V incorporating potentiometer adjustment.
IP 20: Type fitted with options D or V incorporating potentiometer.
Fig. 1
AC-DC converter block diagram
Input filter
Current
limitation
output 3
Main control circuit
Current
limitation
output 2
29
11
8
23
5
26
32
17
14
20
2
Forward converter
approx. 70 kHz
Y
1
1
Y
Y
Y Y
VDR
14
17
1Single output modules H1000 (R input)
Functional Description
The input voltage is fed via an input filter, an inrush current
limiter and a bridge rectifier to the input capacitor. This ca-
pacitor sources a single transistor forward conver ter. Each
output is powered by a separate secondary winding of the
main transformer. The resultant voltages are rectified and
their r ipples smoothed by a power choke. The control logic
senses the main output voltage
U
o1 and generates, with re-
spect to the maximum admissible output currents, the con-
trol signal f or the primary switching transistor. This signal is
fed back via a coupling transformer.
The auxiliary outputs
U
o2 and
U
o3 are unregulated. Each
auxiliary output's current is sensed and transferred to the
main control circuit using a current tr ansformer . If one of the
outputs is driven into current limit, the other outputs will re-
duce their output voltages as well because all output cur-
rents are controlled by the same control circuit.
Benign Environment AC-DC Converters <100 W H-Family
Edition 2/96 - © Melcher AG 10 - 65
MELCHER
The Power Partners.
10.3
Electrical Input Data
General conditions:
–
T
A = 25°C, unless
T
C is specified. – Connector pins 2 and 23 interconnected, R input not connected.
Table 3: Input data
Input 110H 230H
Characteristics Conditions min typ max min typ max Unit
U
iInput voltage range
I
o = 0…
I
o nom 85 132 187 255 V AC
U
i nom Nominal input voltage
T
C min…
T
C max 110 230
I
iInput current
U
i nom,
I
o nom 1 0.78 0.44 Arms
S
i 0 No-load apparent input power:
U
i nom
Single output
I
o1,2,3 = 0 1 1.5 1 1.5 VA
Double output 7 9 7 9
Triple output 7 9 7 9
S
i inh Idle apparent input power inhibit mode 2.5 2.5
I
inr p 3 Peak inrush current
U
i
=
U
i max 80 42 A
t
inr r Rise time
R
S = 0 Ω 4200 300 µs
t
inr h Trailing edge half-life
T
C = 25°C1100 1600
R
iInput resistance
T
C = 25°C 450 800 mΩ
R
NTC 2 NTC resistance 2000 8000
C
iInput capacitance 250 570 50 270 µF
U
i abs Input voltage limits 0 142 0 284 V AC
without any damage
1With multiple output modules, the same condition for each output applies.
2Initial switch-on cycle. Subsequent switch on/off cycles increase the inrush current peak value.
3
I
inr p
=
U
i/(
R
s
+
R
i +
R
NTC)
4
R
S = source resistance.
Input Under-/Overvoltage Cut-out
If the input voltage remains below 0.6
U
i min or exceeds
1.1
U
i max (approx. values), an internally generated inhibit
signal disables the output(s). When checking this function
the absolute maximum input voltage rating
U
i abs must be
carefully considered (see table above).
Input fuse
The modules do not incorporate any fuse. External fuses in-
stalled in the wiring to the input are essential.
Table 4: Recommended fuse types (slow-blow)
Series Schurter type Part number
110H SPT 2.5 A 250 V 0001.2508
230H SPT 2.5 A 250 V 0001.2508
H-Family AC-DC Converters <100 W Benign Environment
10 - 66 Edition 2/96 - © Melcher AG
MELCHER
The Power Partners.
10.3
Electrical Output Data
General conditions
–
T
A = 25°C, unless
T
C is specified.
– Connector pins 2 and 23 interconnected, R input not connected.
Table 5a: Output data
Output
U
o nom 5.1 V 12 V 15 V
Characteristics Conditions min typ max min typ max min typ max Unit
U
o1 Output voltage
U
i nom,
I
o nom 1 5.00 5.20 11.76 12.24 14.70 15.30 V
U
o2/3 - 11.10 12.90 13.90 16.10
U
o2/3 0
U
i min...
U
i max - 13.80 17.25
I
o2/3 = 0
U
o1 L Overvoltage prot. Failure in 7.5 21 25
U
o2/3 L control circuit -2531
I
o nom Output current
U
i min...
U
i max see table 1
I
o L Output current
T
C min...
T
C max see fig. 2
limitation response
u
o1/2/3 Output voltage noise
U
i nom,
I
o nom 150 120 150 mVrms
BW = 20 MHz 200 360 450 mVpp
∆
U
o1 U Static line regulation
U
i min...
U
i nom ±20 ±50 ±25 ±120 ±30 ±150 mV
∆
U
o2/3 U
U
i nom...
U
i max -±80 ±240 ±100 ±300
I
o nom 1
∆
U
o1 I Static load regulation
U
i nom 15 50 35 120 45 150
I
o =
I
o nom...0 2
∆
U
o2/3 I - see fig. 3 see fig. 4
∆
U
o1 Ic Static cross load
U
i nom ±5±15 ±10 ±30 ±15 ±45
∆
U
o2/3 Ic regulation 3
I
o =
I
o nom...0 4 - see fig. 3 see fig. 4
Table 5b: Output data
Output
U
o nom 24 V 48 V
Characteristics Conditions min typ max min typ max Unit
U
o1 Output voltage
U
i nom,
I
o1 nom 23.52 24.48 47.04 48.96 V
U
o L Overvoltage prot.
I
o1 nom 41 85
I
o1 nom Output current
U
i min...
U
i max see table 1
U
o1 L Output current
T
C min...
T
C max see fig. 2
limitation response
u
o1 Output voltage noise
U
i nom,
I
o1 nom 240 480 mVrms
BW = 20 MHz 720 1440 mVpp
∆
U
o1 U Static line regulation
U
i min...
U
i nom ±30 ±240 ±30 ±480 mV
U
i nom...
U
i max
I
o1 nom
∆
U
o1 I Static load regulation
U
i nom 70 240 150 480
I
o1 =
I
o1 nom...0
1With multiple output modules, the same condition for each output applies.
2Condition for specified output. With multiple output modules, other output(s) loaded with constant current
I
o =
I
o nom.
3Condition for non-specified output, individually tested, other output(s) loaded with constant current
I
o =
I
o nom.
4Multiple output modules.
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10.3
Output Protection
Each output is protected against overvoltages which could
occur due to a failure of the internal control circuit. Voltage
suppressor diodes (which under worst case condition may
become a short circuit) provide the required protection. The
suppressor diodes are not designed to withstand externally
applied overvoltages. Overload at any of the outputs will
cause a shut-down of all outputs.
Fig. 2
Typical output voltage U
o
versus output currents
I
o
Inhibit (i Input)
The outputs of the module may be enabled or disabled by
means of a logic signal (TTL, CMOS, etc.) applied to the
inhibit input. If the inhibit function is not required, connect
the inhibit pin 2 to pin 23 to enable the outputs (active low
logic, fail safe).
The reference for the inhibit signal is the negative pin of out-
put 1.
Fig. 5
Definition of inhibit voltage and current
Vo–
i
Vo+
I
inh
U
inh
N
P
U
o2/3
[V]
13
12
11
00.25 0.5 0.75 1.0
U
o2/3 0
I
o2/3
I
o2/3 nom
I
o1 nom
0.5 •
I
o1 nom
I
o1
= 0 A
U
o2/3
[V]
16
15
14
00.25 0.5 0.75 1.0
U
o2/3 0
I
o2/3
I
o2/3 nom
I
o1 nom
0.5 •
I
o1 nom
I
o1
= 0 A
Fig. 3
H2320/3020:
∆
U
o2/3
(typ.) versus I
o2/3
with different I
o1
Fig. 4
H2540/3040:
∆
U
o2/3
(typ.) versus I
o2/3
with different I
o1
Parallel and Series Connection
Main outputs of equal nominal voltage can be connected in
parallel. It is important to assure that the main output of a
multiple output module is forced to supply a minimum cur-
rent of 0.1 A to enable correct operation of its own auxiliary
outputs. Outputs one and two of a dual output unit may be
connected parallel without a minimum current requirement
at the main output. Outputs two and three of a triple output
unit can be connected in parallel.
In parallel operation, one or more of the outputs may oper-
ate continuously in current limit which will cause an in-
crease in case temperature. Consequently, a reduction of
the max. ambient temperature by 10 K is recommended.
Main or auxiliary outputs can be connected in series with
any other output of the same or another module. In series
connection, the maximum output current is limited by the
lowest current limit. Output ripple and regulation values are
added. Connection wiring should be kept as short as possi-
ble.
If output terminals are connected together in order to estab-
lish multi-voltage configurations, e.g. +5.1 V, ±12 V etc. the
common ground connecting point should be as close as
possible to the connector of the converter to avoid exces-
sive output ripple voltages.
Fig. 6
Typical inhibit current I
inh
versus inhibit voltage U
inh
1.6
0.8
0
-0.8
-50-40 20 40
U
inh [V]
I
inh [mA]
-30 0
-20 -10 10 30 50
2.0
1.2
0.4
-0.4
U
inh= 0.8 V
U
o = on
U
o = off
U
inh= 2.4 V
1.0
0
0.5
U
o
0.5
U
o nom
I
o
I
o nom
1.0 1.2
I
o nom
I
o1
I
o2,
I
o3
I
oL1
I
oL2,
I
oL3
0.95
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MELCHER
The Power Partners.
10.3
0
t
t
0
Inhibit
1
Output
0.1
U
o nom
t
0
1
U
i
t
r
t
f
Output Response
The reaction of the outputs is similar whether the input volt-
age is applied or the inhibit is switched low.
An output voltage overshoot will not occur when the module
is turned on or off.
Table 6: Inhibit data
Characteristics Conditions min typ max Unit
U
inh Inhibit input voltage causing switched on
U
i min...
U
i max –50 0.8 V DC
output voltage being… switched off 2.4 50
I
inh Inhibit current
U
inh = 0 –60 –100 –220 µA
Fig. 8
Output voltage control by means of the R input
Fig. 7
Output response as a function of input voltage (on/off
switching) or inhibit control
Table 7: Output response time
Type of Converter
t
r at
P
o = 0 and
t
f at
P
o =
P
o nom
t
r and
t
f at
P
o = 3/4
P
o nom
t
r at
P
o =
P
o nom Unit
typ max typ max typ max
H1001-2R 3 17 3 17 5 25 ms
H1301-2R 5 25 8 30 10 40
H1501-2R 3 17 5 25 15 50
H1601-2R 8 30 15 45 20 70
H1901-2R 35 100 50 150 85 230
H2320-2 10 40 15 50 25 80
H2540-2 8 30 10 40 20 60
H3020-2 30 85 45 130 75 210
H3040-2 20 70 30 90 50 150
Programmable Voltage (R Input)
As a standard feature single output modules offer an ad-
justable output voltage identified by letter R in the type des-
ignation. The control input R (pin 14) accepts either a con-
trol voltage
U
ext or a resistor
R
ext to adjust the desired out-
put voltage. When not connected, the control input auto-
matically sets the output voltage to
U
o nom. The control input
is protected against external overvoltage up to 8 V max.
a) Adjustment by means of an external control voltage
U
ext
between pin 14 (R) and pin 17 (G):
The control voltage range is 0...2.75 V and allows an
adjustment in the range of approximately
U
o = 0...110%
U
o nom.
U
o
U
ext ≈ ––––––– • 2.5 V
U
o nom
b) Adjustment by means of an external resistor:
Depending upon the value of the required output volt-
age, the resistor shall be connected
either: Between pin 14 and pin 17 (
U
o <
U
o nom) to
achieve an output voltage adjustment range of approx.
U
o = 0...100%
U
o nom
U
o
R
ext ≈ 4 kΩ • ––––––––
U
o nom -
U
o
or: Between pin 14 and pin 20 (
U
o >
U
o nom) to achieve
an output voltage adjustment range of approximately
U
o = 100...110% of
U
o nom
(
U
o - 2.5 V)
R'
ext ≈ 4 kΩ • ––––––––––––––––
2.5 V•(
U
o/
U
o nom - 1)
For output voltages
U
o >
U
o nom, the minimum input voltage
according to "Electrical Input Data" increases proportionally
to
U
o/
U
o nom.
Warning
The value of
R'
ext should never be less than 47 kΩ to avoid
damage to the unit! R inputs may be parallel connected, but
1/Rtot = 1/R1 + 1/R2 +.... should be considered.
Conditions:
R input not used. For multiple output modules the figures indicated in the table above relate to the output which reacts
slowest. All outputs are resistively loaded. Variation of the input voltage within
U
i min...
U
i max does not influence the values.
20
32 23
29
R
Vo1+
Vo1–
G
+
U
ext
20
14
32 23
R
Vo1+
Vo1–
G
R
ext
R'
ext
17
17
14
–
4 kΩ2.5 V
29
control
circuit
4 kΩ2.5 V
control
circuit
Vi+
Vi–
Vi+
Vi–
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10.3
Table 8b: R'
ext
for U
o
> U
o nom
(conditions: U
i nom
, I
o nom
, rounded up to resistor values E 96); R
ext
=
∞
U
o nom = 5.1 V
U
o nom = 12 V
U
o nom = 15 V
U
o nom = 24 V
U
o nom = 48 V
U
o [V]
R'
ext [kΩ]
U
o [V]
R'
ext [kΩ]
U
o [V]
R'
ext [kΩ]
U
o [V]
R'
ext [kΩ]
U
o [V]
R'
ext [kΩ]
5.15 464 12.1 1780 15.2 1470 24.25 3160 48.5 6810
5.20 215 12.2 909 15.4 750 24.50 1620 49.0 3480
5.25 147 12.3 619 15.6 511 24.75 1100 49.5 2370
5.30 110 12.4 464 15.8 383 25.00 825 50.0 1780
5.35 90.9 12.5 383 16.0 332 25.25 715 50.5 1470
5.40 78.7 12.6 316 16.2 274 25.50 590 51.0 1270
5.45 68.1 12.7 274 16.4 237 25.75 511 51.5 1100
5.50 61.9 12.8 249 16.5 226 26.00 453 52.0 953
13.0 200 26.25 402 52.5 845
13.2 169 26.40 383 52.8 806
Table 8a: R
ext
for U
o
< U
o nom
(conditions: U
i nom
, I
o nom
, rounded up to resistor values E 96); R'
ext
=
∞
U
o nom = 5.1 V
U
o nom = 12 V
U
o nom = 15 V
U
o nom = 24 V
U
o nom = 48 V
U
o [V]
R
ext [kΩ]
U
o [V]
R
ext [kΩ]
U
o [V]
R
ext [kΩ]
U
o [V]
R
ext [kΩ]
U
o [V]
R
ext [kΩ]
0.5 0.432 2.0 0.806 2.0 0.619 4.0 0.806 8.0 0.806
1.0 0.976 3.0 1.33 4.0 1.47 6.0 1.33 12.0 1.33
1.5 1.65 4.0 2.0 6.0 2.67 8.0 2.0 16.0 2.0
2.0 2.61 5.0 2.87 8.0 4.53 10.0 2.87 20.0 2.87
2.5 3.83 6.0 4.02 9.0 6.04 12.0 4.02 24.0 4.02
3.0 5.76 7.0 5.62 10.0 8.06 14.0 5.62 28.0 5.62
3.5 8.66 8.0 8.06 11.0 11.0 16.0 8.06 32.0 8.06
4.0 14.7 9.0 12.1 12.0 16.2 18.0 12.1 36.0 12.1
4.5 30.1 10.0 20.0 13.0 26.1 20.0 20.0 40.0 20.0
5.0 200.0 11.0 44.2 14.0 56.2 22.0 44.2 44.0 44.2
Phenomenon
Standard
Level
Value
applied
Waveform
Source
impedance
Test
procedure
In operation
Performance
Electromagnetic Immunity
Table 9: Immunity type tests
Electrostatic IEC 801-2 2 contact discharge 4000 Vp1/50 ns 330 Ω10 positive and yes 2
discharge (1991-04) to case, 10 negative
Electric field IEC 801-3 2 antenna in 3 V/m sine wave mo- 26…1000 MHz yes 2
(1984) 1m distance dulated w. 1 kHz
Fast transient/ IEC 801-4 1 i/c, +i/–i 500 Vpbursts of 5/50 ns 50 Ω1 min positive yes 2
burst (1988) 5 kHz rep. rate 1 min negative
transients with bursts per
15 ms burst coupling mode
duration and a
300 ms period
Transient IEC 801-5 1 i/c 500 Vp1.2/50 µs 12 Ω5 pos. and 5 neg. yes 1
(Draft 1993-01 ) +i/–i 500 Vp2 Ωimpulses per
coupling mode
1Normal operation, no deviation from specifications
2Normal operation, temporary deviation from specs possible
3i = input, o = output, c = case
Coupling
mode 3
typically occur in most installations. The H-Family has been
successfully tested to the following specifications:
EMC and Immunity to Input Transients
A metal oxide VDR together with an input filter form an ef-
fective protection against input transient voltages which
H-Family AC-DC Converters <100 W Benign Environment
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MELCHER
The Power Partners.
10.3
Electromagnetic Emissions
Table 10: Emissions at U
i nom
and I
o nom
Series Standard
EN 55011, 1991 1
EN 55022, 1987 2
≤30 MHz ≥30 MHz
110H <B <B
230H <B <B
Table 11: Electric strength test voltage, insulation resistance, clearance and creepage distances
Characteristic Input to output Input to case Output to case Output to output Unit
Values according to IEC 950
Electric strength DC: 1 s 4243 1 2122 707 300 V
test voltage AC: 50 Hz, 1 min 3000 1 1500 500 200
Insulation resistance at 500 V DC ≥300 ≥300 ≥100 – MΩ
Clearance and 4.0 2.0 1.0 0.9 mm
creepage distances
1Only subassemblies performance in accordance with IEC 950
Display Status of LEDs
U
o1 > 0.95…0.98
U
o1 adj
U
i max
U
i ov
U
i min
U
i uv
U
i
U
i abs
OKi
U
o1 > 0.95…0.98
U
o1 adj
I
o nom
I
oL
I
o
OK
Io L
U
o1 < 0.95…0.98
U
o1 adj
T
C
i
T
C max
T
PTC threshold
U
i inh
i
+50 V
+0.8 V +2.4 V
-50 V
U
inh threshold
LED off LED on
LED Status undefined
Fig. 9
LEDs
"OK"
and
"i"
status versus input voltage
Conditions: I
o
≤
I
o nom
, T
C
≤
T
C max
, U
inh
≤
0.8 V
U
i uv
= undervoltage lock-out, U
i ov
= overvoltage lock-out
LED
"OK"
status versus output current
Conditions: U
i min...
U
i max
, T
C
≤
T
C max
, U
inh
≤
0.8 V
LED
"i"
versus case temperature
Conditions: U
i min...
U
i max
, I
o
≤
I
o nom
, U
inh
≤
0.8 V
LED
"i"
versus U
inh
Conditions: U
i min...
U
i max
, I
o
≤
I
o nom
, T
C
≤
T
C max
Supplementary Data Important Advice
Testing by applying AC voltages will result in high and
dangerous leakage currents through the Y-capacitors
(see fig. 1). Melcher will not honour any guarantee/war-
ranty claims resulting from high voltage field tests. Ref-
erence is also made to chapter: "Safety and Installation
Instructions".
Isolation
Input to output electric strength tests, in accordance with
the safety standards IEC 950, EN 60950, VDE 0805 and
EN 41003 are performed as factory tests and should not be
repeated in the field.
1Identical with CISPR 11 (1990-09) and VDE 0875 part 11 (1992-07)
2Identical with CISPR 22 (1985) and FCC Part 15, VDE 0878 part 3 (1989-11)
Benign Environment AC-DC Converters <100 W H-Family
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MELCHER
The Power Partners.
10.3
Description of Options
Table 12: Survey of options
Option Function of Option Characteristic
D 1Input and/or output undervoltage monitoring circuitry Safe data signal output (D1...D8)
V 1 2 Input and output undervoltage monitoring circuitry ACFAIL signal according to VME specifications ( V2, V3)
1Option D excludes option V and vice versa
2Only available with main output voltage
U
o1 = 5.1 V
Table 13: Undervoltage monitor functions
Output type Monitoring Minimum adjustment range Typical hysteresis
U
h [% of
U
t]
JFET NPN
U
i
U
o1 of threshold level
U
tfor
U
t min...
U
t max
U
ti
U
to
U
hi
U
ho
D1 D5 no yes – 3.5 V...48 V 1 – 2.3...1
D2 D6 yes no
U
i min...
U
i max 1– 3.0...0.5 –
D3 D7 yes yes
U
i min...
U
i max 1 0.95...0.98
U
o1 2 3.0...0.5 "0"
D4 D8 no yes
–
0.95...0.98
U
o1 2
–
"0"
1Threshold level adjustable by potentiometer (not recommended for mobile applications)
2Fixed value between 95% and 98% of
U
o1 (tracking)
JFET output (D1…D4):
Connector pin D is internally connected via the drain-
source path of a JFET (self-conducting type) to the nega-
tive potential of output 1.
U
D ≤ 0.4 V (logic low) corresponds
to a monitored voltage level (
U
i and/or
U
o1) <
U
t. The cur-
rent
I
D through the JFET should not exceed 2.5 mA. The
JFET is protected by a 0.5 W Zener diode of 8.2 V against
external overvoltages.
U
i,
U
o1 status D output,
U
D
U
i or
U
o1 <
U
tlow, L,
U
D ≤ 0.4 V at
I
D = 2.5 mA
U
i and
U
o1 >
U
t +
U
hhigh, H,
I
D ≤ 25 µA at
U
D = 5.25 V
5
23
20 Vo1+
Vo1–
D
U
D
≤ 6 V
I
D
29
32
R
p
N
P
Fig. 10
Options D1...D4, JFET output
NPN output (D5...D8):
Connector pin D is internally connected via the collector-
emitter path of a NPN transistor to the negative potential of
output 1.
U
D < 0.4 V (logic low) corresponds to a monitored
voltage level (
U
i and/or
U
o1) >
U
t
+
U
h
. The current
I
D
through the open collector should not exceed 20 mA. The
NPN output is not protected against external overvoltages.
U
D should not exceed 40 V.
U
i,
U
o1 status D output,
U
D
U
i or
U
o1 <
U
thigh, H,
I
D ≤ 25 µA at
U
D = 40 V
U
i and
U
o1 >
U
t +
U
hlow, L,
U
D ≤ 0.4 V at
I
D = 20 mA
20
23
5
Vo1+
Vo1–
D
U
D
I
D
29
32
R
p
N
P
Fig. 11
Options D5...D8, NPN output
Option D Undervoltage monitor
The input and/or output undervoltage monitoring circuit op-
erates independently of the built-in input undervoltage lock-
out circuit. A logic "low" (JFET output) or "high" signal (NPN
output)
is generated at pin 5 as soon as one of the moni-
tored voltages drops below the preselected threshold level
U
t. The retur n for this signal is Vo1– (pin 23). The D output
recovers when the monitored voltage(s) exceed(s)
U
t+
U
h.
The threshold level
U
t is either adjustable by a potentio-
meter , accessible through a hole in the front cov er, or is fac-
tory adjusted to a fixed value specified by the customer.
Option D exists in various versions D1...D8 as shown in the
following table.
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10.3
0
1
0.95
0
U
i [V DC]
0
t
t
t
t
low min4
t
low min4
t
high min
t
h1
U
ti +
U
hi
U
ti
Input voltage failure Switch-on cycle Input voltage sag Switch-on cycle and subsequent
input voltage failure
U
D high
U
D low
U
D
0
JFET
NPN
t
U
o1
U
o1 nom
U
D high
U
D low
U
D
t
low min4
t
h1
0
0
U
D high
U
D low
U
D
0
JFET
NPN
U
o1
U
D high
U
D low
U
D
t
low min4
U
to
Output voltage failure
0
I
D high
I
D low
I
D
t
0
I
D high
I
D low
I
D
t
t
t
t
2
33 33
U
o1 nom
U
to +
U
ho
Input voltage monitoring
Output voltage monitoring
Threshold tolerances and hysteresis:
If
U
i is monitored, the inter nal input voltage after the input
filter and rectifier is measured. Consequently this voltage
differs from the voltage at the connector pins b y the voltage
drop ∆
U
ti across the input filter. The value of ∆
U
ti depends
upon the input voltage range, threshold level
U
t, tempera-
ture and input current. The input current is a function of the
input voltage and the output power.
Fig. 13
Relationship between U
i
,
U
o1
,
U
D
,
I
D
and U
o1
/U
o nom
versus time.
1With output voltage monitoring the hold-up time
t
h = 0
2The D signal remains high if the D output is connected to
an external source.
3
t
low min = 40...200 ms, typically 80 ms
∆
U
ti
U
hi
U
D low
U
D
U
D high
U
i
P
o
=
P
o nom
P
o
= 0
P
o
= 0
U
ti
P
o
=
P
o nom
Fig. 12
Definition of U
ti, ∆
U
ti
and
U
hi
(JFET output)
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10.3
Formula for threshold level for desired value of
t
h:
2 •
P
o • (
t
h + 0.3 ms) • 100
U
ti = ––––––––––––––––––––– +
U
i min2
C
i min • η
where as:
C
i min = minimum internal input capacitance [mF], accord-
ing to table below
P
o= output power [W]
h
= efficiency [%]
t
h= hold-up time [ms]
U
i min = minimum input voltage [V]
U
ti = threshold level [V]
Remarks:
The threshold level
U
ti of option V2 and V3 is adjusted dur-
ing manufacture to a value according to table "Undervol-
tage monitor functions", section "Option D").
A decoupling diode should be connected in series with the
input to avoid the input capacitance discharging through
other loads connected to the same source voltage.
Option V ACFAIL signal (VME)
This option defines an undervoltage monitoring circuit
for the input or the input and main output voltage
(
U
o1 nom = 5.1 V only) equivalent to option D and generates
the ACFAIL signal (V signal) which conforms to the VME
standard. The low state level of the ACFAIL signal is speci-
fied at a sink current of
I
V = 48 mA to
U
V ≤ 0.6 V (open-col-
lector output of a NPN tr ansistor). The pull-up resistor f eed-
ing the open-collector output should be placed on the VME
backplane.
After the ACFAIL signal has gone low, the VME standard
requires a hold-up time
t
h of at least 4 ms before the 5.1 V
output drops to 4.875 V when the 5.1 V output is fully
loaded. This hold-up time
t
h is pro vided by the internal input
capacitance. Consequently the working input voltage and
the threshold le v el
U
ti should be adequately above the mini-
mum input voltage
U
i min of the converter so that enough
energy is remaining in the input capacitance.
Table 15: Undervoltage monitor functions
V output Monitoring Minimum adjustment range Typical hysteresis
U
h [% of
U
t]
(VME compatible)
U
i
U
o1 of threshold level
U
tfor
U
t min...
U
t max
U
ti
U
to
U
hi
U
ho
V2 yes no
U
i min...
U
i max 1– 3.0...0.5 -
V3 yes yes
U
i min...
U
i max 1 0.95...0.98
U
o1 2 3.0...0.5 "0"
1Threshold level adjustable by potentiometer (not recommended for mobile applications)
2Fixed value between 95% and 98% of
U
o1 (tracking), output undervoltage monitoring is not a requirement of VME standard
V output (V2, V3):
Connector pin V is internally connected to the open collec-
tor of a NPN transistor. The emitter is connected to the
negative potential of output 1.
U
V ≤ 0.6 V (logic low) corre-
sponds to a monitored voltage level (
U
i and/or
U
o1) <
U
t.
The current
I
V through the open collector should not exceed
50 mA. The NPN output is not protected against external
over voltages.
U
V should not exceed 80 V.
U
i,
U
o1 status V output,
U
V
U
i or
U
o1 <
U
tlow, L,
U
V ≤ 0.6 V at
I
V = 50 mA
U
i and
U
o1 >
U
t +
U
hhigh, H,
I
V ≤ 25 µA at
U
V = 5.1 V
20
23
5
Vo1+
Vo1–
V
U
V
I
V
N
29
32
R
p
P
Fig. 14
Output configuration of options V2 and V3
voltage(s) exceed(s)
U
t +
U
h. The threshold level
U
t is ad-
justable by a potentiometer accessible through a hole in the
front cover.
Versions V2 and V3 are available as shown below.
Option V operates independently of the built-in input under-
voltage lock-out circuit. A logic "low" signal is generated at
pin 5 as soon as one of the monitored voltages drops below
the preselected threshold le vel
U
t. The return for this signal
is V o1– (pin 23). The V output recovers when the monitored
Table 14: Factory potentiometer setting of U
ti
Types 110H 230H Unit
C
i min 0.25 0.05 mF
U
ti 94 200 V DC
t
h55ms
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The Power Partners.
10.3
3
5.1 V
4.875 V
0
U
i [V DC]
0
t
t
U
ti +
U
hi
U
ti
Input voltage failure Switch-on cycle Input voltage sag Switch-on cycle and subsequent
input voltage failure
U
V high
U
V low
U
V
0
V2
t
U
o1
0
U
V high
U
V low
U
V
0
V2
U
i
U
ti
4
Output voltage failure
0
U
V high
U
V low
U
V
3
U
ti +
U
hi
t
low min 2
t
low min 2
t
low min 2
33
4
4
U
V high
U
V low
U
V
0
V3
t
3
t
low min 2
t
low min 2
33
t
h 1
2.0 V
t
h 1
4
3
4
t
low min 2
V3
5.1 V
4.875 V
0
U
o1
2.0 V
Input voltage monitoring
Output voltage monitoring
Threshold tolerances and hysteresis:
If
U
i is monitored, the internal input voltage is measured af-
ter the input filter and rectifier. Consequently this voltage
differs from the voltage at the connector pins b y the voltage
drop ∆
U
ti across input filter and rectifier. The value of ∆
U
ti
depends upon the input voltage range, threshold level
U
t,
temperature and input current. The input current is a func-
tion of input voltage and output power.
Fig. 16
Relationship between U
i
, U
o1
, U
V
, I
V
and U
o1
/U
o nom
versus time.
1VME request: minimum 4 ms
2
t
low min = 40...200 ms, typically 80 ms
3
U
V level not defined at
U
o1 < 2.0 V
4The V signal drops simultaneously with the output voltage, if the
pull-up resistor
R
P is connected to Vo1+. The V signal remains
high if
R
P is connected to an external source.
∆
U
ti
U
hi
U
V low
U
V
U
V high
U
i
P
o
=
P
o nom
P
o
= 0
P
o
= 0
U
ti
P
o
=
P
o nom
Fig. 15
Definition of U
ti
,
∆
U
ti
and U
hi
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10.3
Immunity to Environmental Conditions
Table 16: Mechanical stress
Test Method Standard Test Conditions
Ca Damp heat DIN 40046 part 5 Temperature: 40± 2 °C
steady state IEC 68-2-3 Relative humidity: 93 +2/-3 %
Duration: 21 days
Unit not operating
Ea Shock DIN 40046 part 7 Acceleration amplitude: 15 gn = 147 m/s2
(half-sinusoidal) IEC 68-2-27 Bump duration: 11 ms
MIL-STD-810D section 516.3 Number of bumps: 18 (3 each direction)
Unit operating
Eb Continuous shock DIN 40046 part 26 Acceleration amplitude: 10 gn = 98 m/s 2
(half-sinusoidal) IEC 68-2-29 Bump duration: 16 ms
MIL-STD-810D section 516.3 Number of bumps: 6000 (1000 each direction)
Unit operating
Fc Vibration DIN 40046 part 8 Frequency (1 Oct/min): 10...150 Hz
(sinusoidal) IEC 68-2-6 Acceleration amplitude: 2 gn = 20 m/s2
MIL-STD-810D section 514.3 Test duration: 3.75 h (1.25 h each axis)
Unit operating
Thermal considerations
Table 17: Temperature specifications, values given are for an air pressure of 800...1200 hPa (800...1200 mbar)
Characteristic min max Unit
T
AStandard operational ambient temperature range -2 -10 50 °C
T
CStandard operational case temperature range -2, overtemp. lock-out (PTC) above
T
C max -10 80
T
SStorage temperature range -2 –25 100
Basically the available output power is limited by thermal
characteristics. Operation at higher temperatures with
nominal output currents is also possible if forced cooling
can be provided (heat sink, fan, etc.).
Example: Sufficient forced cooling allows
T
A max = 65°C. A
simple check of the case temperature
T
C (
T
C ≤ 80°C) at full
load ensures correct operation of the system (temperature
measurement point on the case see "Mechanical Data").
In general: For an ambient temperature of 65°C with only
convection cooling, the maximum permissible current for
each output is approx. 50% of it's nominal value.
0
10
20
30
40
50
60
70
80
40 50 60 70 80
I
o nom
[%]
T
A
[°C]
90
100
110
T
C max
I
o nom
each output
(convection cooling)
I
o nom
(forced cooling)
T
A min
Fig. 17
Output derating versus ambient temperature under con-
vection and forced cooling conditions
Table 18: MTBF
Values at specified Module Types Ground Benign Unit
Case Temperature 40°C
MTBF H1000 384'000 h
H2000 306'000
H3000 270'000
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MELCHER
The Power Partners.
10.3
Mechanical Data
Dimensions in mm. Tolerances ±0.3 mm unless otherwise indicated.
Fig. 18
Case H02, weight 770 g (approx.)
111.2
±0.8
88
(11.6)
168.5
±0.5
127
171.9 (DIN 41494)
20
100
±0.6
1.6
6TE
2
5
8
11
14
17
20
23
26
29
32
Male connector H 11 according to DIN 41 612
38.7
95
±0.5
Measurement point for
case temperature
T
C
M 3; depth = 4 mm
(chassis mount)
22
68
159.4
Mounting plane of
connector H11
25.40
30.48
2TE
7.09
17.25
Mounting holes for retaining clips V
12.17
103
3.27
20.5 12.1
±0.5
94.5
±0.1
0
31.5
±0.1
0
ø 3.5
ø 4.0
OK (LED green)
Inhibit i (LED red)
Potentiometer (option D or V)
Front plate
Main face Rear face
Back plate
European
Projection
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10.3
Type Key and Product Marking
Type Key 230 H 2 5 40 -2 R D V
Input voltage range
U
i: 85...132 V AC ........... 110
187...255 V AC ........... 230
Family ............................................................................. H
Number of outputs ...................................................... 1...3
Output 1,
U
o1 nom: 5.1 V ............... 0
12 V ............... 3
15 V ............... 5
24 V ............... 6
48 V ............... 9
Single output modules ............. 01
Output 2 and 3,
U
o2 nom,
U
o3 nom: 12 V ............. 20
15 V ............. 40
Ambient temperature range
T
A: -10…50°C ..............-2
(operational)
Output voltage control input (single output modules only) R
Options:
Save data signal (D1...D8, to be specified)..................... D1
ACFAIL signal (V2, V3, to be specified)...........................V1
1Option D excludes option V and vice versa
Example: 230H1501-2RD3: AC-DC converter, input voltage range 187...255 V AC, providing output with 15 V/3.4 A;
equipped with an output voltage control input and undervoltage monitoring.
Accessories: Front panels, female connectors, mounting facilities, etc. please refer to section "Accessories".
Product Marking (refer also to "Mechanical Data")
Main face: Basic type designation, applicable safety approval and recognition marks, warnings, pin allocation, Melcher
patents and company logo.
Front plate: Identification of LEDs and potentiometer.
Back plate: Specific type designation, input voltage range, nominal output voltage(s) and current(s), pin allocation of op-
tions and auxiliary functions, external fuse specification and degree of protection.
Rear face: Label with batch no., serial no. and data code comprising production site, modification status of the main PCB,
date of production. Confirmation of successfully passed final test.
