PE41901
Document Category: Product Specification
UltraCMOS® Image Reject Mixer, 10–19 GHz
©2015–2016, Peregrine Semiconductor Corporation. All rights reserved. • Headquarters: 9380 Carroll Park Drive, San Diego, CA, 92121
Product Specification DOC-66551-3 – (09/2016)
www.psemi.com
Features
Complete MMIC mixer solution
Double balanced high LO–RF isolation of 38 dB
Conversion loss of 10 dB
Image rejection of 25 dB
Ku band coverage and broad IF frequency range
support
Packaging – 24-lead 4 × 4 × 0.85 mm QFN
Applications
Very small aperture terminal (VSAT)
Point-to-point communication system
Test and measurement (T&M)
Product Description
The PE41901 is a passive double balanced, Ku band image reject mixer with high dynamic range performance
and high local oscillator (LO) isolation capable of operation up to 19 GHz. It can be used as an upconverter or a
downconverter. The PE41901 operate s with sin gle-ended signals on the radio frequen cy (RF) an d LO ports. The
intermediate frequency (IF) port accepts broadband quadrature signals from DC–4 GHz. The device includes
two mixers, an LO path 90° coupler and RF port baluns on a single die. Integrating this functionality on a single
die reduces LO leakage and improves LO–RF isolation while minimizing board space and design effort. In
addition, no external blocking capacitors are required if 0 VDC is present on the LO or RF pins.
The PE41901 image reject mixer is ideal for Ku band earth terminals such as very small aperture terminal
(VSAT) block upconverters, point-to-point microwave links and test and measurement (T&M) applications.
The PE41901 is manufactured on Peregrine’s UltraCMOS® process, a patented variation of silicon-on-insulator
(SOI) technology on a sapphire substrate, of fering the perf ormance of GaAs with th e economy and integration of
conventional CMOS.
Figure 1 • PE41901 Functional Diagram
IF1 IF2
RF
LO
90°
90° Coupler
PE41901
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Absolute Maximum Ratings
Exceeding absolute maximum ratings listed in Table 1 may cause permanent damage. Operation should be
restricted to the limits in Table 2. Operation between operating range maximum and absolute maximum for
extended periods may reduce reliability.
ESD Precautions
When handling this UltraCMOS device, observe the same precautions as with any other ESD-sensitive devices.
Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to
avoid exceeding the rating specified in Table 1.
Latch-up Immunity
Unlike conventional CMOS devices, UltraCMOS devices are immune to latch-up.
Recommended Operating Conditions
Table 2 lists the recommended operating conditions for the PE41901. Devices should not be operated outside
the recommended operating conditions listed below.
Table 1 Absolute Maximum Ratings for PE41901
Parameter/Condition Min Max Unit
RF input power, 50+10 dBm
IF input power, 50 +10 dBm
LO input power, 50+25 dBm
Maximum junction temperature +150 °C
Storage temperature range –65 +150 °C
ESD voltage HBM, all pins(1) 250 V
ESD voltage CDM, all pins(2) 1000 V
Notes:
1) Human body m ode l (M IL- ST D 883 M ethod 30 15 ).
2) Charged de vice m ode l ( JED EC JESD 22 -C10 1) .
Table 2 Recommended Operating Conditions for PE41901
Parameter Min Typ Max Unit
RF input power, PRF, 50+5 dBm
IF input power, PIF, 50+5 dBm
LO input power, PLO, 50+10 +20 dBm
Operating temperature range –40 +25 +105 °C
PE41901
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Electrical Specifications
Table 3 provides the PE41901 key electrical specifications at +25 °C (Z = 50), unless otherwise specified.
Table 3 PE41901 Electrical Specifications
Parameter Condition Min Typ Max Unit
RF frequency, fRF 10 19 GHz
IF frequency, fIF DC 4 GHz
LO frequency, fLO 12 19 GHz
Conversion loss
fRF = 14 GHz
PLO = +17 dBm
PIF = –5 dBm
fIF = 1 GHz, upper sideband (USB) and lower sideband (LSB)
fIF = 4 GHz, USB and LSB 10
11 11
12 dB
dB
Image rejection(1)
fRF = 14 GHz
PLO = +17 dBm
PIF = –5 dBm
fIF = 1 GHz, USB
fIF = 1 GHz, LSB
fIF = 4 GHz, USB
22
17
20
25
20
22
dB
dB
dB
LO to RF isolation fLO = 12 GHz, PLO = +1 7 dBm 35 38 dB
LO to IF isolation fLO = 12 GHz, PLO = +1 7 d B m 20 23 dB
RF return loss fRF = 14 GHz, PLO = +15 dBm, PIF/RF = 0 dBm 10 dB
IF return loss fIF = 1 GHz, PLO = +15 dBm, PIF/RF = 0 dBm 10 dB
LO return loss fLO = 12 and 14 GHz, PLO = 0 dBm 12 dB
Input 1dB compression
point(2) fRF = 14 GHz, fIF = 1 GHz, PLO = +17 dBm, USB and LSB 10 dBm
Input IP2 fRF = 14 GHz, fIF1 = 1 GHz, fIF2 = 1.01 GHz, PLO = +17 dBm, PIF = –5 dBm,
USB and LSB 45 dBm
Input IP3 fRF = 14 GHz, fIF1 = 1 GHz, fIF2 = 1.01 GHz, PLO = +17 dBm, PIF = –5 dBm,
USB and LSB 18 21 dBm
Notes:
1) Image rejection is m easu r ed in upco nversio n m od e. IF1 an d I F 2 q uadr at ure in pu t sig na ls ar e ge ne ra te d us ing a pair of ph ase locked signal
generators. Emp loyed m eth od e liminat es erro r s asso ciate d wit h tra dit io nal 9 hyb rid.
2) The input P1dB compre ssion po int is a linearity figure of mer it. Refer to Table 2 for the operating inpu t p ower (5 0).
PE41901
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Thermal Data
Psi-JT (JT), junction top-of-package, is a thermal
metric to estimate junction temperature of a device on
the customer application PCB (JEDEC JESD51-2).
JT = (TJ – TT)/P
where
JT = junction-to-top of package characterization
parameter, °C/W
TJ = die junction temperature, °C
TT = package temperature (top surface, in the
center), °C
P = power dissipated by device, Watts
MxN Spurious Outputs
Table 5 and Table 6 show the spurious outputs and
LO spurious harmonics of the PE41901.
Table 4 Thermal Data for PE41901
Parameter Typ Unit
JT 28 °C/W
JA, junction-to-ambient thermal resistance 75 °C/W
Table 5 Spurious Outputs(*)
nLO
mIF 01234
0 X 6 212016
1 23 X 36 49 X
2 58695262 X
3 476059 X X
4 281738 X X
Note: * Measured in upconversion mode: PRF = –23 dBm @ 14 GHz;
PIF = –10 dBm @ 4 GHz; PLO = +20 dBm @ 10 GHz,. All values in dBc
below RF level, measured at RF port.
Table 6 LO Spurious Harmonics(*)
nLO Spur at RF Port
LO Freq (GHz) 1234
10 (PRF = –32 dBm) X 4 14 10
12 (PRF = –25 dBm) X224X
14 (PRF = –25 dBm) X10X X
16 (PRF = –16 dBm) X16X X
18 (PRF = –17 dBm) X13X X
Note: * Measured in upconversion mode: PLO = +17 dBm. Values in
dBc below LO level, measured at RF port.
PE41901
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Typical Performance Data
Figure 2Figure 23 show the typical performance data at +25 °C, PLO = +17 dBm, PIF = –5 dBm (Z = 50),
unless otherwise specified.
Figure 2 • Conversion Loss vs USB/LSB, fIF = 1 GHz
-20
-18
-16
-14
-12
-10
-8
-6
-4
-2
0
10 11 12 13 14 15 16 17 18 19 20
Conversion Loss (dB)
RF Frequency (GHz)
USB LSB
Figure 3 • Conversion Loss vs USB/LSB, fIF = 4 GHz
-20
-18
-16
-14
-12
-10
-8
-6
-4
-2
0
10 11 12 13 14 15 16 17 18 19 20
Conversion Loss (dB)
RF Frequency (GHz)
USB LSB
PE41901
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Figure 4 • USB Conversion Loss vs Temperature, fIF = 1 GHz
-20
-18
-16
-14
-12
-10
-8
-6
-4
-2
0
10 11 12 13 14 15 16 17 18 19 20
Conversion Loss (dB)
RF Frequency (GHz)
-40 °C +25 °C +85 °C +105 °C
Figure 5 • LSB Conversion Loss vs Temperature, fIF = 1 GHz
-20
-18
-16
-14
-12
-10
-8
-6
-4
-2
0
10 11 12 13 14 15 16 17 18 19 20
Conversion Loss (dB)
RF Frequency (GHz)
-40 °C +25 °C +85 °C +105 °C
PE41901
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DOC-66551-3 – (09/2016) Page 7
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Figure 6 • Image Rejection vs USB/LSB, fIF = 1 GHz
0
5
10
15
20
25
30
35
40
10 11 12 13 14 15 16 17 18 19 20
Image Rejection (dB)
RF Frequency (GHz)
USB LSB
Figure 7 • Image Rejection vs USB/LSB, fIF = 4 GHz
0
5
10
15
20
25
30
35
40
10 11 12 13 14 15 16 17 18 19 20
Image Rejection (dB)
RF Frequency (GHz)
USB LSB
PE41901
Image Reject Mixer
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Figure 8 • USB Image Rejection vs Temperature, fIF = 1 GHz
0
5
10
15
20
25
30
35
40
10 11 12 13 14 15 16 17 18 19 20
Image Rejection (dB)
RF Frequency (GHz)
-40 °C +25 °C +85 °C +105 °C
Figure 9 • LSB Image Rejection vs Temperature, fIF = 1 GHz
0
5
10
15
20
25
30
35
40
10 11 12 13 14 15 16 17 18 19 20
Image Rejection (dB)
RF Frequency (GHz)
-40 °C +25 °C +85 °C +105 °C
PE41901
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Figure 10 • Input 1dB Compression Point (P1dB) vs USB/LSB, fIF = 1 GHz
0
2
4
6
8
10
12
14
16
18
20
10 11 12 13 14 15 16 17 18 19 20
Input P1dB (dBm)
RF Frequency (GHz)
USB LSB
Figure 11 • Input 1dB Compression Point (P1dB) vs USB/LSB, fIF = 4 GHz
0
2
4
6
8
10
12
14
16
18
20
10 11 12 13 14 15 16 17 18 19 20
Input P1dB (dBm)
RF Frequency (GHz)
USB LSB
PE41901
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Figure 12 • Input IP3 vs USB/LSB, fIF = 1 GHz
10
15
20
25
30
10 11 12 13 14 15 16 17 18 19 20
Input IP3 (dBm)
RF Frequency (GHz)
USB LSB
Figure 13 • Input IP3 vs USB/LSB, fIF = 4 GHz
5
10
15
20
25
30
10 11 12 13 14 15 16 17 18 19 20
Input IP3 (dBm)
RF Frequency (GHz)
USB LSB
PE41901
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Figure 14 • USB Input IP3 vs Temperature, fIF = 1 GHz
14
16
18
20
22
24
26
28
30
10 11 12 13 14 15 16 17 18 19 20
Input IP3 (dBm)
RF Frequency (GHz)
-40 °C +25 °C +85 °C +105 °C
Figure 15 • LSB Input IP3 vs Temperature, fIF = 1 GHz
16
18
20
22
24
26
28
30
10 11 12 13 14 15 16 17 18 19 20
Input IP3 (dBm)
RF Frequency (GHz)
-40 °C +25 °C +85 °C +105 °C
PE41901
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Figure 16 • USB Input IP3 vs Temperature, fRF = 14 GHz and fIF = 1 GHz
10
15
20
25
10 11 12 13 14 15 16 17
Input IP3 (dBm)
LO Drive (dBm)
-40 °C +25 °C +85 °C +105 °C
Figure 17 • LSB Input IP3 vs Temperature, fRF = 14 GHz and fIF = 1 GHz
10
15
20
25
10 11 12 13 14 15 16 17
Input IP3 (dBm)
LO Drive (dBm)
-40 °C +25 °C +85 °C +105 °C
PE41901
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Figure 18 • RF Return Loss vs Temperature, PLO = +15 dBm, PIF/RF = 0 dBm
-40
-35
-30
-25
-20
-15
-10
-5
0
10 11 12 13 14 15 16 17 18 19 20
Return Loss (dB)
RF Frequency (GHz)
-40 °C +25 °C +85 °C +105 °C
Figure 19 • IF Return Loss vs Temperature, PLO = +15 dBm, PIF/RF = 0 dBm
-25
-20
-15
-10
-5
0
0123456
Return Loss ( dB)
IF Frequency (GHz)
-40°C IF1 -40°C IF2 +25°C IF1 +25°C IF2
+85°C IF1 +85°C IF2 +105°C IF1 +105°C IF2
PE41901
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Figure 20 • LO Return Loss vs Temperature, PLO = 0 dBm
-50
-45
-40
-35
-30
-25
-20
-15
-10
-5
0
10 11 12 13 14 15 16 17 18 19 20
Return Loss (dB)
LO Frequency (GHz)
-40 °C +25 °C +85 °C +105 °C
Figure 21 • LO–IF Isolation vs IF Path
10
15
20
25
30
35
40
45
50
55
60
10 11 12 13 14 15 16 17 18 19 20
Ioslation (dB)
LO Frequency (GHz)
IF1 IF2
PE41901
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Figure 22 • LO–IF Isolation vs Temperature/IF Path
10
15
20
25
30
35
40
45
50
55
60
10 11 12 13 14 15 16 17 18 19 20
Isolation (dB)
LO Frequency (GHz)
-40 °C/IF1 -40 °C/IF2 +25 °C/IF1 +25 °C/IF2
+85 °C/IF1 +85 °C/IF2 +105 °C/IF1 +105 °C/IF2
Figure 23 • LO–RF Isolation vs Temperature
10
15
20
25
30
35
40
45
50
55
60
10 11 12 13 14 15 16 17 18 19 20
Isolation (dB)
LO Frequency (GHz)
-40 °C +25 °C +85 °C +105 °C
PE41901
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Evaluation Kit
The PE41901 evaluation board (EVB) was designed to ease customer evaluation of the PE41901 mixer . The RF,
IF and LO ports are connected through 50 transmission lines via SMA connectors J2, J3, J4 and J1, respec-
tively. A 50 through transmission line is available via SMA connectors J5 and J6, which can be used to de-
embed the loss of the PCB.
Please note that this is a generic PCB and is being used for multiple parts. Pin labeled VDD is GND. J25 is not
being used for the PE41901.
Figure 24 • Evaluation Kit Layout for PE41901
PE41901
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Typical Test Set Up
Figure 25 shows the simplified test circuit of the PE41901. The two IF inputs require a quadrature signal to be
applied. The figure shows a method of creating this signal using a 90° hybrid. When measuring the mixer, all
cable, connector and board losses must be calibrated and compensated for. The EVK includes a through trace
that can be used to calibrate out the board loss. The trace length is equivalent to two times the input or output
trace lengths.
Please note that 90° hybrids have limited bandwidth, so an appropriate hybrid must be selected for the IF range
being tested.
Figure 25 • Typical Test Set Up for PE41901
IF1
IF
IF2
IF2
2
L
LO
F
PE41901
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Pin Information
This section provides pinout information for the
PE41901. Figure 26 shows the pin map of this device
for the available package. Table 7 provides a
description for each pin.
Figure 26 • Pin Configuration (Top View)
Exposed
Ground Pad
GND
GND
IF2
GND
GND
GND
GND
GND
IF1
GND
GND
GND
GND
GND
RF
GND
GND
GND
GND
GND
LO
GND
GND
GND
1
3
4
14
13
5
6
2
7
9
10
11
12
15
16
8
24
23
22
21
20
19
18
17
Pin 1 Dot
Marking
Table 7 Pin Descriptions for PE41901
Pin No. Pin
Name Description
1, 2, 4–15,
17–20, 22,
24 GND Ground
3LO(1) LO port
16 RF(1) RF port
21 IF2(2) IF2 port
23 IF1(2) IF1 port
Pad GND Exposed pad. Ground for proper
operation
Notes:
1) The PE41901 d oes no t g en erat e a D C voltage o n t he LO or RF
pins. Consequent ly, DC blocking capacitors are not re quired on
these pins. If a DC voltage exists on th e LO o r RF pins du e t o
neighboring comp onents in the applicat ion circui t, DC blocking
capacitors should b e used t o p rote c t t he PE 419 01 .
2) IF1 and IF2 are 90 ° out of pha se.
PE41901
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DOC-66551-3 – (09/2016) Page 19
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Packaging Information
This section provides packaging data including the moisture sensitivity level, package drawing, package
marking and tape-and-reel information.
Moisture Sensitivity Level
The moisture sensitivity level rating for the PE41901 in the 24-lead 4 × 4 × 0.85 mm QFN package is MSL1.
Package Drawing
Top-Marking Specification
Figure 27 • Package Mechanical Drawing for 24-lead 4 × 4 × 0.85 mm QFN
Figure 28 • Package Marking Specifications for PE41901
TOP VIEW BOTTOM VIEW
SIDE VIEW
RECOMMENDED LAND PATTERN
A0.10 C
(2X)
C
0.10 C
0.05 C
SEATING PLANE
B
0.10 C
(2X)
0.10 C A B
0.05 C
ALL FEATURES
Pin #1 Corner
4.00
4.00
0.203
Ref.
0.85±0.05
0.05
2.70±0.05
0.50
0.25±0.05
(x24)
2.50
Ref.
0.40±0.05
(x24)
2.70±0.05
Chamfer
0.30 x 45°
(x20)
4.40
4.40
0.50
0.60
(x24) 0.30
(x24)
2.75
2.75
16
7
12
13 18
19
24
(x20)
=
YY =
WW =
ZZZZZZ =
Pin 1 indicator
Last two digits of assembly year
Assembly work week
Assembly lot code (maximum six characters)
41901
YYWW
ZZZZZZ
PE41901
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Tape and Reel Specification
Figure 29 • Tape and Reel Specifications for 24-lead 4 × 4 × 0.85 mm QFN
Device Orientation in Tape
Pin 1
T
K0 A0
B0
P0 P1 D1 A
Section A-A
A
Direction of Feed
D0
E
W0
P2
see note 3
see
note 1
F
see note 3
A0
B0
K0
D0
D1
E
F
P0
P1
P2
T
W0
4.35
4.35
1.10
1.50 + 0.10/ -0.00
1.50 min
1.75 ± 0.10
5.50 ± 0.05
4.00
8.00
2.00 ± 0.05
0.30 ± 0.05
12.00 ± 0.30
Notes:
1. 10 Sprocket hole pitch cumulative tolerance ±0.2
2. Camber in compliance with EIA 481
3. Pocket position relative to sprocket hole measured
as true position of pocket, not pocket hole
Dimensions are in millimeters unless otherwise specified
PE41901 Image Reject Mixer
Product Specification www.psemi.com DOC-66551-3 – (09/2016)
Document Categories
Advance Information
The product is in a formative or design stage. The datasheet contains
design target specifications for product development. Specifications
and features may change in any manner without notice.
Preliminary Specification
The datasheet contains prelimin ary data. Addition al data may be ad ded
at a later date. Peregrine reserves the right to change specifications at
any time withou t not ice in or der to supp ly th e b est po ssible pr oduct .
Product Specification
The datasheet contains final data. In the event Peregrine decides to
change the specifications, Peregrine will notify customers of the
intended changes by issuing a CNF (Customer Notification Form).
Product Brief
This document contains a shortened version of the datasheet. For the
full datasheet, contact sales@psemi.com.
Not Recommended for New Designs (NRND)
This product is in production but is not recommended for new designs.
End of Life (EOL)
This product is currently going through the EOL process. It has a
specific last-time buy date.
Obsolete
This product is discontinued. Orders are no longer accepted for this
product.
Sales Contact
For additional information, contact Sales at sales@psemi.com.
Disclaimers
The information in this document is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be
entirely at the user’s own risk. No patent rights or licenses to any circuits described in this document are implied or granted to any third party.
Peregrine’s products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to
support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death
might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in
such applications.
Patent Statement
Peregrine products are protected under one or more of the following U.S. patents: patents.psemi.com
Copyright and Trademark
©2015–2016, Peregrine Semiconductor Corporation. All rights reserved. The Peregrine name, logo, UTSi and UltraCMOS are registered trade-
marks and HaRP, MultiSwitch and DuNE are trademarks of Peregrine Semiconductor Corp.
Ordering Information
Table 8 lists the available ordering codes for the PE41901 as well as available shipping methods.
Table 8 Order Codes for PE41901
Order Codes Description Packaging Shipping Method
PE41901A-X PE41901 image reject mixer Green 24-lead 4 × 4 mm QFN 500 units/T&R
EK41901-01 Evaluation kit Evaluation kit 1/box