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© 2001
MOS I NTEGRATED CIRCUIT
µ
µµ
µ
PD29F032203AL-X
32M-BIT CMOS LOW-VOLTAGE DUAL OPERATION FLASH MEMORY
4M-WORD BY 8-BIT (BYTE MODE) / 2M-WORD BY 16-BIT (WORD MODE)
DATA SHEET
Document No. M14907EJ7V0DS00 (7th edition)
Date Published September 2002 NS CP (K)
Printed in Japan
The mark
shows major revised points.
Description
The
µ
PD29F032203AL-X is a flash memory organized of 33,554,432 bits and 71 sectors. Sectors of this memory
can be erased at a low voltage (2.7 to 3.3 V, 3.0 to 3.6 V) supplied from a single power source, or the contents of the
entire chip can be erased. Two modes of memory organization, BYTE mode (4,194,304 words × 8 bits) and W ORD
mode (2,097,152 words × 16 bits), are selectable so that the memory can be programmed in byte or word units.
The
µ
PD29F032203AL-X can be read while its contents are being erased or programmed. The memory cell is
divided into two banks. While sectors in one bank are being erased or programmed, data can be read from the other
bank thanks to the simultaneous execution architecture. The banks are 8M bits and 24M bits.
This flash memory comes in two types. The T type has a boot sector located at the highest address (sector) and the
B type has a boot sector at the lowest address (sector).
Because the
µ
PD29F032203AL-X enables the boot sector to be erased, it is ideal for storing a boot program. In
addition, program code that controls the flash memory can be also stored, and the program code can be
programmed or erased without the need to load it into RAM. Eight small sectors for storing parameters are provided,
each of which can be erased in 8K bytes units.
Once a program or erase command sequence has been executed, an automatic program or automatic erase
function internally executes program or erase and verification automatically.
Because the
µ
PD29F032203AL-X can be electrically erased or programmed by writing an instruction, data can be
reprogrammed on-board after the flash memory has been installed in a system, making it suitable for a wide range of
applications.
This flash memory is packed in a 48-pin PLASTIC TSOP(I) and 63-pin TAPE FBGA.
Features
Two bank organization enabling simultaneous execution of program / erase and read
Bank organization: 2 banks (8M bits + 24M bits)
Memory organization : 4,194,304 words × 8 bits (BYTE mode)
2,097,152 words × 16 bits (W ORD mode)
Sector organization : 71 sectors (8K bytes / 4K words × 8 sectors, 64K bytes / 32K words × 63 sectors)
2 types of sector organization
T type : Boot sector allocated to the highest address (sector)
B type : Boot sector allocated to the lowest address (sector)
3-state output
Automatic program
Program suspend / resume
Data Sheet M14907EJ7V0DS
2
µ
µµ
µ
PD29F032203AL-X
Unlock bypass program
Automatic erase
Chip erase
Sector erase (sectors can be combined freely)
Erase suspend / resume
Program / Erase completion detection
Detection through data polling and toggle bits
Detection through RY (/BY) pin
Sector group protection
Any sector group can be protected
Any protected sector group can be temporary unprotected
Sectors can be used for boot application
Hardware reset and standby using /RESET pin
Automatic sleep mode
Boot block sector protect by /WP (ACC) pin
Conforms to common flash memory interface (CFI)
Extra One Time Protect Sector provided
µ
PD29F032203AL Access time
ns (MAX.) Operating suppl y
voltage
V
Power supply current
(Acti ve mode)
mA (MAX.)
Standby c urrent
µ
A (MAX.)
Read Program / Erase
-A85TX, -A85BX 85 3.0 to 3.6 16 30 5
-B85TX, -B85BX 2.7 to 3.3
Operating ambient temperature: –25 to +85°C
Program / erase time
Program: 9.0
µ
s / byte (TYP.)
11.0
µ
s / word (TYP.)
Sector erase :
Program / erase cycle : 100,000 cycles
0.3 s (TYP.) (4K words sector), 0.5 s (TYP.) (32K words sector)
Program / erase cycle : 300,000 cycles
0.5 s (TYP.) (4K words sector), 0.7 s (TYP.) (32K words sector)
Program / erase cycle : 300,000 cycles (MIN.)
Data Sheet M14907EJ7V0DS 3
µ
µµ
µ
PD29F032203AL-X
Ordering Information
Part number Acc ess time Operating Boot sector Pack age
ns (MAX.) supply volt age
V
µ
PD29F032203ALGZ-A85TX-MJH 85 3.0 to 3.6 Top address (sector) 48-pin PLASTIC TSOP (I) (12 × 20)
(T type) (Normal bent )
µ
PD29F032203ALGZ-A85BX-MJH Bott om address
(sector)
(B type)
µ
PD29F032203ALF9-A85TX-BS2 Top address (sec t or) 63-pin TAPE FBGA (11 × 7)
(T type)
µ
PD29F032203ALF9-A85BX-BS2 B ot tom address
(sector)
(B type)
µ
PD29F032203ALGZ-B85TX-MJH 2.7 to 3.3 Top address (sector) 48-pin PLASTIC TSOP (I) (12 × 20)
(T type) (Normal bent )
µ
PD29F032203ALGZ-B85BX-MJH Bott om address
(sector)
(B type)
µ
PD29F032203ALF9-B85TX-BS2 Top address (sec t or) 63-pin TAPE FBGA (11 × 7)
(T type)
µ
PD29F032203ALF9-B85BX-BS2 B ot tom address
(sector)
(B type)
Remark For address organization of sectors, see section Sector Organization / Sector Address Table.
Data Sheet M14907EJ7V0DS
4
µ
µµ
µ
PD29F032203AL-X
Pin Configurations
/xxx indi cates active low si gnal.
48-pin PLASTIC TSOP (I) (12 ×
××
× 20) (Normal bent)
[
µ
µµ
µ
PD29F032203ALGZ-A85TX-MJH ]
[
µ
µµ
µ
PD29F032203ALGZ-A85BX-MJH ]
[
µ
µµ
µ
PD29F032203ALGZ-B85TX-MJH ]
[
µ
µµ
µ
PD29F032203ALGZ-B85BX-MJH ]
Marking Side
A15
A14
A13
A12
A11
A10
A9
A8
A19
A20
/WE
/RESET
NC
/WP (ACC)
RY (/BY)
A18
A17
A7
A6
A5
A4
A3
A2
A1
A16
/BYTE
GND
I/O15, A1
I/O7
I/O14
I/O6
I/O13
I/O5
I/O12
I/O4
VCC
I/O11
I/O3
I/O10
I/O2
I/O9
I/O1
I/O8
I/O0
/OE
GND
/CE
A0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
A0 to A20 : Address inputs
I/O0 to I/O14 : Data Inputs / Outputs
I/O15, A1 : Data 15 Input / output (WORD mode)
LSB address input (BYTE mode)
/CE : Chip Enable
/WE : Write Enable
/OE : Output Enable
/BYTE : Mode select
/RESET : Hardware reset input
RY (/BY) : Ready (Busy) output
/WP (ACC) : Write Protect (Accelerated) input
VCC : Supply Voltage
GND : Ground
NC Note : No Connection
Note Some signals can be applied because this pin is not connected to the inside of the chip.
Remark Refer to Package Drawings for the 1-pin index mark.
Data Sheet M14907EJ7V0DS 5
µ
µµ
µ
PD29F032203AL-X
63-pin TAPE FBGA (11 ×
××
× 7)
[
µ
µµ
µ
PD29F032203ALF9-A85TX-BS2]
[
µ
µµ
µ
PD29F032203ALF9-A85BX-BS2]
[
µ
µµ
µ
PD29F032203ALF9-B85TX-BS2]
[
µ
µµ
µ
PD29F032203ALF9-B85BX-BS2]
Top View
HGFEDC
Top View Bottom View
BA ABCDEFGH
A B C D E F
VSS
I/O9
I/O5
A7 /OE
I/O7
I/O4
I/O0A6
A18
A11
A8
A5 I/O8
I/O12
A13
A17
SA
/CEf
I/O10
VCCf
/WE VCCs
A16
I/O11
8
7
6
5
4
3
G H
RY(/BY)/RESET
A12
I/O6 I/O13A9
A15
A19
I/O14
/CE1s
I/O15, A-1
I/O1
A1A2
A4
A10
CIOs
I/O2
A0A3
2
1
CE2s A20
A14
/LB
CIOf
/WP(ACC)
/UB
I/O3
NC NC VSS
Top View Bottom View
HGFEDCBA HGFEDCBA
Top View
A0
I/O8
I/O6
A3 /CE
I/O15,A
1
I/O12
/OEA4
A6
A13
A9
A2 GND
I/O13
A14
A5
A16
I/O9
I/O11
/WE VCC
I/O3A18/WP(ACC)
A12
I/O7 I/O14A10A8
GND/BYTE
I/O0
A1
A11
I/O4
I/O1
/RESET NC
A15
A7
RY(/BY)
A17
I/O10
ABCDEFGH
NC NC
NCNC
NC NC
NCNC
MKLJ
MKLJMKLJ
8
7
6
5
4
3
2
1
8
7
6
5
4
3
2
1
NC NC NC NC
NC NC NC
I/O5
I/O2A20
A19
A0 to A20 : Address inputs
I/O0 to I/O14 : Data Inputs / Outputs
I/O15, A1 : Data 15 Input / output (WORD mode)
LSB address input (BYTE mode)
/CE : Chip Enable
/WE : Write Enable
/OE : Output Enable
/BYTE : Mode select
/RESET : Hardware reset input
RY (/BY) : Ready (Busy) output
/WP (ACC) : Write Protect (Accelerated) input
VCC : Supply Voltage
GND : Ground
NC Note : No Connection
Note Some signals can be applied because this pin is not connected to the inside of the chip.
Remark Refer to Package Drawings for the index mark.
INPUT / OUTPUT PIN FUNCTION
Refer to DUAL OPERATION FLASH MEMORY 32M BITS A SERIES Information (M14914E).
Data Sheet M14907EJ7V0DS
6
µ
µµ
µ
PD29F032203AL-X
Block Diagram
RY (/BY)
State
control
(Command
register)
Program / Erase
voltage generator
Bank / Sector
decoder
Address
buffers
X-decoder
Input / Output
buffers
SA / WC
SA / WC
Data latch
I/O0 to I/O15, A1
Y-decoder Y-gating
X-decoder Cell matrix
(Bank 2)
Cell matrix
(Bank 1)
Bank 2 address
Bank 1 address
Y-decoder Y-gating
VCC
GND
/RESET
/WP(ACC)
/WE
/BYTE
/CE
/OE
A0 to A20
Address latchAddress latch
Data Sheet M14907EJ7V0DS 7
µ
µµ
µ
PD29F032203AL-X
Sector Organization / Sector Address Table
[ -A85TX, -B85TX ] (1/2)
Bank Sector Address Sectors Sector Address Table
Organization Address Bank Address Table
K bytes / K words BYTE mode WORD mode A20 A19 A18 A17 A16 A15 A14 A13 A12
Bank 1 8/4 3FFFFFH 1FFFFFH FSA70 111111111
3FE000H 1FF000H
8/4 3FDFFFH 1FEFFFH FSA69 111111110
3FC000H 1FE000H
8/4 3FBFFFH 1FDFFFH FSA68 111111101
3FA000H 1FD000H
8/4 3F9FFFH 1FCFFFH FSA67 111111100
3F8000H 1FC000H
8/4 3F7FFFH 1FBFFFH FSA66 111111011
3F6000H 1FB000H
8/4 3F5FFFH 1FAFFFH FSA65 111111010
3F4000H 1FA000H
8/4 3F3FFFH 1F9FFFH FSA64 111111001
3F2000H 1F9000H
8/4 3F1FFFH 1F8FFFH FSA63 111111000
3F0000H 1F8000H
64/32 3EFFFFH 1F7FFFH FSA62 111110xxx
3E0000H 1F0000H
64/32 3DFFFFH 1EFFFFH FSA61 111101xxx
3D0000H 1E8000H
64/32 3CFFFFH 1E7FFFH FSA60 111100xxx
3C0000H 1E0000H
64/32 3BFFFFH 1DFFFFH FSA59 111011xxx
3B0000H 1D8000H
64/32 3AFFFFH 1D7FFFH FSA58 111010xxx
3A0000H 1D0000H
64/32 39FFFFH 1CFFFFH FSA57 111001xxx
390000H 1C8000H
64/32 38FFFFH 1C7FFFH FSA56 111000xxx
380000H 1C0000H
64/32 37FFFFH 1BFFFFH FSA55 110111xxx
370000H 1B8000H
64/32 36FFFFH 1B7FFFH FSA54 110110xxx
360000H 1B0000H
64/32 35FFFFH 1AFFFFH FSA53 110101xxx
350000H 1A8000H
64/32 34FFFFH 1A7FFFH FSA52 110100xxx
340000H 1A0000H
64/32 33FFFFH 19FFFFH FSA51 110011xxx
330000H 198000H
64/32 32FFFFH 197FFFH FSA50 110010xxx
320000H 190000H
64/32 31FFFFH 18FFFFH FSA49 110001xxx
310000H 188000H
64/32 30FFFFH 187FFFH FSA48 110000xxx
300000H 180000H
Bank 2 64/32 2FFFFFH 17FFFFH FSA47 101111xxx
2F0000H 178000H
64/32 2EFFFFH 177FFFH FSA46 101110xxx
2E0000H 170000H
64/32 2DFFFFH 16FFFFH FSA45 101101xxx
2D0000H 168000H
64/32 2CFFFFH 167FFFH FSA44 101100xxx
2C0000H 160000H
64/32 2BFFFFH 15FFFFH FSA43 101011xxx
2B0000H 158000H
64/32 2AFFFFH 157FFFH FSA42 101010xxx
2A0000H 150000H
64/32 29FFFFH 14FFFFH FSA41 101001xxx
290000H 148000H
64/32 28FFFFH 147FFFH FSA40 101000xxx
280000H 140000H
64/32 27FFFFH 13FFFFH FSA39 100111xxx
270000H 138000H
64/32 26FFFFH 137FFFH FSA38 100110xxx
260000H 130000H
64/32 25FFFFH 12FFFFH FSA37 100101xxx
250000H 128000H
64/32 24FFFFH 127FFFH FSA36 100100xxx
240000H 120000H
64/32 23FFFFH 11FFFFH FSA35 100011xxx
230000H 118000H
Data Sheet M14907EJ7V0DS
8
µ
µµ
µ
PD29F032203AL-X
[ -A85TX, -B85TX ] (2/2)
Bank Sector Address Sectors Sector Address Table
Organization Address Bank Address Table
K bytes / K words BYTE mode WORD mode A20 A19 A18 A17 A16 A15 A14 A13 A12
Bank 2 64/32 22FFFFH 117FFFH FSA34 100010xxx
220000H 110000H
64/32 21FFFFH 10FFFFH FSA33 100001xxx
210000H 108000H
64/32 20FFFFH 107FFFH FSA32 100000xxx
200000H 100000H
64/32 1FFFFFH 0FFFFFH FSA31 011111xxx
1F0000H 0F8000H
64/32 1EFFFFH 0F7FFFH FSA30 011110xxx
1E0000H 0F0000H
64/32 1DFFFFH 0EFFFFH FSA29 011101xxx
1D0000H 0E8000H
64/32 1CFFFFH 0E7FFFH FSA28 011100xxx
1C0000H 0E0000H
64/32 1BFFFFH 0DFFFFH FSA27 011011xxx
1B0000H 0D8000H
64/32 1AFFFFH 0D7FFFH FSA26 011010xxx
1A0000H 0D0000H
64/32 19FFFFH 0CFFFFH FSA25 011001xxx
190000H 0C8000H
64/32 18FFFFH 0C7FFFH FSA24 011000xxx
180000H 0C0000H
64/32 17FFFFH 0BFFFFH FSA23 010111xxx
170000H 0B8000H
64/32 16FFFFH 0B7FFFH FSA22 010110xxx
160000H 0B0000H
64/32 15FFFFH 0AFFFFH FSA21 010101xxx
150000H 0A8000H
64/32 14FFFFH 0A7FFFH FSA20 010100xxx
140000H 0A0000H
64/32 13FFFFH 09FFFFH FSA19 010011xxx
130000H 098000H
64/32 12FFFFH 097FFFH FSA18 010010xxx
120000H 090000H
64/32 11FFFFH 08FFFFH FSA17 010001xxx
110000H 088000H
64/32 10FFFFH 087FFFH FSA16 010000xxx
100000H 080000H
64/32 0FFFFFH 07FFFFH FSA15 001111xxx
0F0000H 078000H
64/32 0EFFFFH 077FFFH FSA14 001110xxx
0E0000H 070000H
64/32 0DFFFFH 06FFFFH FSA13 001101xxx
0D0000H 068000H
64/32 0CFFFFH 067FFFH FSA12 001100xxx
0C0000H 060000H
64/32 0BFFFFH 05FFFFH FSA11 001011xxx
0B0000H 058000H
64/32 0AFFFFH 057FFFH FSA10 001010xxx
0A0000H 050000H
64/32 09FFFFH 04FFFFH FSA9 001001xxx
090000H 048000H
64/32 08FFFFH 047FFFH FSA8 001000xxx
080000H 040000H
64/32 07FFFFH 03FFFFH FSA7 000111xxx
070000H 038000H
64/32 06FFFFH 037FFFH FSA6 000110xxx
060000H 030000H
64/32 05FFFFH 02FFFFH FSA5 000101xxx
050000H 028000H
64/32 04FFFFH 027FFFH FSA4 000100xxx
040000H 020000H
64/32 03FFFFH 01FFFFH FSA3 000011xxx
030000H 018000H
64/32 02FFFFH 017FFFH FSA2 000010xxx
020000H 010000H
64/32 01FFFFH 00FFFFH FSA1 000001xxx
010000H 008000H
64/32 00FFFFH 007FFFH FSA0 000000xxx
000000H 000000H
Data Sheet M14907EJ7V0DS 9
µ
µµ
µ
PD29F032203AL-X
[ -A85BX, -B85BX ] (1/2)
Bank Sector Address Sectors Sector Address Table
Organization Address Bank Address Table
K bytes / K words BYTE mode WORD mode A20 A19 A18 A17 A16 A15 A14 A13 A12
Bank 2 64/32 3FFFFFH 1FFFFFH FSA70 111111xxx
3F0000H 1F8000H
64/32 3EFFFFH 1F7FFFH FSA69 111110xxx
3E0000H 1F0000H
64/32 3DFFFFH 1EFFFFH FSA68 111101xxx
3D0000H 1E8000H
64/32 3CFFFFH 1E7FFFH FSA67 111100xxx
3C0000H 1E0000H
64/32 3BFFFFH 1DFFFFH FSA66 111011xxx
3B0000H 1D8000H
64/32 3AFFFFH 1D7FFFH FSA65 111010xxx
3A0000H 1D0000H
64/32 39FFFFH 1CFFFFH FSA64 111001xxx
390000H 1C8000H
64/32 38FFFFH 1C7FFFH FSA63 111000xxx
380000H 1C0000H
64/32 37FFFFH 1BFFFFH FSA62 110111xxx
370000H 1B8000H
64/32 36FFFFH 1B7FFFH FSA61 110110xxx
360000H 1B0000H
64/32 35FFFFH 1AFFFFH FSA60 110101xxx
350000H 1A8000H
64/32 34FFFFH 1A7FFFH FSA59 110100xxx
340000H 1A0000H
64/32 33FFFFH 19FFFFH FSA58 110011xxx
330000H 198000H
64/32 32FFFFH 197FFFH FSA57 110010xxx
320000H 190000H
64/32 31FFFFH 18FFFFH FSA56 110001xxx
310000H 188000H
64/32 30FFFFH 187FFFH FSA55 110000xxx
300000H 180000H
64/32 2FFFFFH 17FFFFH FSA54 101111xxx
2F0000H 178000H
64/32 2EFFFFH 177FFFH FSA53 101110xxx
2E0000H 170000H
64/32 2DFFFFH 16FFFFH FSA52 101101xxx
2D0000H 168000H
64/32 2CFFFFH 167FFFH FSA51 101100xxx
2C0000H 160000H
64/32 2BFFFFH 15FFFFH FSA50 101011xxx
2B0000H 158000H
64/32 2AFFFFH 157FFFH FSA49 101010xxx
2A0000H 150000H
64/32 29FFFFH 14FFFFH FSA48 101001xxx
290000H 148000H
64/32 28FFFFH 147FFFH FSA47 101000xxx
280000H 140000H
64/32 27FFFFH 13FFFFH FSA46 100111xxx
270000H 138000H
64/32 26FFFFH 137FFFH FSA45 100110xxx
260000H 130000H
64/32 25FFFFH 12FFFFH FSA44 100101xxx
250000H 128000H
64/32 24FFFFH 127FFFH FSA43 100100xxx
240000H 120000H
64/32 23FFFFH 11FFFFH FSA42 100011xxx
230000H 118000H
64/32 22FFFFH 117FFFH FSA41 100010xxx
220000H 110000H
64/32 21FFFFH 10FFFFH FSA40 100001xxx
210000H 108000H
64/32 20FFFFH 107FFFH FSA39 100000xxx
200000H 100000H
64/32 1FFFFFH 0FFFFFH FSA38 011111xxx
1F0000H 0F8000H
64/32 1EFFFFH 0F7FFFH FSA37 011110xxx
1E0000H 0F0000H
64/32 1DFFFFH 0EFFFFH FSA36 011101xxx
1D0000H 0E8000H
64/32 1CFFFFH 0E7FFFH FSA35 011100xxx
1C0000H 0E0000H
Data Sheet M14907EJ7V0DS
10
µ
µµ
µ
PD29F032203AL-X
[ -A85BX, -B85BX ] (2/2)
Bank Sector Address Sectors Sector Address Table
Organization Address Bank Address Table
K bytes / K words BYTE mode WORD mode A20 A19 A18 A17 A16 A15 A14 A13 A12
Bank 2 64/32 1BFFFFH 0DFFFFH FSA34 011011xxx
1B0000H 0D8000H
64/32 1AFFFFH 0D7FFFH FSA33 011010xxx
1A0000H 0D0000H
64/32 19FFFFH 0CFFFFH FSA32 011001xxx
190000H 0C8000H
64/32 18FFFFH 0C7FFFH FSA31 011000xxx
180000H 0C0000H
64/32 17FFFFH 0BFFFFH FSA30 010111xxx
170000H 0B8000H
64/32 16FFFFH 0B7FFFH FSA29 010110xxx
160000H 0B0000H
64/32 15FFFFH 0AFFFFH FSA28 010101xxx
150000H 0A8000H
64/32 14FFFFH 0A7FFFH FSA27 010100xxx
140000H 0A0000H
64/32 13FFFFH 09FFFFH FSA26 010011xxx
130000H 098000H
64/32 12FFFFH 097FFFH FSA25 010010xxx
120000H 090000H
64/32 11FFFFH 08FFFFH FSA24 010001xxx
110000H 088000H
64/32 10FFFFH 087FFFH FSA23 010000xxx
100000H 080000H
Bank 1 64/32 0FFFFFH 07FFFFH FSA22 001111xxx
0F0000H 078000H
64/32 0EFFFFH 077FFFH FSA21 001110xxx
0E0000H 070000H
64/32 0DFFFFH 06FFFFH FSA20 001101xxx
0D0000H 068000H
64/32 0CFFFFH 067FFFH FSA19 001100xxx
0C0000H 060000H
64/32 0BFFFFH 05FFFFH FSA18 001011xxx
0B0000H 058000H
64/32 0AFFFFH 057FFFH FSA17 001010xxx
0A0000H 050000H
64/32 09FFFFH 04FFFFH FSA16 001001xxx
090000H 048000H
64/32 08FFFFH 047FFFH FSA15 001000xxx
080000H 040000H
64/32 07FFFFH 03FFFFH FSA14 000111xxx
070000H 038000H
64/32 06FFFFH 037FFFH FSA13 000110xxx
060000H 030000H
64/32 05FFFFH 02FFFFH FSA12 000101xxx
050000H 028000H
64/32 04FFFFH 027FFFH FSA11 000100xxx
040000H 020000H
64/32 03FFFFH 01FFFFH FSA10 000011xxx
030000H 018000H
64/32 02FFFFH 017FFFH FSA9 000010xxx
020000H 010000H
64/32 01FFFFH 00FFFFH FSA8 000001xxx
010000H 008000H
8/4 00FFFFH 007FFFH FSA7 000000111
00E000H 007000H
8/4 00DFFFH 006FFFH FSA6 000000110
00C000H 006000H
8/4 00BFFFH 005FFFH FSA5 000000101
00A000H 005000H
8/4 009FFFH 004FFFH FSA4 000000100
008000H 004000H
8/4 007FFFH 003FFFH FSA3 000000011
006000H 003000H
8/4 005FFFH 002FFFH FSA2 000000010
004000H 002000H
8/4 003FFFH 001FFFH FSA1 000000001
002000H 001000H
8/4 001FFFH 000FFFH FSA0 000000000
000000H 000000H
Data Sheet M14907EJ7V0DS 11
µ
µµ
µ
PD29F032203AL-X
Sector Group Address Table
[ -A85TX, -B85TX ]
Sector group A20 A19 A18 A17 A16 A15 A 14 A13 A12 S i ze Sector
SGA0 000000×××64K Bytes (1 Sector) FSA0
SGA1 000001×××192K Bytes (3 S ectors) FSA1 to FSA 3
10
11
SGA2 0 0 0 1 ×××××256K Bytes (4 S ec tors) FSA4 to FSA7
SGA3 0 0 1 0 ×××××256K Bytes (4 S ec tors) FSA8 to FSA11
SGA4 0 0 1 1 ×××××256K Bytes (4 S ectors) FSA12 to FSA15
SGA5 0 1 0 0 ×××××256K Bytes (4 S ectors) FSA16 to FSA19
SGA6 0 1 0 1 ×××××256K Bytes (4 S ectors) FSA20 to FSA23
SGA7 0 1 1 0 ×××××256K Bytes (4 S ectors) FSA24 to FSA27
SGA8 0 1 1 1 ×××××256K Bytes (4 S ectors) FSA28 to FSA31
SGA9 1 0 0 0 ×××××256K Bytes (4 S ectors) FSA32 to FSA35
SGA10 1 0 0 1 ×××××256K Bytes (4 S ectors) FSA36 to FSA39
SGA11 1 0 1 0 ×××××256K Bytes (4 S ectors) FSA40 to FSA43
SGA12 1 0 1 1 ×××××256K Bytes (4 S ectors) FSA44 to FSA47
SGA13 1 1 0 0 ×××××256K Bytes (4 S ectors) FSA48 to FSA51
SGA14 1 1 0 1 ×××××256K Bytes (4 S ectors) FSA52 to FSA55
SGA15 1 1 1 0 ×××××256K Bytes (4 S ectors) FSA56 to FSA59
SGA16 1 1 1 1 0 0 ×××192K Bytes (3 S ectors) FSA60 to FS A 62
01
10
SGA17 1111110008K Bytes (1 Sector)FSA63
SGA18 1111110018K Bytes (1 Sector)FSA64
SGA19 1111110108K Bytes (1 Sector)FSA65
SGA20 1111110118K Bytes (1 Sector)FSA66
SGA21 1111111008K Bytes (1 Sector)FSA67
SGA22 1111111018K Bytes (1 Sector)FSA68
SGA23 1111111108K Bytes (1 Sector)FSA69
SGA24 1111111118K Bytes (1 Sector)FSA70
Remark × : VIH or VIL
Data Sheet M14907EJ7V0DS
12
µ
µµ
µ
PD29F032203AL-X
[ -A85BX, -B85BX ]
Sector group A20 A 19 A18 A17 A 16 A15 A 14 A13 A12 S i ze Sector
SGA0 0000000008K Bytes (1 Sector)FSA0
SGA1 0000000018K Bytes (1 Sector)FSA1
SGA2 0000000108K Bytes (1 Sector)FSA2
SGA3 0000000118K Bytes (1 Sector)FSA3
SGA4 0000001008K Bytes (1 Sector)FSA4
SGA5 0000001018K Bytes (1 Sector)FSA5
SGA6 0000001108K Bytes (1 Sector)FSA6
SGA7 0000001118K Bytes (1 Sector)FSA7
SGA8 000001×××192K Bytes (3 S ectors) FSA8 to FSA 10
10
11
SGA9 0001×××××256K Bytes (4 S ectors) FSA11 to FS A 14
SGA10 0010×××××256K Bytes (4 S ec tors) FSA15 to FSA18
SGA11 0011×××××256K Bytes (4 S ec tors) FSA19 to FSA22
SGA12 0100×××××256K Bytes (4 S ec tors) FSA23 to FSA26
SGA13 0101×××××256K Bytes (4 S ec tors) FSA27 to FSA30
SGA14 0110×××××256K Bytes (4 S ec tors) FSA31 to FSA34
SGA15 0111×××××256K Bytes (4 S ec tors) FSA35 to FSA38
SGA16 1000×××××256K Bytes (4 S ec tors) FSA39 to FSA42
SGA17 1001×××××256K Bytes (4 S ec tors) FSA43 to FSA46
SGA18 1010×××××256K Bytes (4 S ec tors) FSA47 to FSA50
SGA19 1011×××××256K Bytes (4 S ec tors) FSA51 to FSA54
SGA20 1100×××××256K Bytes (4 S ec tors) FSA55 to FSA58
SGA21 1101×××××256K Bytes (4 S ec tors) FSA59 to FSA62
SGA22 1110×××××256K Bytes (4 S ec tors) FSA63 to FSA66
SGA23 111100×××192K Bytes (3 S ec tors) FSA67 to FSA69
01
10
SGA24 111111×××64K Bytes (1 S ector) FSA70
Remark × : VIH or VIL
Data Sheet M14907EJ7V0DS 13
µ
µµ
µ
PD29F032203AL-X
Product ID Code (Manufacturer Code / Device Code)
Product ID Code Input Output
A20 to A6 A1 A0 A1 Note1
I/O15I/O14I/O13I/O12I/O11I/O10
I/O9 I/O8 I/O7 I/O6 I/O5 I/O4 I/O3 I/O2 I/O1 I/O0 HEX
A12
Manufacturer Code ×VIL VIL VIL VIL
0
000000000010000 0010H
Device BYTE -A85TX ×VIL VIL VIH VIL A1 High-Z 01010000 50H
code mode -B85TX
-A85BX A1 High-Z 01010011 53H
-B85BX
WORD -A85TX ×VIL VIL VIH ×0010001001010000 2250H
mode -B85TX
-A85BX 0010001001010011 2253H
-B85BX
Sector group protection SGA VIL VIH VIL VIL 00000000000000010001HNote2
Notes 1. A–1 is valid only in the BYTE mode. I/O8 to I/O14 go into a high impedance state in the BYTE mode, and
I/O15 is A–1 of the lowest address.
2. If 0001H is output, the sector group is protected. If 0000H is output, the sector group is unprotected.
Remark × : VIH or VIL, SGA : Sector group address
Data Sheet M14907EJ7V0DS
14
µ
µµ
µ
PD29F032203AL-X
Command Sequence
Command sequence Bus 1st bus Cycle 2nd bus Cycle 3rd bus Cycle 4th bus Cycle 5th bus Cycle 6th bus Cycle
Cycle Address Data Address Data Address Data Address Data Address Data Address Data
Read / Reset Note1 1×××HF0HRARD––––––––
Read / Reset Note1 BYTE mode 3 AAAH AAH 555H 55H AAAH F0H RA RD
WORD mode 555H 2AAH 555H
Program BYTE mode 4 AAAH AAH 555H 55H AAAH A0H PA PD
WORD mode 555H 2AAH 555H
Program Suspend Note 2 1BAB0H––––––––––
Program Resume Note 3 1BA30H––––––––––
Chip Erase BYTE mode 6 AAAH AAH 555H 55H AAAH 80H AAAH AAH 555H 55H AAAH 10H
WORD mode 555H 2AAH 555H 555H 2AAH 555H
Sector Erase BYTE mode 6 AAAH AAH 555H 55H AAAH 80H AAAH AAH 555H 55H F SA 30H
WORD mode 555H 2AAH 555H 555H 2AAH
Sector Erase Suspend Not e 4 1BAB0H––––––––––
Sector Erase Resume Note 5 1BA30H––––––––––
Unlock Bypass Set BYTE mode 3 AAAH AAH 555H 55H AAAH 20H ––––––
WORD mode 555H 2AAH 555H
Unlock Bypass Program Not e 6 2×××HA0HPAPD––––––––
Unlock Bypass Reset Note 6 2 BA 90H ×××H00HNote11 ––––––––
Product ID BYTE mode 3 AAAH AAH 555H 55H (BA) 90H IA ID
AAAH
WORD mode 555H 2AAH (BA)
555H
Sector Group Protection Not e 7 4×××H 60H SPA 60H SPA 40H SPA SD
Sector Group Unprotect Note 8 4×××H 60H SUA 60H SUA 40H SUA SD
Query Note 9 BYTE mode1AAH98H––––––––––
WORD mode 55H
Extra One Time Protect BYTE mode 3 AAAH AAH 555H 55H AAAH 88H ––––––
Sector Entry WORD mode 555H 2AAH 555H
Extra One Time Protect BYTE mode 4 AAAH AAH 555H 55H AAAH A0H PA PD
Sector Program Note 10 WORD mode 555H 2AAH 555H
Extra One Time Protect BYTE mode 6 AAAH AAH 555H 55H AAAH 80H AAAH AAH 555H 55H EOTPSA 30H
Sector Erase Note 10 WORD mode 555H 2AAH 555H 555H 2AAH
Extra One Time Protect BYTE mode 4 AAAH AAH 555H 55H AAAH 90H xxxH 00H
Sector Reset Note 10 WORD mode 555H 2AAH 555H
Extra One Time Protect Sector 4 ×××H 60H EOTPSA 60H EOTPSA 40H EOTPSA SD
Protection Note 1 0
Data Sheet M14907EJ7V0DS 15
µ
µµ
µ
PD29F032203AL-X
Notes1. Both these read / reset commands reset the device to the read mode.
2. Programming is suspended if B0H is input to the bank address being programmed to in a program
operation.
3. Programming is resumed if 30H is input to the bank address being suspended to in a program-suspend
operation.
4. Erasure is suspended if B0H is input to the bank address being erased in a sector erase operation.
5. Erasure is resumed if 30H is input to the bank address being suspended in a sector-erase-suspend
operation.
6. Valid only in the Unlock Bypass mode.
7. Valid only in /RESET = VID (exc ept in the Extra One Time Protect Sector mode).
8. The command sequence that protects a sector group is excluded.
9. Only A0 to A6 are valid as an address.
10. Valid only in the Extra One Time Protect Sector mode.
11. This command can be used even if this data is F0H.
Remarks 1. The system should generate the following address pattern :
WORD mode : 555H or 2AAH (A10 to A0)
BYTE mode : AAAH or 555H (A10 to A0, and A1)
2. RA : Read address
RD : Read data
IA : Address input as follows
××00H (to read the manufacturer code)
××02H (to read the device code in the BYTE mode)
××01H (to read the device code in the WORD mode)
ID : Code output. For the manufacture code, device code and sector group protection information,
refer to the Product ID code.
PA : Program address
PD : Program data
FSA : Erase sector address. The sector to be erased is selected by the combination of A20 to A12.
Refer to the Sector Organization / Sector Address Table.
BA : Bank address. Refer to the Sector Organization / Sector Address Table.
Data Sheet M14907EJ7V0DS
16
µ
µµ
µ
PD29F032203AL-X
SPA : Sector group address to be protected or protection-verified. Set the sector group address
(SGA) and (A6, A1, A0) = (VIL, VIH, VIL).
Sector group protection can be set for each sector group address. For details, refer DUAL
OPRATION FLASH MEMORY 32M BITS A SERIES Information (M14914E).
For the sector group address, refer to the Sector Group Address Table.
SUA : Sector group address to be unprotected or unprotection-verified. Set the sector group address
(SGA) and (A6, A1, A0) = (VIH, VIH, VIL).
Sector group unprotect is performed for all sector group using a single command, however,
unprotect verification must be performed for each sector group address. For details, refer to
DUAL OPRATION FLASH MEMORY 32M BITS A SERIES Information (M14914E).
For the sector group address, refer to the Sector Group Address Table.
EOTPSA: Extra One Time Protect Sector area addresses. These addresses are 3F0000H to 3FFFFFH
(BYTE mode) / 1F8000H to 1FFFFFH (W ORD mode) for top boot, and 000000H to 00FFFFH
(BYTE mode) / 000000H to 007FFFH (WORD mode) for bottom boot.
SD : Data for verifying whether sector groups read from the address specified by SPA, SUA,
EOTPSA are protected or unprotected.
3. The sector group address is don't care except when a program / erase address or read address are
selected.
4. For the operation of bus, refer DUAL OPRATION FLASH MEMORY 32M BITS A SERIES Information
(M14914E).
5. × of address bit indicates VIH or VIL.
BUS OPERATIONS, COMMANDS, HARDWARE SEQUENCE FLAGS, HARDWARE DATA PROTECTION
Refer to DUAL OPERATION FLASH MEMORY 32M BITS A SERIES Information (M14914E).
Data Sheet M14907EJ7V0DS 17
µ
µµ
µ
PD29F032203AL-X
Electrical Characteristics
Before turning on power, input GND ± 0.2 V to the /RESET pin until VCC VCC (MIN.).
Absolute Maximum Ratings
Parameter Symbol Condition Rating Unit
Supply volt age VCC with respect t o GND –0.5 to +4.0 V
Input / Output voltage VTwith respect /WP(ACC), /RESET –0.5 Note 1 to +13.0 V
to GND except /WP(ACC), /RESET –0.5 Note 1 to VCC + 0.4 (4.0 V MAX.) Note 2
Operating am bi ent TA–25 to +85 °C
temperature
Storage temperature Tstg –55 to +125 °C
Notes 1. –2.0 V (MIN.) (pulse width 20 ns)
2. VCC + 2.0 V (MAX.) (pulse width 20 ns)
Caution Exposing the device to stress above those listed in Absolute Maximum Rating could cause
permanent damage. The device is not meant to be operated under conditions outside the limits
described in the operational section of this specification. Exposure to Absolute Maximum Rating
conditions for extended periods may affect device reliability.
Recommended Operating Conditions
Parameter Symbol Test condition -A85TX, -A85BX -B85TX, -B85BX Unit
MIN. TYP. MAX. MIN. TYP. MAX.
Supply volt age VCC 3.0 3.6 2.7 3.3 V
Operating ambient temperature TA25 +85 25 +85 °C
Capacitance (TA = 25°
°°
°C, f = 1 MHz)
Parameter Symbol Test condition MIN. TYP. MAX. Unit
Input capacitance CIN VIN = 0 V TBD pF
Input / Output capacitance CI/O VI/O = 0 V TBD pF
Remarks 1. VIN : Input voltage, VI/O : Input / Output voltage
2. These parameters are not 100% tested.
Data Sheet M14907EJ7V0DS
18
µ
µµ
µ
PD29F032203AL-X
DC Characteristics (Recommended Operating Conditions Unless Otherwise Noted)
Parameter Symbol Tes t condition MIN. TYP. MAX. Unit
High level input voltage VIH 2.4 VCC+0.3 V
Low level input voltage VIL 0.3 +0.5 V
High level output voltage VOH IOH = 500
µ
A, VCC = VCC (MIN.) 2.4 V
Low level output volt age VOL IOL = +1.0 mA , V CC = V CC (MIN.) 0.4 V
Input leak age current ILI 1.0 +1.0
µ
A
I/O leakage current ILO 1.0 +1.0
µ
A
Power Read B Y TE mode ICC1 VCC = VCC (MAX.), tCYCLE = 5 MHz 10 16 mA
supply /CE = VIL, /OE = VIH tCYCLE = 1 MHz 2 4
current WORD mode tCYCLE = 5 MHz 10 16
tCYCLE = 1 MHz 2 4
Program, Erase ICC2 VCC = VCC (MAX.), /CE = VIL, /OE = VIH 15 30 mA
Standby ICC3 VCC = V CC(MAX.), /CE = /RESET = 0.2 5
µ
A
/W P(ACC) = VCC ± 0.3 V, /OE = V IL
Standby / Reset ICC4 VCC = VCC (MAX.), /RESET = GND ± 0.2 V 0.2 5
µ
A
Automatic s l eep mode ICC5 VIH = VCC ± 0.2 V, VIL = GND ± 0.2 V 0.2 5
µ
A
Read during programming ICC6 VIH = VCC ± 0.2 V, VIL = GND ± 0.2 V 21 45 mA
Read during erasing ICC7 VIH = VCC ± 0.2 V, VIL = GND ± 0.2 V 21 45 mA
Programming ICC8 /CE = VIL, /OE = VIH,1735mA
during suspend Automatic programming during suspend
Accelerated IACC /W P (ACC) pin 5 10 mA
programming VCC 15 30
/RESE T hi gh l e vel i nput voltage VID High Volt age i s applied 11.5 12.5 V
Acc el erated programm i ng vol tage V ACC High Voltage is appli ed 8.5 9.5 V
Low VCC lock-out vol tageNote VLKO 1.7 V
Note When VCC is equal to or lower than VLKO, the device ignores all write cycles. Refer to DUAL OPERATION
FLASH MEMORY 32M BITS A SERIES Information (M14914E).
Remark These DC characteristics are in common regardless of product classification.
Data Sheet M14907EJ7V0DS 19
µ
µµ
µ
PD29F032203AL-X
AC Characteristics (Recommended Operating Conditions Unless Otherwise Noted)
AC Test Conditions
Input Waveform (Rise and Fall Time
5 ns)
Test points1.5 V
0 V
3.0 V
1.5 V
Output Waveform
Test points1.5 V 1.5 V
Output Load
1 TTL + 30 pF
Data Sheet M14907EJ7V0DS
20
µ
µµ
µ
PD29F032203AL-X
Read Cycle
Parameter Symbol Test Condit i on MIN. TY P. MAX. Unit Note
Read cycle t i me tRC 85 ns
Address access time tACC /CE = /OE = VIL 85 ns
/CE access time tCE /OE = VIL 85 ns
/OE access time tOE /CE = VIL 40 ns
Output dis abl e time tDF /OE = VIL or /CE = VIL 30 ns
Output hold t i me tOH 0ns
/RESE T pul se width tRP 500 ns
/RESE T hol d time before read tRH 50 ns
/RESE T l ow to read mode t READY 20
µ
s
/CE low to /BYTE low, high tELFL/tELFH 5ns
/BYT E l ow output di sable tim e tFLQZ 30 ns
/BYT E hi gh access time t FHQV 85 ns
/OE low level time from /WE high level tOEH 20 ns
Remark tDF is the time from inactivation of /CE or /OE to high impedance state output.
Data Sheet M14907EJ7V0DS 21
µ
µµ
µ
PD29F032203AL-X
Write Cycle (Program / Erase) (1/2)
Parameter Symbol MIN. TYP. MAX. Unit Note
W rite cycle time tWC 85 ns
Address setup time (/WE to addres s) tAS 0ns
Address setup time (/CE to addres s) tAS 0ns
Address hol d t i me (/WE t o address) tAH 45 ns
Address hol d time (/CE to address) tAH 45 ns
Input data setup time tDS 35 ns
Input data hol d time tDH 0ns
/OE hold t i me Read tOEH 0ns
Toggle bit, Data polling 10
Read recovery time before write (/OE to /CE) tGHEL 0ns
Read recovery time before write (/OE to /WE) t GHWL 0ns
/W E setup time (/CE to /WE) tWS 0ns
/CE setup time (/WE to /CE) tCS 0ns
/W E hold time (/CE to /WE) tWH 0ns
/CE hold time (/WE to /CE) tCH 0ns
Write pulse width tWP 35 ns
/CE puls e width tCP 35 ns
Write pulse width hi gh tWPH 30 ns
/CE puls e width hi gh tCPH 30 ns
Byte program ming operation time tBPG 9 200
µ
s
Word programming operation ti me tWPG 11 200
µ
s
Sector erase operation time 4K words sector tSER 0.3 1.0 s 1,2
32K words sect or 0.5 1.5
4K words sect or 0.5 3.0 1,3
32K words sect or 0.7 5.0
Chip erase operati on time tCER 33.9 102.5 s 1,2
48.1 339 1,3
Acc el erat ed programmi ng time tACCPG 7 150
µ
s
Program / erase cycle 300,000 cyc l e
VCC setup ti me tVCS 50
µ
s
RY (/BY) recovery time tRB 0ns
/RESE T pul se width tRP 500 ns
/RESE T hi gh-vol tage (VID) hold tim e f rom high of RY(/BY) tRRB 20
µ
s
when sector group is temporarily unprotect
/RESE T hol d t i me tRH 50 ns
Notes 1. The preprogramming time prior to the erase operation is not included.
2. Program / erase cycle : 100,000 cycles
3. Program / erase cycle : 300,000 cycles
Data Sheet M14907EJ7V0DS
22
µ
µµ
µ
PD29F032203AL-X
Write Cycle (Program / Erase) (2/2)
Parameter Symbol MIN. TYP. MAX. Unit Note
From c ompletion of aut omatic program / erase t o dat a tEOE 85 ns
output ti me
RY (/BY) delay tim e from valid program or erase operati on tBUSY 90 ns
Address setup time to /OE low in toggl e bi t tASO 15 ns
Address hol d t i me to /CE or / O E hi gh i n toggle bit tAHT 0ns
/CE puls e width hi gh f o r t oggl e bi t tCEPH 20 ns
/OE pulse width high for toggle bit tOEPH 20 ns
Voltage t ransition time tVLHT 4
µ
s1
Rise time to VID (/RESET) tVIDR 500 ns 2
Rise time to VACC (/WP(ACC)) tVACCR 500 ns 1
Erase ti meout time tTOW 50
µ
s3
Erase suspend transit i on t i me tSPD 20
µ
s3
Notes 1. Sector group protection and accelerated mode only.
2. Sector group protection only.
3. Table only.
Write operation (Program / Erase) Performance
Parameter Description MIN. TYP. MAX. Unit Note
Sector erase tim e The preprogramming tim e pri or 4K words s ector 0.3 1. 0 s 1
to the eras e operat i on 32K words sector 0.5 1.5
is not i ncluded 4K words sect or 0.5 3.0 s 2
32K words sect or 0.7 5.0
Chip erase ti me The preprogramming time prior 33.9 102. 5 s 1
to the erase operation is not i ncluded 48.1 339 2
Byte programming ti me Excludes syst em-level overhead 9 200
µ
s
Word programming time Excludes s ystem-level overhead 11 200
µ
s
Chip programming time Excludes system -l evel BYTE mode 40 s
overhead WORD mode 25
Acc el erated programm i ng time Excludes sys t em-level overhead 7 150
µ
s
Program / erase cycle 300,000 cycle
Notes 1. Program / erase cycle : 100,000 cycles
2. Program / erase cycle : 300,000 cycles
TIMING CHARTS, FLOW CHARTS
Refer to DUAL OPERATION FLASH MEMORY 32M BITS A SERIES Information (M14914E).
Data Sheet M14907EJ7V0DS 23
µ
µµ
µ
PD29F032203AL-X
CFI Code List (1/2)
Address A6 to A0 Data I/O15 to I/O0 Description
10H 0051H "QRY " (ASCII c ode)
11H 0052H
12H 0059H
13H 0002H Main command s et
14H 0000H 2 : A MD/FJ standard type
15H 0040H St art address of P RI MARY table
16H 0000H
17H 0000H Auxiliary command set
18H 0000H 00H : Not supported
19H 0000H Start address of auxiliary algorithm t able
1AH 0000H
1BH 0027H Minim um VCC voltage (program / erase)
I/O7 to I/O4 : 1 V/bit
I/O3 to I /O0 : 100 mV / bi t
1CH 0036H Maximum VCC voltage (program / erase)
I/O7 to I/O4 : 1 V/bit
I/O3 to I /O0 : 100 mV / bi t
1DH 0000H Minim um VPP volt age
1EH 0000H Maximum V PP vol tage
1FH 0004H Typi cal word program time (2 N
µ
s)
20H 0000H Typic al buf fer program ti me (2 N
µ
s)
21H 000AH Typical sector erase tim e (2 N ms)
22H 0000H Typic al chip erase time (2 N ms)
23H 0005H Maximum word program time (typical t i me × 2 N)
24H 0000H Maximum buffer program time (t ypi cal tim e × 2 N)
25H 0004H Maximum sector erasing tim e (t ypi cal time × 2 N)
26H 0000H Maximum chip erasing time (t ypi cal tim e × 2 N)
27H 0016H Capaci ty (2 N Bytes)
28H 0002H I/ O i nformation
29H 0000H 2 : ×8/×16-bit organization
2AH 0000H Maximum number of bytes when two banks are programmed (2 N)
2BH 0000H
2CH 0002H Type of erase bl ock
2DH 0007H Information about erase block 1
2EH 0000H bit0 t o bi t15 : y = number of sectors
2FH 0020H bi t16 to bit31 : z = size
30H 0000H (Z × 256 B yt es)
Data Sheet M14907EJ7V0DS
24
µ
µµ
µ
PD29F032203AL-X
CFI Code List (2/2)
Address A6 to A0 Data I/O15 to I/O0 Description
31H 003EH Inf ormation about erase block 2
32H 0000H bit 0 t o bi t15 : y = number of sectors
33H 0000H bit 16 t o bi t 31 : z = size
34H 0001H (z × 256 B yt es)
40H 0050H "P RI " (ASCII code)
41H 0052H
42H 0049H
43H 0031H Main versi on (A SCII code)
44H 0032H Minor versi on (A SCII code)
45H 0000H Addres s during com mand input
00H : Necessary
01H : Unneces sary
46H 0002H Temporary erase suspend f unction
00H : Not s upport e d
01H : Read only
02H : Read / Program
47H 0001H Sec tor group protection
00H : Not s upport e d
01H : Supported
48H 0001H Temporary sector group prot ection
00H : Not s upport e d
01H : Supported
49H 0004H Sec tor group protection al gori thm
4AH 00xxH Number of sectors of bank 2
00H : Not s upport e d
30H :
µ
PD29F032203AL-X
4BH 0000H Burst mode
00H : Not s upport e d
4CH 0000H Page mode
00H : Not s upport e d
4DH 0085H Minim um VACC volt age
I/O7 to I/O4 : 1 V/bit
I/O3 to I /O0 : 100 mV / bi t
4EH 0095H Maximum V ACC voltage
I/O7 to I/O4 : 1 V/bit
I/O3 to I /O0 : 100 mV / bi t
4FH 00xxH Boot organizat i on
02H : Bottom boot ( -A 85B X, -B85BX )
03H : Top boot ( -A85TX, -B85TX )
50H 0001H Temporary program sus pend function
00H : Not s upport e d
01H : Supported
Data Sheet M14907EJ7V0DS 25
µ
µµ
µ
PD29F032203AL-X
Package Drawings
NOTES
Each lead centerline is located within 0.10 mm of
its true position (T.P.) at maximum material condition.
48-PIN PLASTIC TSOP (I) (12x20)
ITEM MILLIMETERS
A
B
C
E
I
12.0±0.1
0.5 (T.P.)
0.1±0.05
0.45 MAX.
K
1.2 MAX.
18.4±0.1
0.145±0.05
F
0.10M
D 0.22±0.05
1)
"A" excludes mold flash. (Includes mold flash : 12.4 mm MAX.)2)
C
R
S
D
KM
M
L
1.0±0.05G
L 0.5
0.10N
P 20.0±0.2
Q3°+5°
3°
0.25R
S48GZ-50-MJH-1
S 0.60±0.15
J 0.8±0.2
S
Q
N
B
E
G
F
J
detail of lead end
1
24
48
25
S
A
I
P
Data Sheet M14907EJ7V0DS
26
µ
µµ
µ
PD29F032203AL-X
SwB
SwA
A
B
ABCDEFGHJKLM
8
7
6
5
4
3
2
1
S
y
Sy1
Sb xAB
M
φφ
63-PIN TAPE FBGA (11x7)
ITEM MILLIMETERS
D
E 11.00±0.10
7.00±0.10
w 0.20
A 0.97±0.10
A1 0.27±0.05
A2 0.70
b
x 0.08
y 0.10
e0.80
0.45±0.05
INDEX MARK
A
A2
A1
e
ZE
ZD
y1 0.20
ZD 0.70
ZE 1.10
P63F9-80-BS2
E
D
S
Data Sheet M14907EJ7V0DS 27
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PD29F032203AL-X
Recommended Soldering Conditions
Please consult with our sales offices for soldering conditions of the
µ
PD29F032203AL-X.
Types of Surface Mount Device
µ
PD29F032203ALGZ-MJH : 48-pin PLASTIC TSOP(I) (12 × 20) (Normal bent)
µ
PD29F032203ALF9-BS2 : 63-pin TAPE FBGA (11 × 7)
Data Sheet M14907EJ7V0DS
28
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PD29F032203AL-X
Revision History
Edition/ Page Type of Location Descript i on
Date This Previous revisi on (Previous edi t ion -> This edition)
edition edition
7th editi on/ p.13 p.13 Modification Product ID Code Device code(Byte mode):I/O15 = Hi-ZA–1
Sep.2002 p.16 p.15 Modification Command Sequence Remark 2 : SPA, SUA
p.20 p. 19 Addition Read Cycle tOEH
Data Sheet M14907EJ7V0DS 29
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PD29F032203AL-X
[ MEMO ]
Data Sheet M14907EJ7V0DS
30
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PD29F032203AL-X
[ MEMO ]
Data Sheet M14907EJ7V0DS 31
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PD29F032203AL-X
NOTES FOR CMOS DEVICES
1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS
Note:
Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and
ultimately degrade the device operation. Steps must be taken to stop generation of static electricity
as much as possible, and quickly dissipate it once, when it has occurred. Environmental control
must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using
insulators that easily build static electricity. Semiconductor devices must be stored and transported
in an anti-static container, static shielding bag or conductive material. All test and measurement
tools including work bench and floor should be grounded. The operator should be grounded using
wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need
to be taken for PW boards with semiconductor devices on it.
2 HANDLING OF UNUSED INPUT PINS FOR CMOS
Note:
No connection for CMOS device inputs can be cause of malfunction. If no connection is provided
to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence
causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels
of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused
pin should be connected to V
DD
or GND with a resistor, if it is considered to have a possibility of
being an output pin. All handling related to the unused pins must be judged device by device and
related specifications governing the devices.
3 STATUS BEFORE INITIALIZATION OF MOS DEVICES
Note:
Power-on does not necessarily define initial status of MOS device. Production process of MOS
does not define the initial operation status of the device. Immediately after the power source is
turned ON, the devices with reset function have not yet been initialized. Hence, power-on does
not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the
reset signal is received. Reset operation must be executed immediately after power-on for devices
having reset function.
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PD29F032203AL-X
Related Documents
Docum ent Name Docum ent Number
DUAL OPERATION FLASH MEMORY 32M BITS A SERIES Information M14914E
M8E 00. 4
The information in this document is current as of September, 2002. The information is subject to
change without notice. For actual design-in, refer to the latest publications of NEC's data sheets or
data books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all
products and/or types are available in every country. Please check with an NEC sales representative
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