NCP3170
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16
The output capacitor must be rated to handle the ripple
current at full load with proper derating. The capacitor RMS
ratings given in datasheets are generally for lower switching
frequencies than used in switch mode power supplies, but a
multiplier is given for higher frequency operation. The RM S
current for the output capacitor can be calculated below:
CORMS +IOUT ra
12
Ǹ³
(eq. 14)
0.294 A +3.0 A34%
12
Ǹ
where:
CoRMS = Output capacitor RMS current
IOUT = Output current
ra = Ripple current ratio
The maximum allowable output voltage ripple is a
combination of the ripple current selected, the output
capacitance selected, the Equivalent Series Inductance
(ESL), and Equivalent Series Resistance (ESR).
The main component of the ripple voltage is usually due
to the ESR of the output capacitor and the capacitance
selected, which can be calculated as shown in Equation 14:
VESR_C +IOUT ra ǒCOESR )1
8 FSW COUTǓ³
(eq. 15)
10.89 mV +3 34% ǒ5mW)1
8 500 kHz 44 mFǓ
where:
CoESR = Output capacitor ESR
COUT = Output capacitance
FSW = Switching frequency
IOUT = Output current
ra = Ripple current ratio
VESR_C = Ripple voltage from the capacitor
The impedance of a capacitor is a function of the
frequency of operation. When using ceramic capacitors, the
ESR of the capacitor decreases until the resonant frequency
is reached, at which point the ESR increases; therefore the
ripple voltage might not be what one expected due to the
switching frequency. Further, the method of layout can add
resistance in series with the capacitance, increasing ripple
voltage.
The ESL of capacitors depends on the technology chosen,
but tends to range from 1 nH to 20 nH, where ceramic
capacitors have the lowest inductance and electrolytic
capacitors have the highest. The calculated contributing
voltage ripple from ESL is shown for the switch on and
switch of f below:
VESLON +ESL IPP FSW
D³(eq. 16)
1.84 mV +1nH@1.01 A @500 kHz
27.5%
VESLOFF +ESL IPP FSW
(1*D)³(eq. 17)
0.7 mV +1nH 1.1 A 500 kHz
(1*27.5%)
where:
D = Duty ratio
ESL = Capacitor inductance
FSW = Switching frequency
IPP = Peak-to-peak current
The output capacitor is a basic component for fast
response o f the power supply. For the first few microseconds
of a load transient, the output capacitor supplies current to
the load. Once the regulator recognizes a load transient, it
adjusts the duty ratio, but the current slope is limited by the
inductor value.
During a load step transient, the output voltage initially
drops du e t o the current variation inside the capacitor and the
ESR (neglecting the effect of the ESL).
DVOUT−ESR +ITRAN COESR ³(eq. 18)
7.5 mV +1.5 A 5mW
where:
CoESR = Output capacitor Equivalent Series
Resistance
ITRAN = Output transient current
ąDVOUT_ESR = Voltage deviation of VOUT due to the
effects of ESR
A minimum capacitor value is required to sustain the
current during the load transient without dischar ging it. The
voltage drop due to output capacitor discharge is given by
the following equation:
DVOUT−DIS +ǒITRANǓ2 LOUT FSW
2 FCROSS COUT ǒVIN *VOUTǓ³
(eq. 19)
138.1 mV +(1.5)2 4.7 mH 500 kHz
2 50 kHz 44 mF ǒ12 V *3.3 VǓ
where:
COUT = Output capacitance
D = Duty ratio
FSW = Switching frequency
FCROSS = Loop cross over frequency
ITRAN = Output transient current
LOUT = Output inductor value
VIN = Input voltage
VOUT = Output voltage
ąDVOUT_DIS = Voltage deviation of VOUT due to the
effects of capacitor discharge
In a typical converter design, the ESR of the output
capacitor bank dominates the transient response. Please note
that DVOUT_DIS and DVOUT_ESR are out of phase with each
other, and the lar ger of these two voltages will determine the