LM555JAN
Timer
General Description
The LM555 is a highly stable device for generating accurate
time delays or oscillation. Additional terminals are provided
for triggering or resetting if desired. In the time delay mode of
operation, the time is precisely controlled by one external
resistor and capacitor. For astable operation as an oscillator,
the free running frequency and duty cycle are accurately
controlled with two external resistors and one capacitor. The
circuit may be triggered and reset on falling waveforms, and
the output circuit can source or sink up to 200mA or drive
TTL circuits.
Features
nDirect replacement for SE555/NE555
nTiming from microseconds through hours
nOperates in both astable and monostable modes
nAdjustable duty cycle
nOutput can source or sink 200 mA
nOutput and supply TTL compatible
nTemperature stability better than 0.005% per ˚C
nNormally on and normally off output
Applications
nPrecision timing
nPulse generation
nSequential timing
nTime delay generation
nPulse width modulation
nPulse position modulation
nLinear ramp generator
Ordering Information
NS Part Number JAN Part Number NS Package Number Package Description
JL555SPA JM38510/10901SPA J08A 8LD Ceramic Dip
JL555SGA JM38510/10901SGA H08A 8LD Metal Can
Connection Diagrams
Dual-In-Line Package Metal Can Package
20153703
Top View
20153733
Top View
August 2005
LM555JAN Timer
© 2005 National Semiconductor Corporation DS201537 www.national.com
Schematic Diagram
20153701
LM555JAN
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Absolute Maximum Ratings (Note 1)
Supply Voltage +18V
Discharge Current +200mA
Output Sink Current +200mA
Output Source Current −200mA
Power Dissipation (Note 2)
Metal Can 300mW @+125˚C
CERDIP 370mW @+125˚C
Operating Temperature Range −55˚C T
A
+125˚C
Maximum Junction Temperature (T
Jmax)
+175˚C
Storage Temperature Range −65˚C T
A
+150˚C
Soldering Information (Soldering 10 Seconds) 300˚C
Thermal Resistance
θ
JA
CERDIP Still Air 123˚C/W
CERDIP 500LF / Min Air Flow 69˚C/W
Metal Can Still Air 171˚C/W
Metal Can 500LF / Min Air Flow 92˚C/W
θ
JC
CERDIP 18˚C/W
Metal Can 41˚C/W
ESD Tolerance (Note 3) 1KV
Recommended Operating Conditions
Supply Voltage Range +4.5V to +16V
DC
Quality Conformance Inspection
Mil-Std-883, Method 5005 - Group A
Subgroup Description Temp ˚C
1 Static tests at 25
2 Static tests at 125
3 Static tests at -55
4 Dynamic tests at 25
5 Dynamic tests at 125
6 Dynamic tests at -55
7 Functional tests at 25
8A Functional tests at 125
8B Functional tests at -55
9 Switching tests at 25
10 Switching tests at 125
11 Switching tests at -55
12 Settling time at 25
13 Settling time at 125
14 Settling time at -55
LM555JAN
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Electrical Characteristics
DC Parameters
Symbol Parameter Conditions Notes Min Max Unit Sub-
groups
I
CC
Power Supply Current V
CC
= 4.5V 5.0 mA 1, 2, 3
V
CC
= 16.5V 20 mA 1, 2, 3
V
Trig
Trigger Voltage V
CC
= 4.5V 1.3 1.8 V 1
1.3 2.1 V 2
1.15 1.8 V 3
V
CC
= 16.5V 5.2 5.8 V 1
5.2 6.1 V 2
5.0 5.8 V 3
I
Trig
Trigger Current V
CC
= 16.5V -5.0 µA 1, 2, 3
V
Th
Threshold Voltage V
CC
= 4.5V 2.7 3.3 V 1
2.6 3.4 V 2, 3
V
CC
= 16.5V 10.7 11.3 V 1
10.6 11.4 V 2, 3
I
Th
Threshold Current V
CC
= 16.5V 250 nA 1, 2
2,500 nA 3
V
OL
Logical "0" Output Voltage V
CC
= 4.5V, I
Sink
= 5mA 0.25 V 1
0.35 V 2, 3
V
CC
= 4.5V, I
Sink
= 50mA 2.2 V 1, 2
2.6 V 3
V
CC
= 16.5V, I
Sink
= 10mA 0.15 V 1, 3
0.25 V 2
V
CC
= 16.5V, I
Sink
= 50mA 0.5 V 1, 3
0.7 V 2
V
CC
= 16.5V, I
Sink
= 100mA 2.2 V 1
2.8 V 2, 3
V
OH
Logical "1" Output Voltage V
CC
= 4.5V, I
Source
= -100mA 2.6 V 1, 2
2.2 V 3
V
CC
= 16.5V, I
Source
= -100mA 14.6 V 1, 2
14 V 3
I
CEX
Discharge Transistor Leakage
Current
V
CC
= 16.5V 100 nA 1, 3
3,000 nA 2
V
Sat
Discharge Transistor Saturation
Voltage
V
CC
= 16.5V 0.8 V 1, 3
1.0 V 2
V
R
Reset Voltage V
CC
= 16.5V (Note 4),
(Note 5) 0.1 1.3 V 1, 2, 3
I
R
Reset Current V
CC
= 16.5V -1.6 mA 1, 2, 3
AC Parameters
Symbol Parameter Conditions Notes Min Max Unit Sub-
groups
t
PLH
Propagation Delay Time V
CC
= 4.5V 800 nS 9, 11
900 nS 10
V
CC
= 16.5V 800 nS 9, 11
900 nS 10
t
PHL
Propagation Delay Time V
CC
= 4.5V 12 µS 9, 10, 11
V
CC
= 16.5V 12 µS 9, 10, 11
LM555JAN
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Electrical Characteristics (Continued)
AC Parameters (Continued)
Symbol Parameter Conditions Notes Min Max Unit Sub-
groups
t
TLH
Transition Time V
CC
= 4.5V 300 nS 9, 10, 11
V
CC
= 16.5V 300 nS 9, 10, 11
t
THL
Transition Time V
CC
= 4.5V 300 nS 9, 10, 11
V
CC
= 16.5V 300 nS 9, 10, 11
t
DOH
Time Delay Output High
R
T
=1K
V
CC
= 4.5V 106.7 113.3 µS 9, 10, 11
V
CC
= 16.5V 106.7 113.3 µS 9, 10, 11
Time Delay Output High
R
T
= 100K
V
CC
= 4.5V 10.67 11.33 mS 9, 10, 11
V
CC
= 16.5V 10.67 11.33 mS 9, 10, 11
t
D
/V
CC
Drift In Time Delay V
CC
= 12,
V
CC
= 4.5V to 16.5V (Note 6) -220 220 nS/V 9
t
D
/T Temperature Coefficient of
Time Delay
V
CC
= 16.5V -11 11 nS/˚C 10, 11
t
Ch
Capacitor Charge Time
R
T
=1K
V
CC
= 4.5V 120 156 µS 9, 10, 11
V
CC
= 16.5V 120 156 µS 9, 10, 11
Capacitor Charge Time
R
T
= 100K
V
CC
= 4.5V 11.3 15 mS 9, 10, 11
V
CC
= 16.5V 11.3 15 mS 9, 10, 11
t
Dis
Capacitor Discharge Time
R
T
=1K
V
CC
= 4.5V 57.5 80 µS 9, 10, 11
V
CC
= 16.5V 57.5 80 µS 9, 10, 11
Capacitor Discharge Time
R
T
= 100K
V
CC
= 4.5V 5.4 7.7 mS 9, 10, 11
V
CC
= 16.5V 5.4 7.7 mS 9, 10, 11
t
Ch
/
V
CC
Drift In Capacitor Charge Time V
CC
= 12,
V
CC
= 4.5V to 16.5V -820 820 nS/V 9
t
Ch
/T Temperature Coefficient
Capacitor Charge Time
V
CC
= 16.5V (Note 6) -68 68 nS/˚C 10, 11
t
Res
Reset Time V
CC
= 16.5V 1.5 µS 9, 11
2.0 µS 10
DC Drift Parameters
Delta calculations performed on JAN S devices at Group B, Subgroup 5, only.
Symbol Parameter Conditions Notes Min Max Unit Sub-
groups
V
Trig
Trigger Voltage V
CC
= 16.5V -0.05 0.05 V 1
V
Th
Threshold Voltage V
CC
= 16.5V -0.05 0.05 V 1
V
OL
Logical "0" Output Voltage V
CC
= 16.5V, I
Sink
= 10mA -0.05 0.05 V 1
I
CEX
Discharge Transistor Leakage
Current
V
CC
= 16.5V -50 50 nA 1
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximum junction temperature), θJA (package
junction to ambient thermal resistance), and TA(ambient temperature). The maximum allowable power dissipation at any temperature is PDmax =(T
Jmax -T
A)/θJA
or the number given in the Absolute Maximum Ratings, whichever is lower.
Note 3: Human body model, 1.5Kin series with 100pF.
Note 4: Parameter tested go-no-go, only.
Note 5: Datalog reading of 0.7V will reflect the Reset Voltage levels passing and a reading of 0.5V or 1.5V reflects the Reset voltage levels failing the low level or
high level respectfully.
Note 6: Calculated parameter.
LM555JAN
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Typical Performance Characteristics
Minimum Pulse Width
Required for Triggering
Supply Current vs.
Supply Voltage
20153704 20153719
High Output Voltage vs.
Output Source Current
Low Output Voltage vs.
Output Sink Current
20153720 20153721
Low Output Voltage vs.
Output Sink Current
Low Output Voltage vs.
Output Sink Current
20153722 20153723
LM555JAN
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Typical Performance Characteristics (Continued)
Output Propagation Delay vs.
Voltage Level of Trigger Pulse
Output Propagation Delay vs.
Voltage Level of Trigger Pulse
20153724 20153725
Discharge Transistor (Pin 7)
Voltage vs. Sink Current
Discharge Transistor (Pin 7)
Voltage vs. Sink Current
20153726 20153727
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Applications Information
MONOSTABLE OPERATION
In this mode of operation, the timer functions as a one-shot
(Figure 1). The external capacitor is initially held discharged
by a transistor inside the timer. Upon application of a nega-
tive trigger pulse of less than 1/3 V
CC
to pin 2, the flip-flop is
set which both releases the short circuit across the capacitor
and drives the output high.
The voltage across the capacitor then increases exponen-
tially for a period of t = 1.1 R
A
C, at the end of which time the
voltage equals 2/3 V
CC
. The comparator then resets the
flip-flop which in turn discharges the capacitor and drives the
output to its low state. Figure 2 shows the waveforms gen-
erated in this mode of operation. Since the charge and the
threshold level of the comparator are both directly propor-
tional to supply voltage, the timing internal is independent of
supply.
During the timing cycle when the output is high, the further
application of a trigger pulse will not effect the circuit so long
as the trigger input is returned high at least 10µs before the
end of the timing interval. However the circuit can be reset
during this time by the application of a negative pulse to the
reset terminal (pin 4). The output will then remain in the low
state until a trigger pulse is again applied.
When the reset function is not in use, it is recommended that
it be connected to V
CC
to avoid any possibility of false
triggering.
Figure 3 is a nomograph for easy determination of R, C
values for various time delays.
NOTE: In monostable operation, the trigger should be driven
high before the end of timing cycle.
ASTABLE OPERATION
If the circuit is connected as shown in Figure 4 (pins 2 and 6
connected) it will trigger itself and free run as a multivibrator.
The external capacitor charges through R
A
+R
B
and dis-
charges through R
B
. Thus the duty cycle may be precisely
set by the ratio of these two resistors.
In this mode of operation, the capacitor charges and dis-
charges between 1/3 V
CC
and 2/3 V
CC
. As in the triggered
mode, the charge and discharge times, and therefore the
frequency are independent of the supply voltage.
20153705
FIGURE 1. Monostable
20153706
VCC = 5V Top Trace: Input 5V/Div.
TIME = 0.1 ms/DIV. Middle Trace: Output 5V/Div.
RA= 9.1kBottom Trace: Capacitor Voltage 2V/Div.
C = 0.01µF
FIGURE 2. Monostable Waveforms
20153707
FIGURE 3. Time Delay
20153708
FIGURE 4. Astable
LM555JAN
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Applications Information (Continued)
Figure 5 shows the waveforms generated in this mode of
operation.
The charge time (output high) is given by:
t
1
= 0.693 (R
A
+R
B
)C
And the discharge time (output low) by:
t
2
= 0.693 (R
B
)C
Thus the total period is:
T=t
1
+t
2
= 0.693 (R
A
+2R
B
)C
The frequency of oscillation is:
Figure 6 may be used for quick determination of these RC
values.
The duty cycle is:
FREQUENCY DIVIDER
The monostable circuit of Figure 1 can be used as a fre-
quency divider by adjusting the length of the timing cycle.
Figure 7 shows the waveforms generated in a divide by three
circuit.
PULSE WIDTH MODULATOR
When the timer is connected in the monostable mode and
triggered with a continuous pulse train, the output pulse
width can be modulated by a signal applied to pin 5. Figure
8shows the circuit, and in Figure 9 are some waveform
examples.
20153709
VCC = 5V Top Trace: Output 5V/Div.
TIME = 20µs/DIV. Bottom Trace: Capacitor Voltage 1V/Div.
RA= 3.9k
RB=3k
C = 0.01µF
FIGURE 5. Astable Waveforms
20153710
FIGURE 6. Free Running Frequency
20153711
VCC = 5V Top Trace: Input 4V/Div.
TIME = 20µs/DIV. Middle Trace: Output 2V/Div.
RA= 9.1kBottom Trace: Capacitor 2V/Div.
C = 0.01µF
FIGURE 7. Frequency Divider
20153712
FIGURE 8. Pulse Width Modulator
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Applications Information (Continued)
PULSE POSITION MODULATOR
This application uses the timer connected for astable opera-
tion, as in Figure 10, with a modulating signal again applied
to the control voltage terminal. The pulse position varies with
the modulating signal, since the threshold voltage and hence
the time delay is varied. Figure 11 shows the waveforms
generated for a triangle wave modulation signal.
LINEAR RAMP
When the pull-up resistor, R
A
, in the monostable circuit is
replaced by a constant current source, a linear ramp is
generated. Figure 12 shows a circuit configuration that will
perform this function.
Figure 13 shows waveforms generated by the linear ramp.
The time interval is given by:
V
BE
.0.6V
20153713
VCC = 5V Top Trace: Modulation 1V/Div.
TIME = 0.2 ms/DIV. Bottom Trace: Output Voltage 2V/Div.
RA= 9.1k
C = 0.01µF
FIGURE 9. Pulse Width Modulator
20153714
FIGURE 10. Pulse Position Modulator
20153715
VCC = 5V Top Trace: Modulation Input 1V/Div.
TIME = 0.1 ms/DIV. Bottom Trace: Output 2V/Div.
RA= 3.9k
RB=3k
C = 0.01µF
FIGURE 11. Pulse Position Modulator
20153716
FIGURE 12.
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Applications Information (Continued)
50% DUTY CYCLE OSCILLATOR
For a 50% duty cycle, the resistors R
A
and R
B
may be
connected as in Figure 14. The time period for the output
high is the same as previous, t
1
= 0.693 R
A
C. For the output
low it is t
2
=
Thus the frequency of oscillation is
Note that this circuit will not oscillate if R
B
is greater than 1/2
R
A
because the junction of R
A
and R
B
cannot bring pin 2
down to 1/3 V
CC
and trigger the lower comparator.
ADDITIONAL INFORMATION
Adequate power supply bypassing is necessary to protect
associated circuitry. Minimum recommended is 0.1µF in par-
allel with 1µF electrolytic.
Lower comparator storage time can be as long as 10µs
when pin 2 is driven fully to ground for triggering. This limits
the monostable pulse width to 10µs minimum.
Delay time reset to output is 0.47µs typical. Minimum reset
pulse width must be 0.3µs, typical.
Pin 7 current switches within 30ns of the output (pin 3)
voltage.
20153717
VCC = 5V Top Trace: Input 3V/Div.
TIME = 20µs/DIV. Middle Trace: Output 5V/Div.
R1= 47kBottom Trace: Capacitor Voltage 1V/Div.
R2= 100k
RE= 2.7 k
C = 0.01 µF
FIGURE 13. Linear Ramp
20153718
FIGURE 14. 50% Duty Cycle Oscillator
LM555JAN
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Revision History
Date
Released
Revision Section Originator Changes
08/04/05 A New Release to corporate format L. Lytle 1 MDS datasheet converted into corporate
format. MJLM555-X Rev 1A0 to be archived
LM555JAN
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Physical Dimensions inches (millimeters) unless otherwise noted
8LD Ceramic Dip Package (J)
NS Package Number J08A
LM555JAN
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
8LD Metal Can Package (H)
NS Package Number H08A
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves
the right at any time without notice to change said circuitry and specifications.
For the most current product information visit us at www.national.com.
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LM555JAN Timer