NCV7608DWR2G - ON Semiconductor

December, 2010 − Rev. 2

1Publication Order Number:

NCV7608/D

NCV7608

Octal Configurable

Low/High Side Driver

The NCV7608 integrates 8 output drivers configurable in any

combination of high−side, low−side, or H−Bridge configurations. The

integrated standard Serial Peripheral Interface (SPI) allows digital

control of all output stages and provides diagnostic fault information.

In addition, four channels (#5−8) can be PWM controlled via external

control input pins.

Integrated clamping circuits (both in high and low−side operational

modes), waveshaping, positive and negative transient protection, and

dedicated channel pair overtemperature shutdown circuits provide for

a wide range of automotive and industrial applications.

Features

•Eight Independent Configurable Drivers

•RDS(on) = 1.2 W (typ @25°C)

•SPI Interface for Data Communication

♦16 Bit Frame Length, Daisy Chain Compatible

♦3.3 V/5 V Compatible

♦Frame Detection

•PWM Inputs for 4 Outputs

•Ultra−low Standby Current

•Over Current Protection

♦Characterized to AEC Q10X−12−REV A

•High−Side and Low−Side Flyback Protection

•Fault Reporting

•Undervoltage Lockout (VS and VCC)

•Overvoltage Shutdown (VS)

•Supports LED Loads

•Supports Cold Cranking Operation Down to 3 V

•Overtemperature Protection

•These are Pb−Free Devices

Typical Applications

•Automotive

•Industrial

A = Assembly Location

WL = Wafer Lot

YY = Year

WW = Work Week

G = Pb−Free Package

MARKING DIAGRAM

PIN CONNECTIONS

SOIC−28

DW SUFFIX

CASE 751F

http://onsemi.com

NCV7608

AWLYYWWG

CSB

SCLK

IN8

IN7

IN6

IN5

VCC

GND

See detailed ordering and shipping information in the package

dimensions section on page 22 of this data sheet.

ORDERING INFORMATION

NCV7608

http://onsemi.com

SPI

IN5

IN8

VCC

CSB

SCLK

GND

Bias +

Supply monitoring

IN6

IN7

Figure 1. Block Diagram (See Figure 2 for detailed diagram)

NCV7608

http://onsemi.com

D5..8

S5..8

IN5

IN6

VCC

CSB

SCLK

GND

Core Functions +

Supply Monitoring

Overtemp

Overcurrent

Fault

Gate Drive

Control

D1..4

S1..4

Overtemp

Overcurrent

Open Load

Fault

Gate Drive

Control

Open Load

IN7

IN8

Charge Pump

Overtemp

Channels

1&2

Overtemp

Channels

3&4

Overtemp

Channels

5&6

Overtemp

Channels

7&8

Channels

5-8

Channels

1-4

To Channels 5-8

Waveshaping

Slew Rate Control

Waveshaping

Slew Rate Control

Figure 2. Detailed Block Diagram

NCV7608

http://onsemi.com

PACKAGE PIN DESCRIPTION

Pin # Symbol Description

1 D2 Drain of configurable driver #2

2 S2 Source of configurable driver #2

3 S1 Source of configurable driver #1

4 D1 Drain of configurable driver #1

5 CSB SPI Chip Select “Bar” (100 kW pullup resistor to VCC)

6 SCLK SPI clock (100 kW pulldown resistor)

7 SI SPI serial data input (100 kW pulldown resistor)

8 VCC Logic Supply Input Voltage

9 SO SPI serial data output

10 GND Ground – Device substrate

11 D5 Drain of configurable driver #5

12 S5 Source of configurable driver #5

13 S6 Source of configurable driver #6

14 D6 Drain of configurable driver #6

15 D7 Drain of configurable driver #7

16 S7 Source of configurable driver #7

17 S8 Source of configurable driver #8

18 D8 Drain of configurable driver #8

19 EN Global Enable (active high) (100 kW pulldown resistor)

20 IN5 PWM control input for driver #5, (active high) (100 kW pulldown resistor)

Ground if not used.

21 IN6 PWM control input for driver #6, (active high) (100 kW pulldown resistor)

Ground if not used.

22 IN7 PWM control input for driver #7, (active high) (100 kW pulldown resistor)

Ground if not used.

23 IN8 PWM control input for driver #8, (active high) (100 kW pulldown resistor)

Ground if not used.

24 VS Battery Supply Input Voltage.

25 D4 Drain of configurable driver #4

26 S4 Source of configurable driver #4

27 S3 Source of configurable driver #3

28 D3 Drain of configurable driver #3

NCV7608

http://onsemi.com

MAXIMUM RATINGS (Voltages are with respect to device substrate)

Rating Symbol Value Unit

Digital supply input voltage (VCC) VCCmax −0.3 to 7 V

Battery supply input voltage (VS)

DC input supply voltage

Transient input supply voltage

VSDCmax

VSACmax

−0.3 to 34

−0.3 to 40

Digital I/O pin voltage (IN5, IN6, IN7, IN8, SI, SO, CSB, SCLK, EN) VIOmax −0.3 to 7 V

Configured for High−Side Operation

Drain = VS

Source Output DC Voltage (S1−S8)

Transient Source Output voltage (S1−S8)

VSHSXDCmax

VSHSXACmax

−1 to 34

−29 to 34

Configured for Low−Side Operation

Source = GND

Drain Output DC Voltage (D1−D8)

Transient Drain Output Voltage (D1−D8)

VDLSXDCmax

VDLSXACmax

−1 to 34 (Note 1)

−1 to 48 (Note 2)

Clamping energy

Maximum (single pulse)

Repetitive (multiple pulse) (Note )3

Wmax

Wrep

100

Electrostatic Discharge (VS, D1−D8, S1−S8)

Human Body Model (100 pF, 1.5 kW)

Machine Model (200 pF)

Charged Device

ESD4

−4000 to 4000

−200 to 200

−1000 to 1000

Electrostatic Discharge (All Other Pins)

Human Body Model (100 pF, 1.5 kW)

Machine Model (200pF)

Charged Device

ESD2

−2000 to 2000

−200 to 200

−1000 to 1000

AECQ10x−12−REVA

SHORT−CIRCUIT

RELIABILITY CHARACTERIZATION AECsc Grade B

Moisture Sensitivity Level MSL MSL3 −

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the

Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect

device reliability.

1. In this configuration lower voltage limit is due to drain−gate clamp.

2. Internally limited.

3. 1638000 pulses (triangular), 350 mA peak, VS = 18 V, 47 W, 410 mH, TA = 85°C.

RECOMMENDED OPERATING CONDITIONS

Rating Symbol

Value

Unit

Min Max

Digital supply input voltage (VCC) VCCop 3.15 5.25 V

Battery supply input voltage (VS) Vsop 5.528 V

DC Output current (Sx,Dx) Ixop −350 mA

Junction temperature TJ−40 150 °C

THERMAL CONDITIONS

Thermal Parameters Min Max Unit

Junction−to−Lead (YJL, YJL)25 40 °C/W

Junction−to−Ambient (RqJA, qJA) (Note 4) −82 °C/W

4. 1 oz copper, 300 mm2 copper area, 0.062″ thick FR4.

NCV7608

http://onsemi.com

ELECTRICAL CHARACTERISTICS (−40°C < TJ < 150°C, 5.5 V < VS < 28 V, 3.15 V < VCC < 5.25 V, EN = VCC, unless otherwise

specified)

Characteristic Symbol Conditions Min Typ Max Unit

GENERAL PARAMETERS

VS Supply Current

Standby (Note 5)

Run (Note 6)

IQVS85

IVSop

En = 0 V, 0 V v VCC v 5.25 V, Dx = VS

= 13.2 V, Sx = 0 V, −40°C < TJ < 85°C

All channels Active

−

VCC Supply Current

Standby (Note 7)

Run

IQVCC

IVCCop

EN = 0 V, CSB = VCC, −40°C < TJ < 85°C

all channels active, I(SO) = 0

−

VCC Power−on reset Threshold VCCPOR VCC increasing 2.6 2.8 3.0 V

VCC Power−on reset Hysteresis VCChys 100 200 −mV

VS Undervoltage Threshold VSUV VS increasing 2.5 2.8 3.0 V

VS Undervoltage Hysteresis VSUhys 100 200 −mV

VS Overvoltage Threshold VSOV VS increasing 32 36 40 V

VS Overvoltage Hysteresis VSOhys 1.0 2.5 4.0 V

THERMAL RESPONSE

Thermal Warning TW Not ATE tested 120 145 170 °C

Thermal Warning Hysteresis TWH Not ATE tested −30 −°C

Overtemperature Shutdown TLIM Not ATE tested 155 175 195 °C

Overtemperature Shutdown

hysteresis

TLIMHY Not ATE tested −30 −°C

Ratio of Overtemperature

Shutdown to Thermal Warning

TSTOTW Not ATE tested 1.05 1.20 −°C/°C

POWER OUTPUTS, DC CHARACTERISTICS

Output Transistor RDS(on)

(Note 8)

RonOPx

RonVSminx

RonVS3

VS = 8 V, I(Dx) = 200 mA

VS = 5.5 V, I(Dx) = 200 mA

VS = 3 V, I(Dx) = 200 mA

−

1.2

1.4

1.6

2.8

5.6

9.9

Output Leakage Current (Note 9) Ilkgx VS = Dx = 16 V, Sx = 0 V − − 5mA

Open Load Diagnostic Sink

Current Low Side

IdiagLSx Dx = 2.6 V, Sx = 0 V, Output disabled 100

215

350mA

Open Load Diagnostic Source

Current High Side (Note 10)

IdiagHSx Dx = VS, Sx = VS − 2.6 V, Output

disabled

−40°C < TJ < 125°C−500 −330 −150

Open load detection threshold

voltage, VD (LS)

VOLDx 1.0 2.0 3.0 V

Open load detection threshold

voltage, VS (HS)

VOLSx VS−3 VS−

VS−1 V

Over Current (Note 11)

High−Side

Low−Side

IlimHS

IlimLS

VS = 16 V

−1.90

0.80

−1.35

1.35

−0.80

1.90

Output fault filter time

Over Current

Open Load

TFOC

TFOL

100

200

5. Refer to Figures 12 and 17 for the VS standby current behavior.

6. Refer to Figure 10. I(VS) versus Temperature.

7. Refer to Figure 16 for the VCC standby current behavior.

8. Refer to Figures 11 and 14 for RDS(on) behavior.

9. Refer to Figure 15 for output leakage current behavior.

10.Refer to Figures 18 and 19 for open load diagnostic current behavior.

11. Refer to Figure 13 for current limit behavior.

NCV7608

http://onsemi.com

ELECTRICAL CHARACTERISTICS (−40°C < TJ < 150°C, 5.5 V < VS < 28 V, 3.15 V < VCC < 5.25 V, EN = VCC, unless otherwise

specified)

Characteristic UnitMaxTypMinConditionsSymbol

OUTPUT CLAMPS

Output clamp Voltage

Drain with respect to Source

VOCLS I(Dx) = 50 mA

Source = GND 34 −48

Output clamp Voltage

Source with respect to GND

VOCHS I(Sx) = −50 mA, VS = 14 V

−29 −22 −16

POWER OUTPUTS, AC CHARACTERISTICS

Low Side Rise Time T_LSr 8 V < VS < 16 V

Rload = 70 W

10/90% criteria, Figure 4 −12 50

Low Side Fall Time T_LSf 8 V < VS < 16 V

Rload = 70 W

10/90% criteria, Figure 3 −12 50

High side Rise Time T_HSr 8 V < VS < 16 V

Rload = 70 W

10/90% criteria, Figure 3 −12 50

High side Fall Time T_HSf 8 V < VS < 16 V

Rload = 70 W

10/90% criteria, Figure 4 −12 50

Serial Control

Output turn−on time (High side

and Low−side configuration)

TDONs 8 V < VS < 16 V

CSB going high (at 90%)

to Vfinal going high (at 10%)

or Vfinal going low (at 90%)

Rload = 70 W, Figure 3

1 −50

Serial Control

Output turn−off time (High side

and Low−side configuration)

TDOFFs 8 V < VS < 16 V

CSB going high (at 90%)

to Vfinal going low (at 90%)

or Vfinal going high (at 10%)

Rload = 70 W, Figure 4 1

−100

Parallel Control

Output turn−on time (High side

and Low−side configuration)

TDONp 8 V < VS < 16 V

Inx going high (at 90%)

to Vfinal going high (at 10%)

or Vfinal going low (at 90%)

Rload = 70 W, Figure 5 1 −50

Parallel Control

Output turn−off time (High side

and Low−side configuration)

TDOFFp 8 V < VS < 16 V

Inx going low (at 10%)

to Vfinal going low (at 90%)

or Vfinal going high (at 10%)

Rload = 70 W, Figure 6 1 −100

NCV7608

http://onsemi.com

CSB

High−Side

Low−Side

Figure 3. Serial Turn On

CSB

High−Side

Low−Side

Figure 4. Serial Turn Off

INx

High−Side

Low−Side

Figure 5. Parallel Turn On

INx

High−Side

Low−Side

Figure 6. Parallel Turn Off

END

INx

Figure 7. EN Delay Time

SPIWak

CSB

SCLK

10 MHz

Figure 8. SPI Wake Up

T_HSv

T_LSf

TDONS

TDOFFS

T_HSf

T_LSv

TDONP

TDOFFP

T_HSf

NCV7608

http://onsemi.com

Table 1. DIGITAL INTERFACE CHARACTERISTICS

Characteristic Symbol Conditions Min Typ Max Unit

Digital Input High Threshold VINH 2.0 − − V

Digital Input Low Threshold VINL − − 0.6 V

Input Pulldown Resistance

(EN, SI, SCLK, IN5, IN6, IN7, IN8)

RPDx EN = SI = SCLK = VCC,

IN5 = IN6 = IN7 = IN8 = VCC

50 100 200 kW

Input Pullup Resistance (CSB) IPUCSB CSB = 0 V 50 100 200 kW

CSB Leakage to VCC ILCSx CSB = 5 V, VCC = 0 V − − 10 mA

Input Capacitance (Note 12) CINx Not ATE Tested − − 15 pF

SO – Output High VOUTH I(out) = −1 mA VCC − 1.0 − −V

SO – Output Low VOUTL I(out) = 1.6 mA − −0.4 V

SO Tristate Leakage ILSOx CSB = VCC −10 −10 mA

SO Tristate Input Capacitance

(Note 12)

CSOx Not ATE Tested − −15 pF

SCLK Frequency CLKf VCC = 5 V

VCC = 3.3 V

−

MHz

SCLK Clock Period CLKper VCC = 5 V

VCC = 3.3 V

200

500

−

SCLK High Time CLKH VCC = 5 V, Figure 9 85 − −ns

SCLK Low Time CLKL VCC = 5 V, Figure 9 85 − −ns

SCLK Setup Time CLKsup VCC = 5 V, Figure 9 85 − −ns

SI Setup Time Sisup VCC = 5 V, Figure 9 50 − −ns

SI Hold Time SIH VCC = 5 V, Figure 9 50 − −ns

CSB Setup Time Cssup VCC = 5 V, Figure 9 100 − −ns

CSB High Time CSH VCC = 5 V, Figure 9 200 − −ns

SO enable after CSB falling edge

(Note 12)

CStSOf VCC = 5 V, Figure 9 − −50 ns

SO disable after CSB rising edge

(Note 12)

CStSOr VCC = 5 V, Figure 9 − −50 ns

SO Rise Time SOR VCC = 5 V, Cload = 40 pF − −25 ns

SO Fall Time SOF VCC = 5 V, Cload = 40 pF − −25 ns

SO Valid Time (Note 12) SOV VCC = 5 V, Cload = 40 pF,

Figure 9

− −50 ns

EN Low Valid Time ENL 10 − − ms

EN Delay Time END VCC = INx = 5 V

EN going high 50% to OUT5 −

OUT8 turning on 50%.

− − 100 ms

SPI wake up after EN rising edge SPIWak SI = 5 V, CSB = 0 V, SCLK =

10 MHz, EN going high 50%

to SO going high 50%,

Figure 8

− − 200 ms

12.Not subject to production testing.

NCV7608

http://onsemi.com

CSB

SCLK

CSSUP

CLKHCLKL

CLKSUP

CSSUP

CStSOv

CSB

SOV

SIH

SCLK

Figure 9. Detailed SPI Timing

CLKSUP

CSH

CStSOf

SISUP

NCV7608

http://onsemi.com

TYPICAL PERFORMANCE CHARACTERISTICS

Figure 10. I(VS) vs. Temperature Figure 11. RDS(on) vs. Temperature

Figure 12. I(VS) Standby Current vs. VS at 255CFigure 13. Output Over Current vs.

Temperature

Figure 14. RDS(on) vs. VS Figure 15. Standby Output Leakage vs. VS

0.0

1.0

2.0

3.0

4.0

5.0

6.0

−50 0 50 100 150 200

VS = 3 V, HS

VS = 5.5 V, HS

VS = 3 V, LS

VS = 8 V, HS

VS = 5.5 V, LS

VS = 8 V, LS

RDS(on) (W)

TEMPERATURE (°C)

1.380

1.400

1.420

1.440

1.460

1.480

1.500

1.520

1.540

−50 0 50 100 150 200

ILIM (A)

TEMPERATURE (°C)

VS = 16 V, HS

VS = 16 V, LS

TEMPERATURE (°C)

I(VS) (mA)

1.00

2.00

3.00

4.00

5.00

6.00

7.00

8.00

9.00

−1.00

1.00

2.00

3.00

4.00

5.00

6.00

7.00

8.00

9.00

I(VS) (mA)

VS (V)

0.5

1.5

2.5

3.5

0.5

1.5

2.5

3.5

RDS(on) (W)

VS (V)

LS Driver

HS Driver

−2

0 5 10 15 20 25 30 35

DRAIN AND SUPPLY VOLTAGE (V)

OUTPUT LEAKAGE (mA)

−40°C

125°C

25°C

150°C

0 5 10 1515 20 3025

0 5 10 15 20 3025−5

0.5

1.0

1.5

2.0

2.5

−50 0 50 100 150 200

VS = 28 V, VCC = 5.5 V

VS = 28 V, VCC = 3.15 V

VS = 5.5 V, VCC = 5.25 V

VS = 5.5 V, VCC = 3.15 V

NCV7608

http://onsemi.com

TYPICAL PERFORMANCE CHARACTERISTICS

Figure 16. I(VCC) vs. Temperature Figure 17. VS Standby Current vs.

Temperature

Figure 18. Open Load Detect Current vs.

Temperature

Figure 19. Open Load Detect Current vs. VS @

255C

Figure 20. Source−to−Drain Voltage Body

Diode

Figure 21. Output Clamp vs. Temperature

−500

−400

−300

−200

−100

100

200

300

0 5 10 15 20 25 30

OPEN LOAD DIAGNOSTIC CURRENT (mA)

VS (V)

High Side

Low Side

I(VS) (mA)

−2

−50 0 50 100 150 200

TEMPERATURE (°C)

VS = 28 V, VCC = 3.15 V

VS = 13.2 V, VCC = 3.15 V

VS = 28 V, VCC = 5.25 V

VS = 13.2 V, VCC = 5.25 V

VS = 5.5 V, VCC = 5.25 V

VS = 5.5 V, VCC = 3.15 V

300

200

100

−100

−200

−300

−400

−500

OPEN LOAD DIAGNOSTIC CURRENT (mA)

TEMPERATURE (°C)

−50 0 50 100 150

LS, VS = 28 V

LS, VS = 5.5 V

HS, VS = 5.5 V

HS, VS = 28 V

−30

−20

−10

−50 0 50 100 150 200

CLAMP VOLTAGE (V)

TEMPERATURE (°C)

Drain−to−Source Clamp

Source−to−Ground Clamp

V(Diode) (V)

I(Diode) (A)

1.20

1.00

0.60

0.80

0.40

0.20

0.00

0 0.10 0.20 0.30 0.40

−40°C

25°C

125°C

150°C

TEMPERATURE (°C)

I(VCC) (mA)

−0.5

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

VS = 5.5 V,

VCC = 5.25 V

−50 0 50 100 150 200

VS = 5.5 V, VCC = 3.15 V

VS = 28 V, VCC = 5.25 V

VS = 28 V,

VCC = 3.15 V

NCV7608

http://onsemi.com

DETAILED OPERATING DESCRIPTION

Normal Operation

Power Outputs

The NCV7608 provides eight independent power

transistors with pins D1−D8, and S1−S8 as drain and source

outputs respectively. For High−side Drive configurations

(sourcing), the drain pins are connected to the battery supply.

In Low−Side configurations (sinking), the drain pins are

connected to the load. All outputs may be configured as

high−side, low−side, half−bridge, or H−bridge. Internal

clamping structures are provided to limit transient voltages

when switching inductive loads.

SPI−Interface

The device provides a 16 bit SPI−interface. Data is

imported into the NCV7608 through the SI (serial input) pin.

Data is exported out of the NCV7608 through the SO (serial

output) pin. The input−frame (SI) is used to command the

output stages and program individual channel open load

diagnostics. The response frame (SO) provides

channel−specific (1bit / channel) status information and

fault information. See Table 1 for channel status decoding.

Words should be composed of 16 bits LSB (least significant

bit) transmitted first.

Figure 22. SPI Frame

CSB

SCLK

OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 OL1 OL2 OL3 OL4 OL5 OL6 OL7 OL8

TW OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 IN5

State IN6

State IN7

State IN8

State N/A N/A VS

PSM

CSB

SCLK

OL7 OL8

N/A VS

PSM

OUT1

Figure 23. SPI Frame Detail

NCV7608

http://onsemi.com

Table 2. SPI INPUT / OUTPUT

Input Data Output Data

Bit

Number Bit Description Bit Status

Bit

Number Bit Description Bit Status

15 Driver 8

Open Diagnostic Enable

0 = Disable 15 VS Power Supply

Monitoring

0 = No Fault

1 = Enable 1 = Fault

14 Driver 7

Open Diagnostic Enable

0 = Disable 14 N/A 0

1 = Enable

13 Driver 6

Open Diagnostic Enable

Driver 6

Open Diagnostic Enable

0 = Disable 13 N/A 0

1 = Enable

12 Driver 5

Open Diagnostic Enable

0 = Disable 12 IN8 State (Note 13) 0 = (IN8 = 0)

1 = Enable 1 = (IN8 = 1)

11 Driver 4

Open Diagnostic Enable

0 = Disable 11 IN7 State (Note 13) 0 = (IN7 = 0)

1 = Enable 1 = (IN7 = 1)

10 Driver 3

Open Diagnostic Enable

0 = Disable 10 IN6 State (Note 13) 0 = (IN6 = 0)

1 = Enable 1 = (IN6 = 1)

9Driver 2

Open Diagnostic Enable

0 = Disable 9IN5 State (Note 13) 0 = (IN5 = 0)

1 = Enable 1 = (IN5 = 1)

8Driver 1

Open Diagnostic Enable

0 = Disable 8Driver 8 Status 0 = No Fault

1 = Enable 1 = Fault

7Driver 8 Enable 0 = Disable 7Driver 7 Status 0 = No Fault

1 = Enable 1 = Fault

6Driver 7 Enable 0 = Disable 6Driver 6 Status 0 = No Fault

1 = Enable 1 = Fault

5Driver 6 Enable 0 = Disable 5Driver 5 Status 0 = No Fault

1 = Enable 1 = Fault

4Driver 5 Enable 0 = Disable 4Driver 4 Status 0 = No Fault

1 = Enable 1 = Fault

3Driver 4 Enable 0 = Disable 3Driver 3 Status 0 = No Fault

1 = Enable 1 = Fault

2Driver 3 Enable 0 = Disable 2Driver 2 Status 0 = No Fault

1 = Enable 1 = Fault

1Driver 2 Enable 0 = Disable 1Driver 1 Status 0 = No Fault

1 = Enable 1 = Fault

0Driver 1 Enable 0 = Disable 0Thermal Warning

(TW)

0 = No Fault

1 = Enable 1 = Fault

An output driver (Driver Status) fault is either open load,

over current, or over temperature.

13.When over current or thermal shutdown fault occurs, bits 9 through 12 records the state of INx.

NCV7608

http://onsemi.com

SPI Input

Driver Enable (bits 0−7)

A zero turns the driver off.

A one turns the driver on.

Open Load Diagnostic (bits 8−15)

A zero programming bit disables the detection of an open

load condition.

A one programming bit enables the detection of an open load

condition.

Parallel Input (INx) State (bits 9−12)

The state of the parallel (PWM) input pins (Inx) are

mirrored to SPI output bits #9−12. When overcurrent or

thermal shutdown fault occurs, bits 9 through 12 record the

state of INx. This enables the user to distinguish an open load

fault from an over current fault when the NCV7608 is

operated from two isolated controllers for the SPI input and

the Parallel input.

SPI Output

Table 3. SO DRIVER STATUS INFORMATION SUMMARY (Bits 0−8, 15)

Driver

Enable

Open Load

Diagnostic

enable SO Feedback Status Information Reset Requirement

Disabled Disabled 0 N/A

Disabled Enabled 0 (No Open Load) N/A

1 (Open Load Detected) N/A

Enabled X 0 (No Fault) N/A

1 (Over Current) A valid SPI command with the offending Driver DISABLED is re-

ceived.

1 (VS Power supply fail) Any valid SPI command AND VS within limits

1 (Thermal Warning) N/A

1 (Thermal Shutdown) The over temperature goes away AND a valid SPI frame with the

offending driver pair DISABLED is received.

X=Don’t Care

Frame Detection

Input word integrity (SI) is evaluated by the use of a frame

consistency check. The word frame length is compared to an

n * 16 bit (where n is an integer) acceptable word length

before the data is latched into the input register. This

guarantees the proper word length has been imported and

allows for daisy chain operation applications.

The frame length detector is enabled with the CSB falling

edge and the SCLK rising edge.

SCLK must be low during the CSB rising edge.

Reference the valid SPI frame shown below.

CSB

SCLK

Frame detection starts

after the CSB falling edge

and the SCLK rising edge.

Internal Counter 910

11 12 13 14 15 16

Frame detection mode ends with

CSB rising edge.

Valid 16 bits shown

OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 OL1 OL2 OL3 OL4 OL5 OL6 OL7 OL8

12345678

Figure 24. Frame Detection

PWM Operation

Channels 5, 6, 7, and 8 can be controlled via the serial port

(SPI) or via the respective parallel port input pins

(IN5−IN8).

The SPI information is OR’d with the respective Parallel

input control pins (INx).

INx = 1 activates the output stage.

NCV7608

http://onsemi.com

INx = 0 deactivates the output stage.

Special attention should be paid to detection of over

current and open load conditions when operated in a pwm

mode. These faults are detected in a 100 ms (typ) time

window. Faults will not be detected at higher frequencies if

the time period of the input signal does not allow for 100 ms

detection time.

Handling of Fault Conditions

Table 4. FAULT SUMMARY TABLE

Fault Fault Memory Driver Condition Output Register Clear Requirement

Open Load None Allowed to turn on N/A

Over Current Latched Latched Off A valid SPI command is received with the

offending driver disabled

Thermal Warning None Allowed to turn/ remain on as

long as the device is not in

thermal shutdown

N/A

Thermal Shutdown Latched

(Note 14)

Latched Off The over temperature goes away AND a valid

SPI frame with the offending driver pair

DISABLED is received.

VS Power Supply Fail Latched

(Note 14)

Allowed to turn on while the

Voltage is within operating

range

After ANY valid SPI frame & voltage within

operating range

14.Latched conditions are cleared in the same manner (via the SPI port) during normal operation regardless of the driver turn on command path

(via a SPI command or via a parallel input command). Latches are also cleared by cycling the EN pin or with a power−on reset of VCC.

NCV7608

http://onsemi.com

Start

Driver ONYes

Open Load

TFOL

CSB Lo

Report

Fault

Fault Reported on SO

Yes

Current

Limit

Thermal

Warning

Thermal

Shutdown

VS Power

Supply Fail

TFOC

Delay

Yes

Over

Current

Thermal

Warning

Thermal

Shutdown

rVS Power

Supply Fail

Yes

Report

Fault Latch Fault Fault Reported on SO

CSB Lo

Report

Fault Latch Fault

Yes Report

Fault

Fault Reported on SO

Report

Fault Latch Fault

Figure 25. Fault Reporting Flow Chart

Fault Filters

The NCV7608 detects overtemperature, over current, VS

Power Supply and open load faults. Faults are reported in the

Output Data fault register. The fault filter timer for over

current or open load is 100 ms (typ). An over current or open

load event must exist for this period of time to be recognized.

There are eight fault timers, one dedicated to each driver for

use for both over current and open load. Thermal Warning,

Thermal Shutdown and VS Power Supply Fail each have

there own dedicated timers.

Open Load

Open Load conditions are detected in the off mode. See

“OFF−Mode Open Load Diagnostics” for details.

Over Current

The output current is limited in both high−side and

low−side configuration. Over Current is detected in the turn

on mode. High power dissipation during over current can

cause overtemperature shutdown. Over Current is a latched

off event. Latching off a driver in over current is especially

useful in systems utilizing a hierarchical software

architecture whereby the microprocessor sends a command

(such as turning a device on when a short circuit exists) and

then proceeds to other focused microprocessor activity.

Eliminating an auto retry upon over current fault detection

scheme reduces IC stress by reducing the frequency of

attempts to turn back on.

Thermal Warning & Overtemperature Shutdown

Four independent Overtemperature shutdown circuits are

featured (one common sensor for each drive pair). Channels

are sequentially paired together with its own thermal

detection circuit as Channels 1 and 2, Channels 3 and 4,

Channels 5 and 6, and Channels 7 and 8. Each thermal

detection circuit senses two temperature levels, one to give

a Thermal Warning (145°C typ) (TW, bit = 0), and one to

shut the driver pair off (Overtemperature) at a higher

temperature 30°C above TW (175°C typ). When the thermal

detection circuit reaches the temperature point of Thermal

Warning, the output data bit 0 (TW) will be set to a 1, and the

outputs will remain on. Overtemperature events will be

recorded as faults to the offending Output Driver pair

NCV7608

http://onsemi.com

independently of the input state (serial or parallel).

Overtemperature shutdown is a latched event.

Since thermal warning precedes an overtemperature

shutdown, software polling of this bit will allow for load

control and possible prevention of overtemperature

shutdown conditions.

Thermal Warning Retrieval

Thermal warning information can be retrieved

immediately without performing a complete SPI access

cycle. Figure 26 below displays how this is accomplished.

Bringing the CSB pin from a 1 to a 0 condition immediately

displays the information on the output data bit 0, thermal

warning, even in the absence of a SCLK signal. As the

temperature of the NCV7608 changes from a condition from

below the thermal warning threshold to above the thermal

warning threshold, the state of the SO pin changes and this

level is available immediately when the CSB goes to 0. A 0

on SO indicates there is no thermal warning, while a 1

indicates the IC is above the thermal warning threshold.

Figure 26. Accessing Thermal Warning Bit

Power Supply Monitoring

Undervoltage shutdown

Both supply voltages (VCC and VS) are monitored for

undervoltage. When VCC goes below the threshold, all

outputs are turned OFF and the input and output registers are

cleared. An undervoltage condition on VS will cause all

channels to shut down. The fault bit (Bit #15) is latched in

the Output Data Register. The channels will return to the

commanded status after reaching operational VS levels

provided VCC UVLO is not breached. The SPI port remains

active during VS undervoltage within a valid VCC voltage.

Drivers are guaranteed to operate with automotive cranking

voltages down to 3 V on VS per the undervoltage shutdown

thresholds. Bit# 15 is cleared with a valid SPI frame and VS

within the operating limits.

Overvoltage shutdown

VS is continuously monitored for overvoltage conditions.

The threshold is set above automotive jump start conditions

allowing operation of the IC during jump start. The

minimum overvoltage threshold is 32 V. When VS goes

above the overvoltage threshold voltage, all outputs are

turned OFF. The fault bit (Bit #15) is latched in the Output

Data Register. Input and output registers maintain all

information. The channels will return to the commanded

status after reaching operational VS levels provided VCC

UVLO is not breached. The SPI port remains active during

VS overvoltage within a valid VCC voltage. Bit #15 is

cleared with any valid SPI frame and VS within the

operating limits.

OFF−Mode Open Load Diagnostics

Open load diagnostics are performed when the drivers are

off (provided the channel is programmed to perform the

operation via Bits #8 through #15). Open load diagnostics

are performed by connecting two tracking current sources

(IDIAGHSx and IDIAGLSx) to the corresponding outputs.

To support both operation modes (high−side and low−side)

and provide minimum delay due to external capacitances,

both Drain and Source pin voltages of the device are

monitored to generate the diagnostic information. Channel

diagnostic information is directed to the output data register.

Open load diagnostics are disabled during VS undervoltage

or overvoltage events or when EN is low.

Figure 27 shows the NCV7608 open load diagnostics

principles.

Figure 28 shows the internal circuitry used with the device

set up as a low−side driver.

Figure 29 shows the internal circuitry used with the device

set up as a high−side driver.

NCV7608

http://onsemi.com

Figure 27. Open Load Diagnostic Principle

Figure 28. Open Load Circuitry as Low Side Driver Figure 29. Open Load Circuitry as High Side

Driver

Open Load Diagnostic Performance

System design sometimes requires open load diagnostics

to be turned off to prevent unintended operation. Input Bits

8−15 control this function.

One application example would be driving LED’s.

Leaving the diagnostic circuitry turned on would result in

visible illumination of the LED’s because of the currents

used in open load detection. Open load detection may still be

utilized by testing at low time intervals.

Miscellaneous

Enable

A logic low on EN puts the device in a current saving

mode. Quiescent current (VCC) with EN low is less than

5 mA. A logic high on EN powers up the device allowing

operation through the parallel inputs (IN5...IN8). An

internal pulldown resistor is provided to ensure device

turn−off in the event the enable signal is lost.

A low on EN will result in a power−on−reset to the logic.

All outputs will be shut off and all registers reset.

Loss of Ground

The NCV7608 output drivers will not be active during a

loss of ground condition. No damage to the device will occur

during this condition for VS less than or equal to 16 V.

Diagnostic Implementation

To provide maximum flexibility in using the device as an

H−Bridge driver, a current ratio between the HS and LS

diagnostic currents is implemented (the diagnostic source

current is always higher in magnitude than the diagnostic

NCV7608

http://onsemi.com

sink current). Equal diagnostic currents would result in

unpredictable results due to process variation.

Timing Information

Open Load

Open Load is reported if open load is enabled and an open

load fault exists.

Open Load is not a latched condition and is not reported

when drivers are on.

To be captured, Open Load must be present when CSB goes

low.

* SPI Driver Enable bit = 0 and associated INx = 0

OL enabled

Driver Off*

OL enabled

Driver Off

OL enabled

Driver Off

OL enabled

Driver Off

OL enabled

Driver Off

OL enabled

Driver On

OL disabled

Driver Off

CSB

No Fault Fault No Fault Fault No Fault Fault No FaultSO

Open Load

Exists

Open Load

Absent

OL disabled

Driver On

No Fault

Open Load

Exists

Open Load

Absent

Open Load

Exists

Driver

Turns On

Driver

Turns

No Open

Load Exists

Figure 30. Open Load Timing Diagram

Over Current

Over current is reported if the drivers’ over current

detection threshold is breached.

The driver is latched off after 100 ms from the over current

detection.

To reset the driver status bit for over current, a valid SPI

frame with ENx = 0 is required. This will reset the driver

status bit and the driver can be turned back on in the next

valid SPI frame.

Driver OnDriver OnDriver Off Driver OnCSB

No Fault Fault Fault No FaultSO

Over Current detected

Driver latched off

Over current

condition is

removed

Driver Turns On

Fault is Reset

INx=0

No Over Current

Detected.

Figure 31. Over Current Timing Diagram

Thermal Warning and Thermal Shutdown

Thermal Warning is reported in bit #0 when the die

temperature goes above 145°C (typ)

and does not fall below 145°C (typ) – 30°C hysteresis

(typ). Thermal Warning is only sampled and reported when

CSB is low.

Thermal Shutdown will turn off the two drivers associated

with the thermal sensor when the die temperature is above

175°C (typ). The driver status bit will be latched.

The driver status is reset if the die temperature falls below

175°C (typ) – 30°C (typ) and a valid SPI frame with the

Driver(s) x Enable bit = 0. The driver(s) can then be turned

on in the next valid SPI frame with the Driver x Enable(s) =

NCV7608

http://onsemi.com

Driver OnDriver OnDriver Off Driver OnCSB

No Fault Fault No Fault FaultSO

TW is detected

Driver continues to run

Thermal Warning

condition is removed

TW is detected

Driver continues to be off

No TW

detected

Figure 32. Thermal Warning Timing Diagram

Driver OnDriver OffDriver On

CSB

Fault Fault No Fault

T<(175°C-30°C)

TSD (T > 175°C)

Driver Off

Driver

Turns On

Fault Reset

Figure 33. Thermal Shutdown Timing Diagram

Power Supply Fail

VS Overvoltage (OV) or undervoltage (UV) is reported

using bit #15 (PSM) in the SO output data register. This is

a latched event.

Drivers will shut off during VS OV or UV.

When coming out of VS OV or UV, the drivers will take

on the state determined by the last valid SPI frame.

The VS Power Supply Monitoring bit (bit #15) will be

reset by any valid SPI frame.

NCV7608

http://onsemi.com

Figure 34. Power Supply Fail Timing Diagram

Assumes a valid SPI frame.

100

105

110

115

0 200 400 600 800 1000

Figure 35. qJA vs. Copper Heat Spreader

COPPER HEAT SPREADER AREA (mm2)

qJA (°C/W)

1.0 oz

2.0 oz

1.00

1.10

1.20

1.30

1.40

1.50

1.60

1.70

1.80

0 200 400 600 800 1000

Figure 36. Maximum Power vs. Copper Heat

Spreader

COPPER HEAT SPREADER AREA (mm2)

MAXIMUM POWER (W)

1.0 oz

2.0 oz

ORDERING INFORMATION

Device Package Shipping†

NCV7608DWR2G SOIC−28 WB

(Pb−Free)

1000 / Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

NCV7608

http://onsemi.com

PACKAGE DIMENSIONS

SOIC−28 WB

CASE 751F−05

ISSUE H

11.00

28X

0.52

28X 1.30

1.27

DIMENSIONS: MILLIMETERS

PITCH

SOLDERING FOOTPRINT*

14 15

0.025 Y S

0.25 Y M

SEATING

PLANE

DIM MIN MAX

MILLIMETERS

A2.35 2.65

A1 0.13 0.29

B0.35 0.49

C0.23 0.32

D17.80 18.05

E7.40 7.60

G1.27 BSC

H10.05 10.55

L0.41 0.90

M0 8

PIN 1 IDENT

0.10

−X−

−Y−

G−T−

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS D AND E DO NOT INCLUDE MOLD

PROTRUSION

4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.

5. DIMENSION B DOES NOT INCLUDE DAMBAR

PROTRUSION. ALLOWABLE DAMBER

PR5OTRUSION SHALL NOT BE 0.13 TOTATL IN

EXCESS OF B DIMENSION AT MAXIMUM

MATERIAL CONDITION.

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice

to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.

“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All

operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights

nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications

intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should

Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,

and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death

associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal

Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

PUBLICATION ORDERING INFORMATION

N. American Technical Support: 800−282−9855 Toll Free

USA/Canada

Europe, Middle East and Africa Technical Support:

Phone: 421 33 790 2910

Japan Customer Focus Center

Phone: 81−3−5773−3850

NCV7608/D

LITERATURE FULFILLMENT:

Literature Distribution Center for ON Semiconductor

P.O. Box 5163, Denver, Colorado 80217 USA

Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada

Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada

Email: orderlit@onsemi.com

ON Semiconductor Website: www.onsemi.com

Order Literature: http://www.onsemi.com/orderlit

For additional information, please contact your local

Sales Representative