PE42521MLBA-Z - PEREGRINE SEMICONDUCTOR

Page 1 of 16

Document No. DOC-12814-5 | www.psemi.com

RF1 RF2

50Ω

CMOS Control

Driver and ESD

ESD

RFC

LS VssEXT

ESD

CTRL

Figure 2. Package Type

16-lead 3x3 mm QFN

The PE42521 SPDT absorptive RF switch is designed for

use in Test/ATE and other high performance wireless

applications. This broadband general purpose switch

maintains excellent RF performance and linearity from

9 kHz through 13 GHz. This switch is a pin-compatible

upgraded version of PE42552 with fast switching time and

higher power handling of 36 dBm continuous wave (CW)

and 38.5 dBm instantaneous power in 50Ω @ 4 GHz. The

PE42521 exhibits high isolation, fast settling time, and is

offered in a 3x3 mm QFN package.

The PE42521 is manufactured on Peregrine’s

UltraCMOS® process, a patented variation of silicon-on-

insulator (SOI) technology on a sapphire substrate,

offering the performance of GaAs with the economy and

integration of conventional CMOS.

UltraCMOS® SPDT RF Switch

9 kHz – 13 GHz

Product Description

PE42521

Features

 HaRP™ technology enhanced

 Fast settling time of 2 s

 No gate and phase lag

 No drift in insertion loss and phase

 Fast switching time of 500 ns

 High power handling @ 4 GHz in 50Ω

 36 dBm CW

 38.5 dBm instantaneous power

 26 dBm terminated port

 High linearity

 65 dBm IIP3

 Low insertion loss

 0.75 dB @ 3 GHz

 1.15 dB @ 10 GHz

 1.85 dB @ 13 GHz

 High isolation

 44 dB @ 3 GHz

 30 dB @ 10 GHz

 17 dB @ 13 GHz

 ESD performance

 3kV HBM on RF pins to GND

 1.5kV HBM on all pins

 1kV CDM on all pins

Figure 1. Functional Diagram

Product Specification

DOC-50572

Document No. DOC-12814-5 | UltraCMOS® RFIC Solutions

Page 2 of 16

PE42521

Product Specification

Table 1. Electrical Specifications @ 25°C, VDD = 3.3V, VssEXT = 0V or VDD = 3.4V, VssEXT = -3.4V,

(ZS = ZL = 50Ω) unless otherwise noted

Parameter Path Condition Min Typ Max Unit

Operation frequency 9 kHz 13 GHz As

shown

Insertion loss RFC–RFX

9 kHz – 10 MHz

10 MHz – 3 GHz

3 GHz – 7.5 GHz

7.5 GHz – 10 GHz

10 GHz – 12 GHz

12 GHz – 13 GHz

0.60

0.75

0.95

1.15

1.75

1.85

0.80

1.00

1.20

1.40

2.20

2.60

dB

Isolation RFX–RFX

9 kHz – 10 MHz

10 MHz – 3 GHz

3 GHz – 7.5 GHz

7.5 GHz – 10 GHz

10 GHz – 12 GHz

12 GHz – 13 GHz

70

46

35

23

16

14

90

49

37

26

19

17

dB

Isolation RFC–RFX

9 kHz – 10 MHz

10 MHz – 3 GHz

3 GHz – 7.5 GHz

7.5 GHz – 10 GHz

10 GHz – 12 GHz

12 GHz – 13 GHz

80

42

39

26

18

14

90

44

41

30

21

17

dB

Return loss (active port) RFC-RFX

9 kHz – 10 MHz

10 MHz – 3 GHz

3 GHz – 7.5 GHz

7.5 GHz – 10 GHz

10 GHz – 12 GHz

12 GHz – 13 GHz

23

19

16

21

10

15

dB

Return loss (common port) RFC-RFX

9 kHz – 10 MHz

10 MHz – 3 GHz

3 GHz – 7.5 GHz

7.5 GHz – 10 GHz

10 GHz – 12 GHz

12 GHz – 13 GHz

23

19

16

21

10

16

dB

Return loss (terminated port) RFX

9 kHz – 10 MHz

10 MHz – 3 GHz

3 GHz – 7.5 GHz

7.5 GHz – 10 GHz

10 GHz – 12 GHz

12 GHz – 13 GHz

32

23

18

11

6

5

dB

Input 0.1 dB compression point1 RFC–RFX 600 MHz – 13 GHz Fig. 5 dBm

Input IP2 RFC–RFX 834 MHz, 1950 MHz 120 dBm

Input IP3 RFC–RFX 834 MHz, 1950 MHz, and 2700 MHz 65 dBm

Settling time 50% CTRL to 0.05 dB final value 2 4 μs

Switching time 50% CTRL to 90% or 10% of final value 500 700 ns

Note 1: The input 0.1 dB compression point is a linearity figure of merit. Refer to Table 3 for the RF input power PIN (50Ω)

PE42521

Page 3 of 16

Product Specification

Table 2. Pin Descriptions

Figure 3. Pin Configuration (Top View)

Pin # Pin Name Description

2 RF11 RF port 1

1, 3, 4, 5,

6, 8, 9, 10,

12

GND Ground

7 RFC1 RF common

11 RF21 RF port 2

13 VssEXT2 External Vss negative voltage control

14 CTRL Digital control logic input

15 LS Logic Select - used to determine the

definition for the CTRL pin (see Table 5)

16 VDD Supply voltage

Pad GND Exposed pad: ground for proper operation

Table 3. Operating Ranges

Parameter Symbol Min Typ Max Unit

Supply voltage (normal

mode, VssEXT = 0V)1 VDD 2.3 5.5 V

Supply voltage (bypass

mode, VssEXT = -3.4V,

VDD ≥ 3.4V for full spec.

compliance)2

VDD 2.7 3.4 5.5 V

Negative supply voltage

(bypass mode)2 VssEXT -3.6 -3.2 V

Supply current (normal

mode, VssEXT = 0V)1 IDD 120 200 µA

Supply current (bypass

mode, VssEXT = -3.4V)2 IDD 50 80 µA

Negative supply current

(bypass mode, VssEXT =

-3.4V)2

ISS -40 -16 µA

Digital input high

(CTRL) VIH 1.17 3.6 V

Digital input low (CTRL) VIL -0.3 0.6 V

Digital input current ICTRL 10 µA

RF input power, CW

(RFC-RFX)3

9 kHz ≤ 600 MHz

600 MHz ≤ 4 GHz

4 GHz ≤ 13 GHz

PIN-CW

Fig. 4

36

Fig. 5

dBm

RF input power, pulsed

(RFC-RFX)4

9 kHz ≤ 600 MHz

600 MHz ≤ 13 GHz

PIN-PULSED

Fig. 4

Fig. 5

dBm

RF input power, hot

switch, CW3

9 kHz ≤ 10 MHz

10 MHz ≤ 13 GHz

PIN-HOT

Fig. 4

20

dBm

RF input power into

terminated ports, CW

(RFX)3

9 kHz ≤ 30 MHz

30 MHz ≤ 13 GHz

PIN,TERM

Fig. 4

26

dBm

Operating temperature

range TOP -40 +25 +85 °C

Notes: 1. RF pins 2, 7, and 11 must be at 0V DC. The RF pins do not require

DC blocking capacitors for proper operation if the 0V DC requirement

is met

2. Use VssEXT (pin 13) to bypass and disable internal negative voltage

generator. Connect VssEXT (pin 13) to GND (VssEXT = 0V) to enable

internal negative voltage generator

GND

RFC

GND

RF1

GND

GND GND

GND

RF2

GND

VssEXT

CTRL

LS

VDD

1

16

15

14

13

12

11

10

9

5

6

7

8

2

3

4

Exposed Pad

Pin 1 dot

marking

Notes: 1. Normal mode: connect VssEXT (pin 13) to GND (VssEXT = 0V) to

enable internal negative voltage generator

2. Bypass mode: use VssEXT (pin 13) to bypass and disable internal

negative voltage generator

3. 100% duty cycle, all bands, 50Ω

4. Pulsed, 5% duty cycle of 4620 µs period, 50Ω

Document No. DOC-12814-5 | UltraCMOS® RFIC Solutions

Page 4 of 16

PE42521

Product Specification

Electrostatic Discharge (ESD) Precautions

When handling this UltraCMOS® device, observe

the same precautions that you would use with

other ESD-sensitive devices. Although this device

contains circuitry to protect it from damage due to

ESD, precautions should be taken to avoid

exceeding the rating specified.

Latch-Up Avoidance

Unlike conventional CMOS devices, UltraCMOS®

devices are immune to latch-up.

Table 5. Control Logic Truth Table

Logic Select (LS)

The Logic Select feature is used to determine the

definition for the CTRL pin.

Switching Frequency

The PE42521 has a maximum 25 kHz switching

rate when the internal negative voltage generator

is used (pin 13 = GND). The rate at which the

PE42521 can be switched is only limited to the

switching time (Table 1) if an external negative

supply is provided (pin 13 = VssEXT).

Switching frequency describes the time duration

between switching events. Switching time is the

time duration between the point the control signal

reaches 50% of the final value and the point the

output signal reaches within 10% or 90% of its

target value.

LS CTRL RFC-RF1 RFC-RF2

0 0 off on

0 1 on off

1 0 on off

1 1 off on

Moisture Sensitivity Level

The Moisture Sensitivity Level rating for the

PE42521 in the 16-lead 3x3 mm QFN package is

MSL3.

Optional External Vss Control (VssEXT)

For proper operation, the VssEXT control pin must

be grounded or tied to the Vss voltage specified in

Table 3. When the VssEXT control pin is grounded,

FETs in the switch are biased with an internal

negative voltage generator. For applications that

require the lowest possible spur performance,

VssEXT can be applied externally to bypass the

internal negative voltage generator.

Spurious Performance

The typical spurious performance of the PE42521

is -135 dBm when VssEXT = 0V (pin 13 = GND). If

further improvement is desired, the internal

negative voltage generator can be disabled by

setting VssEXT = -3.4V.

Table 4. Absolute Maximum Ratings

Parameter/Condition Symbol Min Max Unit

Supply voltage VDD -0.3 5.5 V

Digital input voltage (CTRL) VCTRL -0.3 3.6 V

LS input voltage VLS -0.3 3.6 V

RF input power, CW

(RFC-RFX)1

9 kHz ≤ 600 MHz

600 MHz ≤ 4 GHz

4 GHz ≤ 13 GHz

PIN-CW

Fig. 4

36

Fig. 5

dBm

RF input power, pulsed

(RFC-RFX)2

9 kHz ≤ 600 MHz

600 MHz ≤ 13 GHz

PIN-PULSED

Fig. 4

Fig. 5

dBm

RF input power into terminated

ports, CW (RFX)1

9 kHz ≤ 30 MHz

30 MHz ≤ 13 GHz

PIN,TERM

Fig. 4

26

dBm

Storage temperature range TST -65 +150 °C

ESD voltage HBM3

RF pins to GND

All pins

VESD,HBM

3000

1500

V

ESD voltage MM4, all pins VESD,MM 200 V

ESD voltage CDM5, all pins VESD,CDM 1000 V

Notes: 1. 100% duty cycle, all bands, 50Ω

2. Pulsed, 5% duty cycle of 4620 µs period, 50Ω

3. Human Body Model (MIL-STD 883 Method 3015)

4. Machine Model (JEDEC JESD22-A115)

5. Charged Device Model (JEDEC JESD22-C101)

Exceeding absolute maximum ratings may cause

permanent damage. Operation should be

restricted to the limits in the Operating Ranges

table. Operation between operating range

maximum and absolute maximum for extended

periods may reduce reliability.

PE42521

Page 5 of 16

Product Specification

Figure 4. Power De-rating Curve for 9 kHz – 600 MHz (50Ω)

Document No. DOC-12814-5 | UltraCMOS® RFIC Solutions

Page 6 of 16

PE42521

Product Specification

33

33.5

34

34.5

35

35.5

36

36.5

37

37.5

38

38.5

39

39.5

40

0 1 2 3 4 5 6 7 8 9 10 11 12 13

Input Power (dBm)

Frequency (GHz)

P0.1dB Compression @ 25°C Ambient

Max. RF Input Power, Pulsed @ 25°C Ambient

Max. RF Input Power, CW @ 25°C Ambient

0.1

33

33.5

34

34.5

35

35.5

36

36.5

37

37.5

38

38.5

39

39.5

40

012345678910 11 12 13

Input Power (dBm)

Frequency (GHz)

P0.1dB Compression @ 85°C Ambient

Max. RF Input Power, Pulsed @ 85°C Ambient

Max. RF Input Power, CW @ 85°C Ambient

0.1

Figure 5a. Power De-rating Curve for 600 MHz – 13 GHz @ 25°C Ambient (50Ω)

Figure 5b. Power De-rating Curve for 600 MHz – 13 GHz @ 85°C Ambient (50Ω)

PE42521

Page 7 of 16

Product Specification

Typical Performance Data @ 25°C and VDD = 3.4V unless otherwise specified

Figure 6. Insertion Loss vs. Temp (RFC–RF1) Figure 7. Insertion Loss vs. VDD (RFC–RF1)

Figure 8. Insertion Loss vs. Temp (RFC–RF2) Figure 9. Insertion Loss vs. VDD (RFC–RF2)

Document No. DOC-12814-5 | UltraCMOS® RFIC Solutions

Page 8 of 16

PE42521

Product Specification

Figure 10. RFC Port Return Loss vs. Temp

(RF1 Active)

Figure 11. RFC Port Return Loss vs. VDD

(RF1 Active)

Figure 12. RFC Port Return Loss vs. Temp

(RF2 Active)

Figure 13. RFC Port Return Loss vs. VDD

(RF2 Active)

Typical Performance Data @ 25°C and VDD = 3.4V unless otherwise specified

PE42521

Page 9 of 16

Product Specification

Figure 14. Active Port Return Loss vs. Temp

(RF1 Active)

Figure 15. Active Port Return Loss vs. VDD

(RF1 Active)

Figure 16. Active Port Return Loss vs. Temp

(RF2 Active)

Figure 17. Active Port Return Loss vs. VDD

(RF2 Active)

Typical Performance Data @ 25°C and VDD = 3.4V unless otherwise specified

Document No. DOC-12814-5 | UltraCMOS® RFIC Solutions

Page 10 of 16

PE42521

Product Specification

Figure 18. Terminated Port Return Loss vs. Temp

(RF1 Active)

Figure 19. Terminated Port Return Loss vs. VDD

(RF1 Active)

Figure 20. Terminated Port Return Loss vs. Temp

(RF2 Active)

Figure 21. Terminated Port Return Loss vs. VDD

(RF2 Active)

Typical Performance Data @ 25°C and VDD = 3.4V unless otherwise specified

PE42521

Page 11 of 16

Product Specification

Typical Performance Data @ 25°C and VDD = 3.4V unless otherwise specified

Figure 23. Isolation vs. VDD

(RF1–RF2, RF1 Active)

Figure 22. Isolation vs. Temp

(RF1–RF2, RF1 Active)

Figure 25. Isolation vs. VDD

(RF2–RF1, RF2 Active)

Figure 24. Isolation vs. Temp

(RF2–RF1, RF2 Active)

Document No. DOC-12814-5 | UltraCMOS® RFIC Solutions

Page 12 of 16

PE42521

Product Specification

Figure 26. Isolation vs. Temp

(RFC–RF2, RF1 Active)

Figure 27. Isolation vs. VDD

(RFC–RF2, RF1 Active)

Figure 28. Isolation vs. Temp

(RFC–RF1, RF2 Active)

Figure 29. Isolation vs. VDD

(RFC–RF1, RF2 Active)

Typical Performance Data @ 25°C and VDD = 3.4V unless otherwise specified

PE42521

Page 13 of 16

Product Specification

Evaluation Kit

The SPDT switch evaluation board was designed

to ease customer evaluation of Peregrine’s

PE42521. The RF common port is connected

through a 50Ω transmission line via the SMA

connector, J1. RF1 and RF2 ports are connected

through 50Ω transmission lines via SMA

connectors J2 and J3, respectively. A 50Ω

through transmission line is available via SMA

connectors J5 and J6, which can be used to

de-embed the loss of the PCB. J4 provides DC

and digital inputs to the device.

For the true performance of the PE42521 to be

realized, the PCB should be designed in such a

way that RF transmission lines and sensitive DC

I/O traces are heavily isolated from one another.

Figure 30. Evaluation Kit Layout

PRT-30186

Document No. DOC-12814-5 | UltraCMOS® RFIC Solutions

Page 14 of 16

PE42521

Product Specification

Figure 31. Evaluation Board Schematic

Notes: 1. Use PRT-30186-02 PCB

2. CAUTION: Contains parts and assemblies susceptible

to damage by electrostatic discharge (ESD)

DOC-12827

PE42521

Page 15 of 16

Product Specification

Figure 32. Package Drawing

16-lead 3x3 mm QFN

Figure 33. Top Marking Specifications

42521

YYWW

ZZZZZZ

DOC-66053

DOC-58196

= Pin 1 designator

YY = Last two digits of assembly year

WW = Assembly work week

ZZZZZZ = Assembly lot code (maximum six characters)

Document No. DOC-12814-5 | UltraCMOS® RFIC Solutions

Page 16 of 16

PE42521

Product Specification

Tape Feed Direction

Device Orientation in Tape

Top of

Device

Pin 1

Advance Information:

The product is in a formative or design stage. The datasheet contains design target

specifications for product development. Specifications and features may change in any manner without notice.

Preliminary Specification:

The datasheet contains preliminary data. Additional data may be added at a later

date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best

possible product.

Product Specification:

The datasheet contains final data. In the event Peregrine decides to

change the specifications, Peregrine will notify customers of the intended changes by issuing a CNF (Customer

Notification Form).

The information in this datasheet is believed to be reliable. However, Peregrine assumes no liability for the use

of this information. Use shall be entirely at the user’s own risk.

No patent rights or licenses to any circuits described in this datasheet are implied or granted to any third party.

Peregrine’s products are not designed or intended for use in devices or systems intended for surgical implant,

or in other applications intended to support or sustain life, or in any application in which the failure of the

Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no

liability for damages, including consequential or incidental damages, arising out of the use of its products in

such applications.

The Peregrine name, logo, UltraCMOS and UTSi are registered trademarks and HaRP, MultiSwitch and DuNE

are trademarks of Peregrine Semiconductor Corp.

Peregrine products are protected under one or more of

the following U.S. Patents: http://patents.psemi.com.

Sales Contact and Information

For sales and contact information please visit www.psemi.com.

Figure 34. Tape and Reel Specifications

Notes: 1. 10 sprocket hole pitch cumulative tolerance ±0.2

2. Camber in compliance with EIA 481

3. Pocket position relative to sprocket hole measured

as true position of pocket, not pocket hole

Ao = 3.30

Bo = 3.30

Ko = 1.10

Table 6. Ordering Information

Order Code Description Package Shipping Method

PE42521MLBA-Z PE42521 SPDT RF switch Green 16-lead 3x3 mm QFN 3000 units / T&R

EK42521-02 PE42521 Evaluation kit Evaluation kit 1 / Box