19-1977; Rev 3; 2/03 0.5/0.8 Low-Voltage, Dual SPDT Analog Switches in UCSP Features 12-Bump, 0.5mm-Pitch UCSP NC Switch RON 0.5 max (+2.7V Supply) (MAX4684) 0.8 max (+2.7V Supply) (MAX4685) NO Switch RON 0.8 max (+2.7V Supply) RON Match Between Channels 0.06 (max) RON Flatness Over Signal Range 0.15 (max) +1.8V to +5.5V Single-Supply Operation Rail-to-Rail(R) Signal Handling 1.8V Logic Compatibility Low Crosstalk: -68dB (100kHz) High Off-Isolation: -64dB (100kHz) THD: 0.03% 50nA (max) Supply Current Low Leakage Currents 1nA (max) at TA = +25C The MAX4684/MAX4685 low on-resistance (RON), lowvoltage, dual single-pole/double-throw (SPDT) analog switches operate from a single +1.8V to +5.5V supply. The MAX4684 features a 0.5 (max) RON for its NC switch and a 0.8 (max) RON for its NO switch at a +2.7V supply. The MAX4685 features a 0.8 max onresistance for both NO and NC switches at a +2.7V supply. Both parts feature break-before-make switching action (2ns) with tON = 50ns and tOFF = 40ns at +3V. The digital logic inputs are 1.8V logic-compatible with a +2.7V to +3.3V supply. The MAX4684/MAX4685 are packaged in the chipscale package (UCSP)TM, significantly reducing the required PC board area. The chip occupies only a 2.0mm 1.50mm area. The 4 3 array of solder bumps are spaced with a 0.5mm bump pitch. Ordering Information ________________________Applications Speaker Headset Switching PART TEMP RANGE PIN/BUMPPACKAGE Power Routing MAX4684EBC -40C to +85C 12 UCSP* AAF Battery-Operated Equipment MAX4684ETB -40C to +85C 10 Thin QFN (3 3) AAG MAX4684EUB -40C to +85C 10 MAX -- MAX4685EBC -40C to +85C 12 UCSP* AAG MAX4685ETB -40C to +85C 10 Thin QFN (3 3) AAH MAX4685EUB -40C to +85C 10 MAX MP3 Players Relay Replacement Audio and Video Signal Routing Communications Circuits PCMCIA Cards Cellular Phones Modems TOP MARK -- Note: Requires special solder temperature profile describing the Absolute Maximum Ratings section. UCSP is a trademark of Maxim Integrated Products, Inc. Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd. *UCSP reliability is integrally linked to the user's assembly methods, circuit board material, and environment. Refer to the UCSP Reliability Notice in the UCSP Reliability section of this data sheet for more information. Pin Configurations/Functional Diagrams/Truth Table TOP VIEW MAX4684/MAX4685 MAX4684/MAX4685 GND NC1 C1 IN1 C2 B1 A1 NC2 A2 IN2 V+ 1 MAX4684/MAX4685 COM1 NO1 Continued at end of data sheet. C3 C4 A3 B4 V+ UCSP A4 COM2 NO2 IN_ NO_ NC_ 0 OFF ON 1 ON OFF 10 NO2 NO1 2 9 COM2 COM1 3 8 IN2 IN1 4 7 NC2 NC1 5 6 GND SWITCHES SHOWN FOR LOGIC "0" INPUT MAX ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com. 1 MAX4684/MAX4685 General Description MAX4684/MAX4685 0.5/0.8 Low-Voltage, Dual SPDT Analog Switches in UCSP ABSOLUTE MAXIMUM RATINGS (All Voltages Referenced to GND) V+, IN_......................................................................-0.3V to +6V COM_, NO_, NC_ (Note1) ........................... -0.3V to (V+ + 0.3V) Continuous Current NO_, NC_, COM_ .......................... 300mA Peak Current NO_, NC_, COM_ (pulsed at 1ms, 50% duty cycle).................................400mA Peak Current NO_, NC_, COM_ (pulsed at 1ms, 10% duty cycle).................................500mA Continuous Power Dissipation (TA = +70C) 12-Bump UCSP (derate 11.4mW/C above +70C) ...909mW 10-Pin MAX (derate 5.6mW/C above +70C) ..........444mW Operating Temperature Ranges..........................-40C to +85C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C Bump Temperature (soldering) (Note 2) Infared (15s)................................................................+220C Vapor Phase (60s) ......................................................+215C Note 1: Signals on NO_, NC_, and COM_ exceeding V+ or GND are clamped by internal diodes. Limit forward-diode current to maximum current rating. Note 2: This device is constructed using a unique set of packaging techniques that impose a limit on the thermal profile the device can be exposed to during board level solder attach and rework. This limit permits only the use of the solder profiles recommended in the industry-standard specification, JEDEC 020A, paragraph 7.6, Table 3 for IR/VPR and Convection reflow. Preheating is required. Hand or wave soldering is not allowed. Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS--+3V SUPPLY (V+ = +2.7V to +3.3V, VIH = +1.4V, VIL = +0.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at +3V and +25C.) (Notes 3, 9, 10) PARAMETER SYMBOL CONDITIONS TA MIN E 0 TYP MAX UNITS V+ V ANALOG SWITCH Analog Signal Range VNO_, VNC_, VCOM_ MAX4684 NC_ On-Resistance (Note 4) NO_ On-Resistance (Note 4) On-Resistance Match Between Channels (Notes 4, 5) RON(NC) V+ = 2.7V; ICOM_ = 100mA; VNC_ = 0 to V+ 0.5 0.5 +25C 0.45 E 0.8 RON(NO) E 0.8 RON V+ = 2.7V; ICOM_ = 100mA; VNO_ or VNC_ = 1.5V +25C 0.06 E 0.06 MAX4684 E 0.15 MAX4685 E 0.35 E 0.35 V+ = 2.7V; ICOM = 100mA; VNC_ = 0 to V+ NO_ On-Resistance Flatness (Note 6) RFLAT (NO) V+ = 2.7V; ICOM = 100mA; VNO_ = 0 to V+ 0.8 +25C RFLAT (NC) COM_ On-Leakage Current (Note 7) 0.3 E V+ = 2.7V; ICOM_ = 100mA; VNO_ = 0 to V+ NC_ On-Resistance Flatness (Note 6) NO_ or NC_ OffLeakage Current (Note 7) MAX4685 +25C 0.45 0.8 +25C -1 1 E -10 10 INO_(OFF) or INC_(OFF) V+ = 3.3V; VNO_ or VNC_ = 3V, 0.3V; VCOM_ = 0.3V, 3V ICOM_(ON) V+ = 3.3V; VNO_ or VNC_ = 3V, 0.3V, or floating; VCOM_ = 3V, 0.3V, or floating +25C -2 2 E -20 20 V+ = 2.7V, VNO_ or VNC_ = 1.5V; RL = 50; CL = 35pF; Figure 2 +25C nA nA DYNAMIC CHARACTERISTICS Turn-On Time 2 tON 30 E _______________________________________________________________________________________ 50 60 ns 0.5/0.8 Low-Voltage, Dual SPDT Analog Switches in UCSP (V+ = +2.7V to +3.3V, VIH = +1.4V, VIL = +0.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at +3V and +25C.) (Notes 3, 9, 10) PARAMETER SYMBOL CONDITIONS Turn-Off Time tOFF V+ = 2.7V, VNO_ or VNC_ = 1.5V; RL = 50; CL = 35pF; Figure 2 Break-Before-Make Delay tBBM V+ = 2.7V, VNO_, or VNC_ = 1.5V; RL = 50; CL = 35pF; Figure 3 Charge Injection Q TA MIN +25C TYP 25 E E MAX 30 40 2 UNITS ns 15 ns COM_ = 0; RS = 0; CL = 1nF; Figure 4 +25C 200 pC Off-Isolation (Note 8) VISO CL = 5pF; RL = 50; f = 100kHz; VCOM_ = 1VRMS; Figure 5 +25C -64 dB Crosstalk VCT CL = 5pF; RL = 50; f = 100kHz; VCOM_ = 1VRMS; Figure 5 +25C -68 dB Total Harmonic Distortion THD RL = 600, IN_ = 2Vp-p, f = 20Hz to 20kHz +25C 0.03 % 84 pF NC_ Off-Capacitance CNC_(OFF) f = 1MHz; Figure 6 +25C NO_ Off-Capacitance CNO_(OFF) f = 1MHz; Figure 6 +25C 37 pF NC_ On-Capacitance CNC_(ON) f = 1MHz; Figure 6 +25C 190 pF NO_ On-Capacitance DIGITAL I/O Input Logic High CNO_(ON) f = 1MHz; Figure 6 +25C 150 pF Input Logic Low IN_ Input Leakage Current POWER SUPPLY Power-Supply Range Supply Current (Note 4) VIH E VIL E IIN_ VIN_ = 0 or V+ V+ I+ V+ = 5.5V; VIN_ = 0 or V+ 1.4 E -1 E +25C E 1.8 -50 -200 V 0.04 0.5 V 1 A 5.5 50 200 V nA The algebraic convention used in this data sheet is where the most negative value is a minimum and the most positive value a maximum. Note 4: Guaranteed by design. Note 5: RON = RON(MAX) - RON(MIN), between NC1 and NC2 or between NO1 and NO2. Note 6: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges. Note 7: Leakage parameters are 100% tested at TA = +85C, and guaranteed by correlation over rated temperature range. Note 8: Off-isolation = 20log10 (VCOM / VNO), VCOM = output, VNO = input to off switch. Note 9: UCSP and QFN parts are 100% tested at +25C only and guaranteed by design and correlation at the full hot-rated temperature. Note 10: -40C specifications are guaranteed by design. Note 3: _______________________________________________________________________________________ 3 MAX4684/MAX4685 ELECTRICAL CHARACTERISTICS--+3V SUPPLY (continued) Typical Operating Characteristics (TA = +25C, unless otherwise noted.) 1.4 1.8 1.4 1.0 V+ = +2.0V 0.8 V+ = +2.3V 0.6 RON () V+ = +5.0V V+ = +2.0V 1.2 1.0 V+ = +2.3V V+ = +2.5V 0.8 V+ = +2.5V 0.4 0.6 V+ = +3.0V V+ = +2.0V 1.5 V+ = +2.3V 1.0 V+ = +2.5V V+ = +3.0V V+ = +5.0V V+ = +3.0V 0.4 0.2 V+ = +1.8V 2.0 V+ = +5.0V 0.5 0.2 0 0 1 2 3 4 5 0 VCOM (V) 2 3 VCOM (V) MAX4684 NC ON-RESISTANCE vs. COM VOLTAGE MAX4685 NC ON-RESISTANCE vs. COM VOLTAGE V+ = +5V 0.26 0.24 4 5 V+ = +5V 0.40 TA = +85C 0.22 1 0.45 MAX4684/5 toc04 0.28 0 0 2 3 VCOM (V) 5 NO ON-RESISTANCE vs. COM VOLTAGE 0.40 V+ = +5V 0.35 TA = +25C 0.18 TA = +85C 0.30 RON () RON () 0.30 0.20 4 0.35 0.16 0.25 TA = +85C 0.25 0.20 0.20 TA = +25C 0.14 TA = -40C 0.15 TA = +25C 0.15 0 1 2 3 4 5 0.10 0 1 2 3 4 5 VCOM (V) VCOM (V) MAX4684 NC ON-RESISTANCE vs. COM VOLTAGE MAX4684 NC ON-RESISTANCE vs. COM VOLTAGE TA = +85C 0.30 1.6 V+ = +1.8V 1.4 TA = +25C V+ = +2.0V 0.8 V+ = +2.3V 0.6 TA = -40C 0.15 V+ = +5.0V V+ = +3.0V 0.5 1.0 1.5 VCOM (V) 2.0 2.5 3.0 0.30 TA = +25C TA = -40C 0.15 0.10 0 0 5 0.35 0.20 0.2 0.10 TA = +85C 0.25 V+ = +2.5V 0.4 4 V+ = +3V 0.40 1.0 3 0.45 RON () RON () 0.20 2 NO ON-RESISTANCE vs. COM VOLTAGE 1.2 0.25 1 0.50 MAX4684/5 toc01 V+ = +3V 0 VCOM (V) 1.8 MAX4684/5 toc07 0.35 TA = -40C TA = -40C 0.10 0.10 MAX4684/5 toc09 0.12 4 1 MAX4684/5 toc06 0 MAX4684/5 toc05 RON () 1.2 RON () V+ = +1.8V 1.6 RON () V+ = +1.8V NO ON-RESISTANCE vs. COM VOLTAGE 2.5 MAX4684/5 toc02 1.6 2.0 MAX4684/5 toc01 1.8 MAX4685 NC ON-RESISTANCE vs. COM VOLTAGE MAX4684/5 toc03 MAX4684 NC ON-RESISTANCE vs. COM VOLTAGE RON () MAX4684/MAX4685 0.5/0.8 Low-Voltage, Dual SPDT Analog Switches in UCSP 0 1 2 3 VCOM (V) 4 5 0 0.5 1.0 1.5 VCOM (V) _______________________________________________________________________________________ 2.0 2.5 3.0 0.5/0.8 Low-Voltage, Dual SPDT Analog Switches in UCSP TURN-ON/TURN-0FF TIMES vs. SUPPLY VOLTAGE 60 40 40 35 tON 50 40 tOFF 30 tON 30 25 20 15 20 tOFF 10 20 10 5 0 0 2 3 4 5 0 1.8 6 2.3 2.8 3.3 4.3 4.8 5.3 -40 -15 VSUPPLY (V) VSUPPLY (V) LOGIC THRESHOLD VOLTAGE vs. SUPPLY VOLTAGE MAX4684/5 toc14 MAX4684/5 toc13 200 100 Q (pC) 0 1.0 VIN FALLING -100 -200 0.5 35 -300 100 ICOM(ON) 10 ICOM(OFF) 1 2 3 4 5 6 0 1 2 3 4 5 -40 6 -15 10 35 60 VSUPPLY (V) VCOM (V) TEMPERATURE (C) MAX4685 ON/OFF-LEAKAGE CURRENT vs. TEMPERATURE FREQUENCY RESPONSE (MAX) TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY 100 -40 LOSS (dB) ICOM(ON) 10 0.1 OFFISOLATION -60 THD + N (%) -20 ONRESPONSE 85 MAX4684/5 toc18 0 MAX4684/5 toc16 1000 ON/OFF-LEAKAGE CURRENT (pA) 1 -500 MAX4684/85 toc17 0 85 1000 -400 0 60 MAX4684 ON/OFF-LEAKAGE CURRENT vs. TEMPERATURE 300 VIN RISING 10 TEMPERATURE (C) CHARGE INJECTION vs. COM VOLTAGE 2.0 1.5 3.8 MAX4684/5 toc15 1 ON/OFF-LEAKAGE CURRENT (pA) 0 LOGIC THRESHOLD VOLTAGE (V) V+ = +3V 45 tON/tOFF (ns) 60 50 MAX4684/5 toc11 70 tON/tOFF (ns) 80 SUPPLY CURRENT (pA) 80 MAX4684/5 toc10 100 TURN-ON/TURN-0FF TIMES vs. TEMPERATURE MAX4684/5 toc12 SUPPLY CURRENT vs. SUPPLY VOLTAGE CROSSTALK -80 ICOM(OFF) -100 1 -40 -15 10 35 TEMPERATURE (C) 60 85 -120 0.001 0.01 0.01 0.1 1 FREQUENCY (MHz) 10 100 10 100 1k 10k 100k FREQUENCY (Hz) _______________________________________________________________________________________ 5 MAX4684/MAX4685 Typical Operating Characteristics (continued) (TA = +25C, unless otherwise noted.) MAX4684/MAX4685 0.5/0.8 Low-Voltage, Dual SPDT Analog Switches in UCSP Pin Description PIN NAME FUNCTION UCSP MAX NC_ A1, C1 5, 7 Analog Switch--Normally Closed Terminal IN_ A2, C2 4, 8 Digital Control Input COM_ A3, C3 3, 9 Analog Switch--Common Terminal NO_ A4, C4 2, 10 Analog Switch--Normally Open Terminal V+ B4 1 Positive Supply Voltage Input GND B1 6 Ground Power-Supply Sequencing and Overvoltage Protection Detailed Description The MAX4684/MAX4685 are low on-resistance, lowvoltage, dual SPDT analog switches that operate from a +1.8V to +5.5V supply. The devices are fully specified for nominal 3V applications. The MAX4684/MAX4685 have break-before-make switching and fast switching speeds (tON = 50ns max, tOFF = 40ns max). The MAX4684 offers asymmetrical normally closed (NC) and normally open (NO) RON for applications that require asymmetrical loads (examples include speaker headsets and internal speakers). The part features a 0.5 max RON for its NC switch and a 0.8 max RON for its NO switch at the 2.7V supply. The MAX4685 features a 0.8 max on-resistance for both NO and NC switches at the +2.7V supply. Applications Information Digital Control Inputs Caution: Do not exceed the absolute maximum ratings because stresses beyond the listed ratings may cause permanent damage to devices. Proper power-supply sequencing is recommended for all CMOS devices. Always apply V+ before applying analog signals, especially if the analog signal is not current limited. If this sequencing is not possible, and if the analog inputs are not current limited to <20mA, add a small signal diode (D1) as shown in Figure 1. Adding a protection diode reduces the analog range to a diode drop (about 0.7V) below V+ (for D1). R ON increases slightly at low supply voltages. Maximum supply voltage (V+) must not exceed +6V. Protection diode D1 also protects against some overvoltage situations. No damage will result on Figure 1's circuit if the supply voltage is below the absolute maximum rating applied to an analog signal pin. The MAX4684/MAX4685 logic inputs accept up to +5.5V regardless of supply voltage. For example, with a +3.3V supply, IN_ may be driven low to GND and high to 5.5V. Driving IN_ rail-to-rail minimizes power consumption. Logic levels for a +1.8V supply are 0.5V (low) and 1.4V (high). POSITIVE SUPPLY D1 V+ MAX4684 MAX4685 Analog Signal Levels Analog signals that range over the entire supply voltage (V+ to GND) are passed with very little change in on-resistance (see Typical Operating Characteristics). The switches are bidirectional, so the NO_, NC_, and COM_ pins can be either inputs or outputs. NO COM Vg GND Figure 1. Overvoltage Protection Using Two External Blocking Diodes 6 _______________________________________________________________________________________ 0.5/0.8 Low-Voltage, Dual SPDT Analog Switches in UCSP UCSP Reliability The chip-scale package (UCSP) represents a unique packaging form factor that may not perform equally to a packaged product through traditional mechanical reliability tests. UCSP reliability is integrally linked to the user's assembly methods, circuit board material, and usage environment. The user should closely review these areas when considering use of a UCSP package. Performance through Operating Life Test and Moisture Resistance remains uncompromised as it is primarily determined by the wafer-fabrication process. Mechanical stress performance is a greater consideration for a UCSP package. UCSPs are attached through direct solder contact to the user's PC board, foregoing the inherent stress relief of a packaged product lead frame. Solder joint contact integrity must be considered. Information on Maxim's qualification plan, test data, and recommendations are detailed in the UCSP application note, which can be found on Maxim's website at www.maxim-ic.com. Chip Information TRANSISTOR COUNT: 198 Test Circuits/Timing Diagrams MAX4684 MAX4685 V+ VIN_ LOGIC INPUT V+ COM_ NO_ OR NC 50% VIL VOUT RL 50 CL 35pF t OFF IN_ VOUT GND LOGIC INPUT SWITCH OUTPUT ( 0.9 x V0UT 0.9 x VOUT 0 t ON CL INCLUDES FIXTURE AND STRAY CAPACITANCE. RL RL + RON VOUT = VN_ t r < 5ns t f < 5ns VIH LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES THAT HAVE THE OPPOSITE LOGIC SENSE. ) Figure 2. Switching Time V+ MAX4684 MAX4685 LOGIC INPUT V+ VN_ NC_ RL 50 IN_ LOGIC INPUT 50% VIL VOUT COM_ NO_ VIH CL 35pF GND 0.9 x VOUT VOUT tD CL INCLUDES FIXTURE AND STRAY CAPACITANCE. Figure 3. Break-Before-Make Interval _______________________________________________________________________________________ 7 MAX4684/MAX4685 UCSP Package Consideration For general UCSP package information and PC layout considerations, please refer to the Maxim Application Note (Wafer-Level Ultra-Chip-Board-Scale Package). MAX4684/MAX4685 0.5/0.8 Low-Voltage, Dual SPDT Analog Switches in UCSP Test Circuits/Timing Diagrams (continued) V+ MAX4684 MAX4685 VOUT V+ RGEN VOUT COM_ NC_ OR NO_ VOUT IN OFF CL V GEN GND OFF ON IN_ VIL TO VIH ON OFF IN OFF Q = (V OUT )(C L ) IN DEPENDS ON SWITCH CONFIGURATION; INPUT POLARITY DETERMINED BY SENSE OF SWITCH. Figure 4. Charge Injection +5V 10nF V OFF-ISOLATION = 20log OUT VIN NETWORK ANALYZER 0V OR V+ V+ IN_ MAX4684 MAX4685 NC_ VOUT NO 50 50 VIN COM GND V ON-LOSS = 20log OUT VIN 50 MEAS V CROSSTALK = 20log OUT VIN REF 50 50 MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS. OFF-ISOLATION IS MEASURED BETWEEN COM_ AND "OFF" NO_ OR NC_ TERMINAL ON EACH SWITCH. ON-LOSS IS MEASURED BETWEEN COM_ AND "ON" NO_ OR NC_ TERMINAL ON EACH SWITCH. CROSSTALK IS MEASURED FROM ONE CHANNEL TO ALL OTHER CHANNELS. SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED. Figure 5. On-Loss, Off-Isolation, and Crosstalk 10nF Pin Configurations (continued) V+ TOP VIEW V+ COM_ MAX4684 MAX4685 IN CAPACITANCE METER f = 1MHz NC_ or NO_ GND Figure 6. Channel Off/On-Capacitance 8 VIL OR VIH MAX4684/MAX4685 10 NO2 V+ 1 NO1 2 9 COM2 COM1 3 8 IN2 IN1 4 7 NC2 NC1 5 6 GND 3 3 THIN QFN _______________________________________________________________________________________ 0.5/0.8 Low-Voltage, Dual SPDT Analog Switches in UCSP 12L, UCSP 4x3.EPS (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) _______________________________________________________________________________________ 9 MAX4684/MAX4685 Package Information Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) e 10LUMAX.EPS MAX4684/MAX4685 0.5/0.8 Low-Voltage, Dual SPDT Analog Switches in UCSP 4X S 10 10 INCHES H y 0.500.1 0.60.1 1 1 0.60.1 BOTTOM VIEW TOP VIEW D2 MILLIMETERS MAX DIM MIN 0.043 A 0.006 A1 0.002 A2 0.030 0.037 D1 0.116 0.120 0.114 0.118 D2 0.116 E1 0.120 E2 0.114 0.118 H 0.187 0.199 L 0.0157 0.0275 L1 0.037 REF b 0.007 0.0106 e 0.0197 BSC c 0.0035 0.0078 0.0196 REF S 0 6 MAX MIN 1.10 0.15 0.05 0.75 0.95 3.05 2.95 3.00 2.89 3.05 2.95 2.89 3.00 4.75 5.05 0.40 0.70 0.940 REF 0.177 0.270 0.500 BSC 0.090 0.200 0.498 REF 0 6 E2 GAGE PLANE A2 c A b A1 E1 D1 FRONT VIEW L L1 SIDE VIEW PROPRIETARY INFORMATION TITLE: PACKAGE OUTLINE, 10L uMAX/uSOP APPROVAL DOCUMENT CONTROL NO. 21-0061 10 ______________________________________________________________________________________ REV. I 1 1 0.5/0.8 Low-Voltage, Dual SPDT Analog Switches in UCSP 6, 8, &10L, QFN THIN.EPS L A D D2 A2 PIN 1 ID 1 N 1 C0.35 b E PIN 1 INDEX AREA [(N/2)-1] x e REF. E2 DETAIL A e k A1 CL CL L L e e A DALLAS SEMICONDUCTOR PROPRIETARY INFORMATION TITLE: PACKAGE OUTLINE, 6, 8 & 10L, TDFN, EXPOSED PAD, 3x3x0.80 mm NUMBER OF LEADS SHOWN ARE FOR REFERENCE ONLY APPROVAL DOCUMENT CONTROL NO. 21-0137 REV. D 1 2 ______________________________________________________________________________________ 11 MAX4684/MAX4685 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) MAX4684/MAX4685 0.5/0.8 Low-Voltage, Dual SPDT Analog Switches in UCSP Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) COMMON DIMENSIONS SYMBOL A MIN. 0.70 MAX. 0.80 D 2.90 3.10 E 2.90 3.10 A1 0.00 0.05 L k 0.20 0.40 0.25 MIN. A2 0.20 REF. PACKAGE VARIATIONS PKG. CODE N D2 E2 e JEDEC SPEC b T633-1 6 1.500.10 2.300.10 0.95 BSC MO229 / WEEA 0.400.05 1.90 REF T833-1 8 1.500.10 2.300.10 0.65 BSC MO229 / WEEC 0.300.05 1.95 REF T1033-1 10 1.500.10 2.300.10 0.50 BSC MO229 / WEED-3 0.250.05 2.00 REF [(N/2)-1] x e DALLAS SEMICONDUCTOR PROPRIETARY INFORMATION TITLE: PACKAGE OUTLINE, 6, 8 & 10L, TDFN, EXPOSED PAD, 3x3x0.80 mm APPROVAL DOCUMENT CONTROL NO. 21-0137 REV. D 2 2 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products. ENGLISH * ???? * ??? * ??? WHAT'S NEW PRODUCTS SOLUTIONS DESIGN APPNOTES SUPPORT BUY COMPANY MEMBERS M axim > P roduc ts > A nalog Switc hes and M ultiplexers MAX4684, MAX4685 0.5 QuickView /0.8 Technical Documents Low-Voltage, Dual SPDT Analog Switches in UC SP Ordering Info More Information All Ordering Information Notes: 1. Other options and links for purchasing parts are listed at: http://www.maxim-ic.com/sales. 2. Didn't Find What You Need? Ask our applications engineers. Expert assistance in finding parts, usually within one business day. 3. Part number suffixes: T or T&R = tape and reel; + = RoHS/lead-free; # = RoHS/lead-exempt. More: SeeFull Data Sheet or Part Naming C onventions. 4. * Some packages have variations, listed on the drawing. "PkgC ode/Variation" tells which variation the product uses. Devices: 1-20 of 20 M AX4684 Fre e Sam ple Buy Pack age : TYPE PINS FOOTPRINT Tem p DRAWING CODE/VAR * RoHS/Le ad-Free ? M aterials Analys is MAX4684ETB THIN QFN (Dual);10 pin;10 mm Dwg: 21-0137I (PDF) Use pkgcode/variation: T1033-1* -40C to +85C RoHS/Lead-Free: No Materials Analysis MAX4684ETB+ THIN QFN (Dual);10 pin;10 mm Dwg: 21-0137I (PDF) Use pkgcode/variation: T1033+1* -40C to +85C RoHS/Lead-Free: Lead Free Materials Analysis MAX4684ETB+T THIN QFN (Dual);10 pin;10 mm Dwg: 21-0137I (PDF) Use pkgcode/variation: T1033+1* -40C to +85C RoHS/Lead-Free: Lead Free Materials Analysis MAX4684ETB-T THIN QFN (Dual);10 pin;10 mm Dwg: 21-0137I (PDF) Use pkgcode/variation: T1033-1* -40C to +85C RoHS/Lead-Free: No Materials Analysis MAX4684EBC +T UC SP;10 pin;3 mm Dwg: 21-0104F (PDF) Use pkgcode/variation: B12+4* 0C to +70C RoHS/Lead-Free: Lead Free Materials Analysis MAX4684EBC + UC SP;10 pin;3 mm Dwg: 21-0104F (PDF) Use pkgcode/variation: B12+4* 0C to +70C RoHS/Lead-Free: Lead Free Materials Analysis MAX4684EBC UC SP;10 pin;3 mm Dwg: 21-0104F (PDF) Use pkgcode/variation: B12-4* 0C to +70C RoHS/Lead-Free: No Materials Analysis MAX4684EBC -T UC SP;10 pin;3 mm Dwg: 21-0104F (PDF) Use pkgcode/variation: B12-4* 0C to +70C RoHS/Lead-Free: No Materials Analysis MAX4684EUB+ uMAX;10 pin;15 mm Dwg: 21-0061J (PDF) Use pkgcode/variation: U10+2* -40C to +85C RoHS/Lead-Free: Lead Free Materials Analysis MAX4684EUB uMAX;10 pin;15 mm Dwg: 21-0061J (PDF) Use pkgcode/variation: U10-2* -40C to +85C RoHS/Lead-Free: No Materials Analysis MAX4684EUB+T uMAX;10 pin;15 mm Dwg: 21-0061J (PDF) Use pkgcode/variation: U10+2* -40C to +85C RoHS/Lead-Free: Lead Free Materials Analysis MAX4684EUB-T uMAX;10 pin;15 mm Dwg: 21-0061J (PDF) Use pkgcode/variation: U10-2* -40C to +85C RoHS/Lead-Free: No Materials Analysis M AX4685 Fre e Sam ple Buy Pack age : TYPE PINS FOOTPRINT DRAWING CODE/VAR * Tem p RoHS/Le ad-Free ? M aterials Analys is MAX4685EBC +T UC SP;10 pin;3 mm Dwg: 21-0104F (PDF) Use pkgcode/variation: B12+4* -40C to +85C RoHS/Lead-Free: Lead Free Materials Analysis MAX4685EBC + UC SP;10 pin;3 mm Dwg: 21-0104F (PDF) Use pkgcode/variation: B12+4* -40C to +85C RoHS/Lead-Free: Lead Free Materials Analysis MAX4685EBC UC SP;10 pin;3 mm Dwg: 21-0104F (PDF) Use pkgcode/variation: B12-4* -40C to +85C RoHS/Lead-Free: No Materials Analysis MAX4685EBC -T UC SP;10 pin;3 mm Dwg: 21-0104F (PDF) Use pkgcode/variation: B12-4* -40C to +85C RoHS/Lead-Free: No Materials Analysis MAX4685EUB uMAX;10 pin;15 mm Dwg: 21-0061J (PDF) Use pkgcode/variation: U10-2* -40C to +85C RoHS/Lead-Free: No Materials Analysis MAX4685EUB-T uMAX;10 pin;15 mm Dwg: 21-0061J (PDF) Use pkgcode/variation: U10-2* -40C to +85C RoHS/Lead-Free: No Materials Analysis MAX4685EUB+T uMAX;10 pin;15 mm Dwg: 21-0061J (PDF) Use pkgcode/variation: U10+2* -40C to +85C RoHS/Lead-Free: Lead Free Materials Analysis MAX4685EUB+ uMAX;10 pin;15 mm Dwg: 21-0061J (PDF) Use pkgcode/variation: U10+2* -40C to +85C RoHS/Lead-Free: Lead Free Materials Analysis Didn't Find What You Need? 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