DC1192A - Linear Technology

LT6105

6105fa

TYPICAL APPLICATION

FEATURES

APPLICATIONS

DESCRIPTION

Precision, Extended Input

Range Current Sense Ampliﬁ er

The LT

6105 is a micropower, precision current sense

ampliﬁ er with a very wide input common mode range.

The LT6105 monitors unidirectional current via the volt-

age across an external sense resistor. The input common

mode range extends from –0.3V to 44V, with respect to

the negative supply voltage (V–). This allows the LT6105

to operate as a high side current sense monitor or a low

side current sense monitor. It also allows the LT6105 to

monitor current on a negative supply voltage, as well as

continuously monitor a battery from full charge to depletion.

The inputs of LT6105 can withstand differential voltages

up to ±44V, which makes it ideal for monitoring a fuse or

MOSFET switch.

Gain is conﬁ gured with external resistors from 1V/V to

100V/V. The input common mode rejection and power

supply rejection are in excess of 100dB and the input offset

voltage is less than 300μV. A typical slew rate of 2V/μs

ensures fast response to unexpected current changes.

The LT6105 can operate from an independent power

supply of 2.85V to 36V and draws only 150μA. When

V+ is powered down, the sense pins are biased off. This

prevents loading of the monitored circuit, irrespective of

the sense voltage. The LT6105 is available in a 6-lead DFN

and 8-lead MSOP package.

Gain Error vs Input Voltage

n Very Wide, Over-the-Top

, Input Common Mode Range

- Extends 44V Above V– (Independent of V+)

- Extends –0.3V Below V–

n Wide Power Supply Range: 2.85V to 36V

n Input Offset Voltage: 300μV Maximum

n Gain Accuracy: 1% Max

n Gain Conﬁ gurable with External Resistors

n Operating Current: 150μA

n Slew Rate: 2V/μs

n Sense Input Current When Powered Down: 1nA

n Full-Scale Output Current: 1mA Minimum

n Operating Temperature Range –40°C to 125°C

n Available in 2mm × 3mm DFN and 8-Lead MSOP

Packages

n High Side or Low Side Current Sensing

n Current Monitoring on Positive or Negative Supply

Voltages

n Battery Monitoring

n Fuse/MOSFET Monitoring

n Automotive

n Power Management

n Portable Test/Measurement Systems

Gain of 50 Current Sense Ampliﬁ er

–

0.02Ω

RIN2

100Ω

RIN1

100Ω

ROUT

4.99k

LT6105

2.85V TO 36V

TO LOAD

SOURCE

–0.3V TO 44V

VOUT = 1V/A

VOUT

V+V–

VS+

VS–

–IN

+IN

6105 TA01

VVV

RAR

RRR

OUT S S OUT

IN VOUT

IN IN IN

=−

()

+−

•; ;

== RIN

, LT, LTC, LTM and Over-the-Top are registered trademarks of Linear Technology

Corporation. All other trademarks are the property of their respective owners.

VS+ INPUT VOLTAGE (V)

GAIN ERROR (%)

10 20

515 25 40

30 45

–3

–4

–1

–2

6105 TA01b

TA = 25°C

TA = 85°C

TA = 125°C

V+ = 12V

VSENSE = 50mV

RIN = 100Ω

AV = 50V

TA = –40°C

LT6105

6105fa

ABSOLUTE MAXIMUM RATINGS

Differential Input Voltage (+IN – –IN) .....................±44V

Input Voltage V(+IN, –IN) to V– ................ –9.5V to 44V

Total V+ Supply Voltage from V– ...............................36V

Output Voltage ......................................V– to (V– + 36V)

Output Short-Circuit Duration (Note 3) ............ Indeﬁ nite

Operating Temperature Range (Note 4)

LT6105C ...............................................–40°C to 85°C

LT6105I ................................................–40°C to 85°C

LT6105H ............................................–40°C to 125°C

(Notes 1, 2)

TOP VIEW

+IN

VOUT

–IN

V+

V–

DCB PACKAGE

6-LEAD (2mm s 3mm) PLASTIC DFN

TJMAX = 150°C, θJA = 64°C/W

EXPOSED PAD (PIN 7) CONNECTED TO V – (PIN 3)

–IN

V+

V–

+IN

VOUT

TOP VIEW

MS8 PACKAGE

8-LEAD PLASTIC MSOP

TJMAX = 150°C, θJA = 250°C/W

PIN CONFIGURATION

ORDER INFORMATION

LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE

LT6105CDCB#TRMPBF

LT6105IDCB#TRMPBF

LT6105HDCB#TRMPBF

LT6105CDCB#TRPBF

LT6105IDCB#TRPBF

LT6105HDCB#TRPBF

LCTF

6-Lead (2mm × 3mm) Plastic DFN

0°C to 70°C

–40°C to 85°C

–40°C to 125°C

LT6105CMS8#PBF

LT6105IMS8#PBF

LT6105HMS8#PBF

LT6105CMS8#TRPBF

LT6105IMS8#TRPBF

LT6105HMS8#TRPBF

LT C T D

8-Lead Plastic MS8

0°C to 70°C

–40°C to 85°C

–40°C to 125°C

TRM = 500 pieces. *Temperature grades are identiﬁ ed by a label on the shipping container.

Consult LTC Marketing for parts speciﬁ ed with wider operating temperature ranges.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel speciﬁ cations, go to: http://www.linear.com/tapeandreel/

Speciﬁ ed Temperature Range (Note 5)

LT6105C ................................................... 0°C to 70°C

LT6105I ................................................–40°C to 85°C

LT6105H ............................................–40°C to 125°C

Maximum Junction Temperature........................... 150°C

Storage Temperature Range ...................–65°C to 150°C

Lead Temperature (Soldering, 10 sec)

MSOP ............................................................... 300°C

LT6105

6105fa

ELECTRICAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

VS+

, VS–Input Voltage Range Guaranteed by CMRR

–0.3

–0.1

AV Error Voltage Gain Error (Note 6) VSENSE = 25mV to 75mV, VS+ = 12V

–1

–1.3

0.1 1

1.3

VSENSE = 25mV to 75mV, VS+ = 0V l–2.5 2.5 %

VOS Input Offset Voltage

MS8 Package

VSENSE = 5mV

–0.3

–0.6

–0.1 0.3

0.6

Input Offset Voltage

DCB Package

VSENSE = 5mV

–0.4

–0.7

–0.1 0.4

0.7

Input Offset Voltage VSENSE = 5mV, VS+ = 0V

–1

–1.3

–0.3 1

1.3

ΔVOS /ΔTTemperature Coefﬁ cient of VOS l0.5 μV/°C

CMRR Input Common Mode

Rejection Ratio

VSENSE = 5mV, VS+ = 2.8V to 44V

100

120 dB

VSENSE = 5mV, VS+ = –0.3V to 44V

VSENSE = 5mV, VS+ = –0.1V to 44V l

V+Power Supply Voltage Range Guaranteed by PSRR l2.85 36 V

PSRR Power Supply Rejection Ratio VSENSE = 5mV, VS+ = 12V, V+ = 2.85V to 36V

120 dB

VSENSE = 5mV, VS+ = 0V, V+ = 2.85V to 36V

120 dB

I(+IN), I(–IN) Input Current VSENSE = 0V, VS+ = 3V

VSENSE = 0V, VS+ = 0V

–0.05

25 μA

μA

I(+IN) – I(–IN) Input Offset Current VSENSE = 0V, VS+ = 3V

VSENSE = 0V, VS+ = 0V

0.05

0.005

0.5 μA

μA

I(+IN) + I(–IN) Input Current (Power-Down) V+ = 0V, VS+ = 44V, VSENSE = 0V l0.03 1 μA

ISV+ Supply Current VSENSE = 0V, VS+ = 3V, V+ = 2.85V

VSENSE = 0V, VS+ = 3V, V+ = 36V

200

240

300

350

μA

VO(MIN) Minimum Output Voltage VSENSE = 0mV, VS+ = 44V, V+ = 36V l35 mV

VO(MAX) Output High (Referred to V+)V

SENSE = 120mV, AV = 100, ROUT = 10k l1.25 1.5 V

IOUT Maximum Output Current Guaranteed by VO(MAX) l1mA

ISC Short-Circuit Output Current VS+ = 44V, VS– = 0V, ROUT = 0Ω l1.5 mA

BW –3dB Bandwidth VSENSE = 50mV, AV = 10V/V 100 kHz

tSOutput Settling to 1% of Final Value VSENSE = 5mV to 100mV 5 μs

trInput Step Response (Note 7) VSENSE = 5mV to 100mV 3 μs

SR Slew Rate (Note 8) VSENSE = 5mV to 150mV, AV = 50V/V, RIN = 400Ω 1.75 2 V/μs

VREV Reverse Input Voltage

(Referred to V–)

I(+IN) + I(–IN) = –5mA l–9.5 –12 V

The l denotes the speciﬁ cations which apply over the temperature range

0°C < TA < 70°C (LT6105C), otherwise speciﬁ cations are at TA = 25°C. V+ = 12V, V– = 0V, VS+ = 12V (see Figure 1), RIN1 = RIN2 = 100Ω,

ROUT = 5k (AV = 50), VSENSE = VS+ – VS–

, unless otherwise speciﬁ ed. (Note 5)

LT6105

6105fa

ELECTRICAL CHARACTERISTICS

The l denotes the speciﬁ cations which apply over the temperature range

–40°C < TA < 85°C (LT6105I), otherwise speciﬁ cations are at TA = 25°C. V+ = 12V, V– = 0V, VS+ = 12V (see Figure 1), RIN1 = RIN2 =

100Ω, ROUT = 5k (AV = 50), VSENSE = VS+ – VS–

, unless otherwise speciﬁ ed. (Note 5)

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

VS+

, VS–Input Voltage Range Guaranteed by CMRR

–0.3

AV Error Voltage Gain Error (Note 6) VSENSE = 25mV to 75mV, VS+ = 12V

–1

–1.4

0.1 1

1.4

VSENSE = 25mV to 75mV, VS+ = 0V l–3 3 %

VOS Input Offset Voltage

MS8 Package

VSENSE = 5mV

–0.3

–0.65

–0.1 0.3

0.65

Input Offset Voltage

DCB Package

VSENSE = 5mV

–0.4

–0.75

–0.1 0.4

0.75

Input Offset Voltage VSENSE = 5mV, VS+ = 0V

–1

–1.4

–0.3 1

1.4

ΔVOS /ΔTTemperature Coefﬁ cient of VOS l0.5 μV/°C

CMRR Input Common Mode

Rejection Ratio

VSENSE = 5mV, VS+ = 2.8V to 44V

100

120 dB

VSENSE = 5mV, VS+ = –0.3V to 44V

VSENSE = 5mV, VS+ = –0.1V to 44V l

V+Power Supply Voltage Range Guaranteed by PSRR l2.85 36 V

PSRR Power Supply Rejection Ratio VSENSE = 5mV, VS+ = 12V, V+ = 2.85V to 36V

120 dB

VSENSE = 5mV, VS+ = 0V, V+ = 2.85V to 36V

120 dB

I(+IN), I(–IN) Input Current VSENSE = 0V, VS+ = 3V

VSENSE = 0V, VS+ = 0V

–0.05

27 μA

μA

I(+IN) – I(–IN) Input Offset Current VSENSE = 0V, VS+ = 3V

VSENSE = 0V, VS+ = 0V

0.08

0.01

0.6 μA

μA

I(+IN) + I(–IN) Input Current (Power-Down) V+ = 0V, VS+ = 44V, VSENSE = 0V l0.035 1 μA

ISV+ Supply Current VSENSE = 0V, VS+ = 3V, V+ = 2.85V

VSENSE = 0V, VS+ = 3V, V+ = 36V

200

250

325

375

μA

VO(MIN) Minimum Output Voltage VSENSE = 0mV, VS+ = 44V, V+ = 36V l40 mV

VO(MAX) Output High (Referred to V+)V

SENSE = 120mV, AV = 100, ROUT = 10k l1.27 1.6 V

IOUT Maximum Output Current Guaranteed by VO(MAX) l1mA

ISC Short-Circuit Output Current VS+ = 44V, VS– = 0V, ROUT = 0Ω l1.5 mA

BW –3dB Bandwidth VSENSE = 50mV, AV = 10V/V 100 kHz

tSOutput Settling to 1% of Final Value VSENSE = 5mV to 100mV 5 μs

trInput Step Response (Note 7) VSENSE = 5mV to 100mV 3 μs

SR Slew Rate (Note 8) VSENSE = 5mV to 150mV, AV = 50V/V, RIN = 400Ω 1.75 2 V/μs

VREV Reverse Input Voltage

(Referred to V–)

I(+IN) + I(–IN) = –5mA l–9.5 –12 V

LT6105

6105fa

ELECTRICAL CHARACTERISTICS

The l denotes the speciﬁ cations which apply over the temperature range

–40°C < TA < 125°C (LT6105H), otherwise speciﬁ cations are at TA = 25°C. V+ = 12V, V– = 0V, VS+ = 12V (see Figure 1), RIN1 = RIN2 =

100Ω, ROUT = 5k (AV = 50), VSENSE = VS+ – VS–

, unless otherwise speciﬁ ed. (Note 5)

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

VS+

, VS–Input Voltage Range Guaranteed by CMRR

–0.3

–0.1

AV Error Voltage Gain Error (Note 6) VSENSE = 25mV to 75mV, VS+ = 12V

–1

–1.5

0.1 1

1.5

VSENSE = 25mV to 75mV, VS+ = 0V l–3.25 3.25 %

VOS Input Offset Voltage

MS8 Package

VSENSE = 5mV

–0.3

–0.8

–0.1 0.3

0.8

Input Offset Voltage

DCB Package

VSENSE = 5mV

–0.4

–0.9

–0.1 0.4

0.9

Input Offset Voltage VSENSE = 5mV, VS+ = 0V

–1

–1.6

–0.3 1

1.6

ΔVOS /ΔTTemperature Coefﬁ cient of VOS l0.5 μV/°C

CMRR Input Common Mode

Rejection Ratio

VSENSE = 5mV, VS+ = 2.8V to 44V

100

120 dB

VSENSE = 5mV, VS+ = –0.3V to 44V

VSENSE = 5mV, VS+ = –0.1V to 44V l

V+Power Supply Voltage Range Guaranteed by PSRR l2.85 36 V

PSRR Power Supply Rejection Ratio VSENSE = 5mV, VS+ = 12V, V+ = 2.85V to 36V

120 dB

VSENSE = 5mV, VS+ = 0V, V+ = 2.85V to 36V

120 dB

I(+IN), I(–IN) Input Current VSENSE = 0V, VS+ = 3V

VSENSE = 0V, VS+ = 0V

–0.05

30 μA

μA

I(+IN) – I(–IN) Input Offset Current VSENSE = 0V, VS+ = 3V

VSENSE = 0V, VS+ = 0V

0.35

0.1

0.8 μA

μA

I(+IN) + I(–IN) Input Current (Power-Down) V+ = 0V, VS+ = 44V, VSENSE = 0V l0.5 2.5 μA

ISV+ Supply Current VSENSE = 0V, VS+ = 3V, V+ = 2.85V

VSENSE = 0V, VS+ = 3V, V+ = 36V

240

300

350

450

μA

VO(MIN) Minimum Output Voltage VSENSE = 0mV, VS+ = 44V, V+ = 36V l45 mV

VO(MAX) Output High (Referred to V+)V

SENSE = 120mV, AV = 100, ROUT = 10k l1.3 1.7 V

IOUT Maximum Output Current Guaranteed by VO(MAX) l1mA

ISC Short-Circuit Output Current VS+ = 44V, VS– = 0V, ROUT = 0Ω l1.5 mA

BW –3dB Bandwidth VSENSE = 50mV, AV = 10V/V 100 kHz

tSOutput Settling to 1% of Final Value VSENSE = 5mV to 100mV 5 μs

trInput Step Response (Note 7) VSENSE = 5mV to 100mV 3 μs

SR Slew Rate (Note 8) VSENSE = 5mV to 150mV, AV = 50V/V, RIN = 400Ω 1.75 2 V/μs

VREV Reverse Input Voltage

(Referred to V–)

I(+IN) + I(–IN) = –5mA l–9.5 –12 V

LT6105

6105fa

VS+ INPUT VOLTAGE (V)

INPUT OFFSET VOLTAGE (mV)

0.20

0.40

0.60

–0.20

10 20

515 25 40

30 45

–0.80

–1.00

–0.40

0.80

–0.60

6105 G03

TA = –40°C

TA = 25°C

TA = 85°C

TA = 125°C

V+ = 12V

VSENSE = 5mV

AV = 50V/V

TYPICAL PERFORMANCE CHARACTERISTICS

Input Offset Voltage

vs Temperature, VS+ = 12V

Input Offset Voltage

vs Temperature, VS+ = 0V

Input Offset Voltage

vs Input Voltage

Input Offset Voltage

vs Supply Voltage, VS+ = 12V

Input Offset Voltage

vs Supply Voltage, VS+ = 0V

Gain Error Distribution,

VS+ = 12V

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: ESD (Electrostatic Discharge) sensitive devices. Extensive use

of ESD protection devices are used internal to the LT6105, however, high

electrostatic discharge can damage or degrade the device. Use proper ESD

handling precautions.

Note 3: A heat sink may be required to keep the junction temperature

below absolute maximum ratings.

Note 4: The LT6105C/LT6105I are guaranteed functional over the

operating temperature range of –40°C to 85°C. The LT6105H is

ELECTRICAL CHARACTERISTICS

guaranteed functional over the operating temperature range of –40°C

to 125°C.

Note 5: The LT6105C is guaranteed to meet speciﬁ ed performance from

0°C to 70°C. The LT6105C is designed, characterized and expected to

meet speciﬁ ed performance from –40°C to 85°C but is not tested or

QA sampled at these temperatures. The LT6105I is guaranteed to meet

speciﬁ ed performance from –40°C to 85°C. The LT6105H is guaranteed to

meet speciﬁ ed performance from –40°C to 125°C.

Note 6: 0.01% tolerance external resistors are used.

Note 7: tr is measured from the input to the 2.5V point on the 5V output.

Note 8: Slew rate is measured on the output between 1V and 5V.

TEMPERATURE (°C)

–40

INPUT OFFSET VOLTAGE (μV)

100

200

300

–100

–10 20

–25 95

535 80 110

50 125

–300

–400

–200

400

6105 G01

V+ = 12V

VSENSE = 5mV

TYPICAL UNITS

TEMPERATURE (°C)

–40

INPUT OFFSET VOLTAGE (μV)

400

800

–200

–400

–10 20

–25 95

535 80 110

50 125

–800

–1000

–600

200

600

1000

6105 G02

V+ = 12V

VSENSE = 5mV

TYPICAL UNITS

V+ SUPPLY VOLTAGE (V)

INPUT OFFSET VOLTAGE (mV)

0.2

0.6

0.0

0.4

–0.2

–0.4

10 20

515 25 30 40

–0.6

–0.8

0.8

6105 G04

VSENSE = 5mV

TA = –40°C

TA = 85°C

TA = 125°C

TA = 25°C

V+ SUPPLY VOLTAGE (V)

INPUT OFFSET VOLTAGE (mV)

–0.2

0.0

–0.4

–0.6

10 20

515 25 40

–1.2

–1.4

–0.8

0.2

–1.0

6105 G05

TA = 25°C

TA = 85°C

TA = 125°C

VSENSE = 5mV

TA = –40°C

GAIN ERROR (%)

–0.5

PERCENT OF UNITS (%)

0.2

–0.3 –0.1

–0.4 0.4

–0.2 0 0.3

0.1 0.5

6105 G06

V+ = 12V

VSENSE = 50mV

RIN = 100Ω

AV = 50V/V

500 SAMPLES

LT6105

6105fa

TEMPERATURE (°C)

–50

GAIN ERROR (%)

–25 0 5025 75 100 125

6105 G09

–0.5

–0.3

–0.1

0.1

0.3

0.5

–0.4

–0.2

0.0

0.2

0.4

V+ = 12V

VSENSE = 50mV

RIN = 100Ω

AV = 50V/V

TYPICAL PERFORMANCE CHARACTERISTICS

Gain Error Distribution,

VS+ = 0V Gain Error vs Input Voltage

Gain Error vs Temperature,

VS+ = 12V

Gain Error vs Output Resistance

Input Referred Voltage Error

vs VSENSE, VS+ = 0V

Gain Error vs Temperature,

VS+ = 0V

Input Referred Voltage Error

vs VSENSE, VS+ = 12V

Input Bias Current

vs Input Voltage

Input Current vs Input Voltage,

VSENSE = 50mV

VSENSE (mV)

–2

INPUT REFERRED ERROR (mV)

20 40 8060 100

–1

120

6105 G12

V+ = 12V

RIN = 100Ω

AV = 50V/V

TA = –40°C

TA = 25°C

TA = 85°C

TA = 125°C

VSENSE (mV)

INPUT REFERRED ERROR (mV)

20 40 8060 100 120

6105 G13

TA = –40°C

–5.0

–3.0

–1.0

1.0

3.0

5.0

–4.0

–2.0

0.0

2.0

4.0

V+ = 12V

RIN = 100Ω

AV = 50V/V

TA = 85°C

TA = 25°C

TA = 125°C

VS+ INPUT VOLTAGE (V)

–100.00

INPUT BIAS CURRENT (μA)

–1.00

–0.01

0.01

0.5 11.5 2 2.5

1.00

100.00

–10.00

–0.10

0.1

10.00

6105 G14

V+ = 3V

VSENSE = 0V

RIN = 100Ω

TA = –40°C

TA = 125°C

TA = 85°C

TA = 25°C

VS+ INPUT VOLTAGE (V)

INPUT CURRENT (mA)

1.0

1.5

0.5

0.0

10 20

515 25 40

30 45

–1.5

–2.0

–0.5

2.0

–1.0

6105 G15

I(+IN)

I(–IN)

V+ = 12V

RIN = 100Ω

AV = 50V/V

VS+ INPUT VOLTAGE (V)

GAIN ERROR (%)

10 20

515 25 40

30 45

–3

–4

–1

–2

6105 G08

TA = 25°C

TA = 85°C

TA = 125°C

V+ = 12V

VSENSE = 50mV

RIN = 100Ω

AV = 50V

TA = –40°C

GAIN ERROR (%)

–2.3

PERCENT OF UNITS (%)

–1.6

–2.1 –1.9

–2.2 –2.0 –1.8 –1.5

–1.7 –1.4

6105 G07

V+ = 12V

VSENSE = 50mV

RIN = 100Ω

AV = 50V/V

500 SAMPLES

TEMPERATURE (°C)

–4.0

GAIN ERROR (%)

–3.2

–2.4

–1.6

–0.8

–3.6

–2.8

–2.0

–1.2

–0.4

6105 G10

V+ = 12V

VSENSE = 50mV

RIN = 100Ω

AV = 50V/V

–50 –25 0 5025 75 100 125

ROUT OUTPUT RESISTANCE (Ω)

GAIN ERROR (%)

–2

2000 4000 6000

–4

–3

–5

–6

–1

8000 10000

6105 G11

VIN = 12V

VSENSE = 50mV

RIN = 100Ω

AV = ROUT/RIN

VS+ = 12V

VS+ = 0V

LT6105

6105fa

TYPICAL PERFORMANCE CHARACTERISTICS

Input Current (V+ Powered

Down) vs Input Voltage

Output Voltage vs VSENSE Voltage,

VS+ = 12V

Output Voltage vs VSENSE Voltage,

VS+ = 0V

Output Saturation Voltage

vs Output Current, VS+ = 12V

Output Saturation Voltage

vs Output Current, VS+ = 0.5V

Supply Current vs Supply Voltage,

VS+ = 12V

Output Short-Circuit

Current vs Temperature

Supply Current vs Supply Voltage,

VS+ = 0V

VS+INPUT VOLTAGE (V)

INPUT CURRENT (nA)

5 101520253035404550

6105 G16

0.01

0.1

0.001

0.0001

100

1000

V+= 0V

VSENSE = 0V

TA = –40°C

TA = 85°C

TA = 125°C

TA = 25°C

VSENSE (mV)

–10 10 30 50

OUTPUT VOLTAGE (V)

0.8

1.2

0.4

0.0 70 90 110 130

1.6

0.6

1.0

0.2

1.4

6105 G17

V+ = 3V

RIN = 100Ω

AV = 10V/V

TA = –40°C

TA (25°C, 85°C, 125°C)

VSENSE (mV)

–10 10 30 50

OUTPUT VOLTAGE (V)

0.8

1.2

0.4

0.0 70 90 110 130

0.6

1.0

0.2

1.4

6105 G18

V+ = 3V

RIN = 100Ω

AV = 10V/V

(–40°C, 25°C, 85°C, 125°C)

OUTPUT CURRENT (mA)

OUTPUT SATURATI0N VOLTAGE (V)

0.001 0.10 1 100.01

6105 G19

1.5

1.7

1.9

1.4

1.3

1.1

1.0

1.2

1.6

1.8

2.0 V+ = 12V

VSENSE = 0.5V

RIN = 100Ω

OUTPUT SATURATION VOLTAGE = V+ – VOUT

TA = –40°C

TA = 25°C

TA = 85°C

TA = 125°C

OUTPUT CURRENT (mA)

OUTPUT SATURATI0N VOLTAGE (V)

0.001 0.10 1 100.01

6105 G20

0.9

1.1

1.3

0.8

0.7

0.5

0.4

0.6

1.0

1.2

1.4

OUTPUT SATURATION VOLTAGE = V+– VOUT

V+ = 12V

VSENSE = 0.5V

RIN = 100Ω

TA = –40°C TA = 25°C

TA = 125°C

TA = 85°C

TEMPERATURE (°C)

–40

OUTPUT SHORT-CIRCUIT CURRENT (mA)

2.8

3.0

3.2

2.6

2.4

–10 20

–25 95

535 80 110

50 125

2.2

2.0

3.4

6105 G21

V+ = 5V

VS+ = 5V

VSENSE = 5V

RIN = 100Ω

V+ SUPPLY VOLTAGE (V)

SUPPLY CURRENT (μA)

400

10 20

515 25 40

100

300

500

200

6105 G22

VSENSE = 0V

RIN = 100Ω

AV = 50V/V

TA = –40°C

TA = 25°C

TA = 85°C

TA = 125°C

V+ SUPPLY VOLTAGE (V)

SUPPLY CURRENT (μA)

400

10 20

515 25 40

100

300

500

200

6105 G23

VSENSE = 0V

RIN = 100Ω

AV = 50V/V

TA = –40°C

TA = 25°C

TA = 85°C

TA = 125°C

VS+ INPUT VOLTAGE (V)

SUPPLY CURRENT (μA)

300

350

250

200

10 20

515 25 40

30 45

150

400

100

6105 G24

V+ = 3V

VSENSE = 0V

RIN = 100Ω

TA = –40°C

TA = 25°C

TA = 85°C

TA = 125°C

Supply Current vs Input Voltage

LT6105

6105fa

50μs/DIV

VS–

100mV/DIV

12V

VOUT

500mV/DIV

6105 G29

V+= 12V

RIN = 1k

ROUT = 10k

AV= 10V/V

50μs/DIV

VS–

100mV/DIV

VOUT

500mV/DIV

6105 G30

V+= 12V

RIN = 1k

ROUT = 10k

AV= 10V/V

50μs/DIV

VS–

100mV/DIV

12V

VOUT

2V/DIV

6105 G31

V+= 12V

VS+= 12V

AV= 50V/V

5μs/DIV

6105 G33

V+= 12V

VS+= 12V

RIN = 1k

ROUT = 50k

AV= 50V/V

VS–

100mV/DIV

11.995V

VOUT 5V

2V/DIV

5μs/DIV

VS–

100mV/DIV

12V

VOUT

2V/DIV

6105 G32

V+= 12V

VS+= 12V

RIN = 1k

ROUT = 50k

AV= 50V/V

Step Response

VSENSE = 0V to 100mV, VS+ = 12V

TYPICAL PERFORMANCE CHARACTERISTICS

Step Response

VSENSE = 0V to 100mV, VS+ = 0V

Step Response

VSENSE = 0V to 100mV, RIN = 100Ω

Step Response

VSENSE = 5mV to 100mV

Step Response

VSENSE = 0V to 100mV

Gain vs Frequency

Common Mode Rejection

Ratio vs Frequency

FREQUENCY (Hz)

–10

GAIN (dB)

1k 100k 1M 10M

–40

–30

10k

–20

6105 G25

V+ = VS+ = 12V

VSENSE = 50mV

RIN = 100Ω

AV = 10V/V

FREQUENCY (Hz)

COMMON MODE REJECTION RATIO (dB)

100

100 100k 1M 10M

1k 10k

140

120

6105 G26

V+ = 12V

VS+ = 12V

RIN = 100Ω

AV = 50V/V

FREQUENCY (Hz)

POWER SUPPLY REJECTION RATIO (dB)

1 10 100 1k 10k 100k 1M

6105 G27

0.1

100

140

160

120

V+ = 12V

VSENSE = 5mV

RIN = 100Ω

AV = 10V/V

VS+ = 0V

VS+ = 12V

RIN (Ω)

SLEW RATE (V/μs)

1.5

2.0

2.5

800

1.0

0.5

0100 200 300 400 500 600 700 900 1000

V+ = 12V

VS+ = 12V

VOUT = 7.5V

AV = 50V/V

6105 G28

–SLEW RATE

+SLEW RATE

Power Supply Rejection

Ratio vs Frequency

Slew Rate vs RIN

LT6105

6105fa

20μs/DIV

V+

VOUT

1V/DIV

6105 G41

VS+= 12V

VSENSE = 100mV

RIN = 1k

AV= 10V/V

50μs/DIV

VS–

10mV/DIV

VOUT

200V/DIV

6105 G40

V+= 12V

RIN = 100Ω

ROUT = 5k

AV= 50V/V

CL= 1000pF

TYPICAL PERFORMANCE CHARACTERISTICS

Power Supply Start-Up Response

50μs/DIV

VS–

100mV/DIV

VOUT

2V/DIV

6105 G39

V+= 12V

RIN = 100Ω

ROUT = 5k

AV= 50V/V

CL= 1000pF

50μs/DIV

VS–

10mV/DIV

12V

VOUT

200mV/DIV

6105 G38

V+= 12V

RIN = 100Ω

ROUT = 5k

AV= 50V/V

CL= 1000pF

Step Response

VSENSE = 0V to 10mV, VS+ = 0V

Step Response

VSENSE = 0V to 100mV,

CL = 1000pF, VS+ = 12V

50μs/DIV

VS–

100mV/DIV

12V

VOUT

2V/DIV

6105 G37

V+= 12V

RIN = 100Ω

ROUT = 5k

AV= 50V/V

CL= 1000pF

50μs/DIV

VS–

10mV/DIV

VOUT

200mV/DIV

6105 G36

V+= 12V

RIN = 100Ω

ROUT = 5k

AV = 50V/ V

Step Response

VSENSE = 0V to 10mV, VS+ = 12V

50μs/DIV

VS–

10mV/DIV

12V

VOUT

200mV/DIV

6105 G35

V+= 12V

RIN = 100Ω

ROUT = 5k

AV= 50V/V

5μs/DIV 6105 G34

V+= 12V

VS+= 12V

RIN = 1k

ROUT = 50k

AV= 50V/V

VS–

100mV/DIV

11.995V

VOUT 5V

2V/DIV

Step Response

VSENSE = 100mV to 5mV

Step Response

VSENSE = 0V to 10mV,

CL = 1000pF, VS+ = 12V

Step Response

VSENSE = 0V to 100mV,

CL = 1000pF, VS+ = 0V

Step Response

VSENSE = 0V to 10mV,

CL = 1000pF, VS+ = 0V

LT6105

6105fa

PIN FUNCTIONS

–IN (Pin 1/Pin 1): Negative Sense Input Terminal.

Negative sense voltage input will remain functional for

voltages up to 44V, referred to V–. Connect –IN to an

external gain-setting resistor RIN1 (RIN1 = RIN2) to set

the gain.

V+ (Pin 2/Pin 2): Power Supply Voltage. This pin supplies

current to the ampliﬁ er and can operate from 2.85V to 36V,

independent of the voltages on the –IN or +IN pins.

V– (Pin 3/Pin 4): Negative Power Supply Voltage or Ground

for Single Supply Operation.

VOUT (Pin 4/Pin 5): Voltage Output:

OUT = AV • (VSENSE ± VOS)

VOS is the input offset voltage. AV is the gain set by exter-

nal RIN1, RIN2, ROUT. AV = ROUT/RIN1, for RIN1 = RIN2.

NC (Pin 5/Pins 3, 6, 7): Not Connected Internally.

+IN (Pin 6/Pin 8): Positive Sense Input Terminal.

Connecting a source to VS+ and a load to VS– will allow the

LT6105 to monitor the current through RSENSE, refer to

Figure 1. Connect +IN to an external gain-setting resistor

RIN2 to set the gain. +IN remains functional for voltages

up to 44V, referred to V–

Exposed Pad (Pin 7) DFN Only: V–. The Exposed Pad is

connected to the V– pin. It should be connected to the

V– trace of the PCB, or left ﬂ oating.

(DCB/MS8)

BLOCK DIAGRAM

ROUT

VSENSE

RSENSE

RIN2

RIN1

VS+VS–

LT6105

TO LOAD SOURCE

0V TO 44V

VOUT = VSENSE • ROUT

RIN2

VOUT = VSENSE •

WHERE RIN = RIN1 = RIN2

ROUT

RIN

AV = ROUT

RIN

VOUT

V+

–IN +IN

V–

SET RIN1 = RIN2 FOR BEST ACCURACY

IF RIN1 ≠ RIN2, THEN

RIN1, RIN2, ROUT ARE EXTERNAL RESISTORS

V(–IN) > 1.6V:

VOUT = VSENSE • ROUT

RIN1

V(–IN) < 1.6V:

6105 F01

–

Q2 Q3

Figure 1. Simpliﬁ ed Block Diagram

LT6105

6105fa

The LT6105 extended input range current sense am-

pliﬁ er (see Figure 1) provides accurate unidirectional

monitoring of current through a user-selected sense resis-

tor. The LT6105 is fully speciﬁ ed over a –0.3V to 44V input

common mode range. A high PSRR V+ supply (2.85V to

36V) powers the current sense ampliﬁ er. The input sense

voltage is level shifted from the sensed power supply to

the ground reference and ampliﬁ ed by a user-selected gain

to the output. The output voltage is directly proportional

to the current ﬂ owing through the sense resistor.

THEORY OF OPERATION

(Refer to Figure 1)

Case 1: High Input Voltage (1.6V < V–IN < 44V)

Current from the source at VS+ ﬂ ows through RSENSE to

the load at VS–, creating a sense voltage, VSENSE. Inputs

VS+ and VS– apply the sense voltage to RIN2. The opposite

ends of resistors RIN1 and RIN2 are forced to be at equal

potentials by the voltage gain of ampliﬁ er A2. Thus, the

current through RIN2 is VSENSE/RIN2. The current through

RIN2 is forced to ﬂ ow through transistor Q1 and into

ROUT, creating an output voltage, VOUT. Under this input

operation range, ampliﬁ er A1 is kept off. The base current

of Q1 has been compensated for and will not contribute

to output error. The current from RIN2 ﬂ owing through

resistor ROUT gives an output voltage of VOUT = VSENSE •

ROUT/RIN2, producing a gain voltage of AV = VOUT/VSENSE

= ROUT/RIN2.

Case 2: Low Input Voltage (0V < V–IN < 1.6V)

Current from the source at VS+ ﬂ ows through RSENSE to

the load at VS–, creating a sense voltage, VSENSE. Inputs

VS+ and VS– apply the sense voltage to RIN1. The opposite

ends of resistors RIN1 and RIN2 are forced to be at equal

potentials by the voltage gain of ampliﬁ er A1. Thus, the

collector current of Q3 will ﬂ ow out of the –IN pin through

RIN1. Q2 mirrors this current VSENSE/RIN1 to ROUT, creat-

ing an output voltage, VOUT. Under this input operation

range, ampliﬁ er A2 is kept off. This current VSENSE/RIN1

ﬂ owing through resistor ROUT gives an output voltage of

VOUT = VSENSE • ROUT/RIN1, producing a gain voltage of

AV = VOUT/VSENSE = ROUT/RIN1.

APPLICATIONS INFORMATION

Selection of External Current Sense Resistor

External RSENSE resistor selection is a delicate trade-off

between power dissipation in the resistor and current

measurement accuracy. For high current applications, the

user may want to minimize the sense voltage to minimize

the power dissipation in the sense resistor.

The system load current will cause both heat and voltage

loss in RSENSE. As a result, the sense resistor should be as

small as possible while still providing the input dynamic

range required by the measurement. Note that input dy-

namic range is the difference between the maximum input

signal and the minimum accurately reproduced signal,

and is limited primarily by input DC offset voltage of the

internal ampliﬁ er of the LT6105.

The sense resistor value will be set from the minimum

signal current that can be accurately resolved by this sense

amp. As an example, the LT6105 has a typical input offset

of 100μV. If the minimum current is 20mA, a sense resistor

of 5mΩ will set VSENSE to 100μV, which is the same value

as the input offset. A larger sense resistor will reduce the

error due to offset by increasing the sense voltage for

a given load current, but it will limit the maximum peak

current for a given application.

For a peak current of 2A and a maximum VSENSE of 80mV,

RSENSE should not be more than 40mΩ. The input offset

causes an error equivalent to only 2.5mA of load current.

Peak dissipation is 160mW. If a 20mΩ sense resistor is

employed, then the effective current error is 5mA, while

the peak sense voltage is reduced to 40mV at 2A, dis-

sipating only 80mW.

The LT6105’s low input offset voltage of 100μV allows for

high resolution while limiting the maximum sense voltages.

Coupled with full scale sense voltage as large as 1V for

RIN= 1k, it can achieve 80dB of dynamic range.

Sense Resistor Connection

Kelvin connection of the LT6105’s input resistors to the

sense resistor should be implemented to provide the high-

est accuracy in high current applications. Solder connec-

tions and PC board interconnect resistance (approximately

0.5mΩ per square for 1oz copper) can be a large error

in high current systems. A 5A application might choose

LT6105

6105fa

a 20mΩ sense resistor to give a 100mV full-scale input

to the LT6105. Input offset voltage will limit resolution to

5mA. Neglecting contact resistance at solder joints, even

one square of PC board copper at each resistor end will

cause an error of 5%. This error will grow proportionately

higher as monitored current levels rise.

Gain Setting

The gain is set with three external resistors, RIN1, RIN2,

ROUT. The gain, ROUT/RIN, can be selected from 1V/V to

100V/V as long as the maximum current does not exceed

1mA. Select Gain = ROUT/RIN2 for sense input voltage op-

eration greater than 1.6V. Select gain = ROUT/RIN1 for sense

input voltage operation less than 1.6V. The overall system

error will depend on the resistor tolerance chosen for the

application. Set RIN1= RIN2 for best accuracy across the

entire input range. The total error will be gain error of the

resistors plus the gain error of the LT6105 device.

Output Signal Range

The LT6105’s output signal is developed by current

through RIN2 (44V > V–IN > 1.6V) or RIN1 (0V < V–IN <

1.6V) conducted to the output resistor, ROUT. This current

is VSENSE/RIN2 or VSENSE/RIN1. The sense ampliﬁ er’s maxi-

mum output current before gain error begins to increase

APPLICATIONS INFORMATION

is 1mA. This allows low value output resistors to be used

which helps preserve signal accuracy when the output pin

is connected to other systems.

For zero VSENSE, the internal circuitry gain will force VOUT

to VO(MIN) referred to V–. Depending on output currents,

VOUT may swing positive to within VO(MAX) referred to V+

or a maximum of 36V, a limit set by internal junction break-

down. Within these constraints, an ampliﬁ ed, level shifted

representation of RSENSE voltage is developed at VOUT. The

output is well behaved driving capacitive loads.

CM Input Signal Range

The LT6105 has high CMRR over the full input voltage

range. The minimum operation voltage of the sense ampli-

ﬁ er inputs is 0V whether V+ is at 2.7V or 36V. The output

remains accurate even when the sense inputs are driven

to 44V. The graph in Figure 2 shows that VOS changes very

slightly over a wide input range. Furthermore, either sense

inputs VS+ and VS– can collapse to 0V without incurring any

damage to the device. The LT6105 can handle differential

sense voltages up to 44V. For example, VS+ = 44V and VS– =

0V can be a valid condition in a current monitoring applica-

tion (Figure 3) when an overload protection fuse is blown

and VS– voltage collapses to ground. Under this condition,

the output of the LT6105 goes to the positive rail, VO(MAX).

Figure 2. Input Offset Voltage vs VS+ Input Voltage

Figure 3. Current Monitoring of a Fuse Protected Circuit

OUTPUT

OUT

6105 F03

RSENSE FUSE

LT6105

VS–VS+

V–

V+

0.1MF

DC SOURCE

(≤ 44V)

TO LOAD

–

–IN +IN

RIN2

ROUT

RIN1

VS+ INPUT VOLTAGE (V)

INPUT OFFSET VOLTAGE (mV)

0.20

0.40

0.60

–0.20

10 20

515 25 40

30 45

–0.80

–1.00

–0.40

0.80

–0.60

6105 F02

TA = –40°C

TA = 25°C

TA = 85°C

TA = 125°C

V+ = 12V

VSENSE = 5mV

AV = 50V/V

LT6105

6105fa

There is no phase inversion. For the opposite case, when

VS+ collapses to ground with VS– held up at some higher

voltage potential, the output will sit at VO(MIN).

The Two Input Stages Crossover Region

The wide common mode input range is achieved with two

input stages. These two input stages consist of a pair of

matched common base PNP input transistors and a pair

of common emitter PNP input transistors. As result of

two input stages, there will be three distinct operating

regions around the transition region as shown in the Input

Bias Current vs Sense Input Voltage curve in the Typical

Performance Characteristics section.

The crossover voltage, the voltage where the gm of one

input stage is transferred to the other, occurs at 1.6V above

V–. Near this region, one input stage is shutting off while

the other is turning on. Increases in temperature will cause

the crossover voltage to decrease. For input operation

between 1.6V and 44V, the common base PNPs are active

(Q2, Q3 of Figure 1). The typical current through each

input at VSENSE = 0V is 15μA. The input offset voltage is

300μV maximum at room temperature. For input operation

between 1.6V to 0V, the other PNP is active. The current

out of the inputs at VSENSE = 0V is 100nA. The input offset

voltage is untrimmed and is typically 300μV.

Selection of External Output Resistor, ROUT

The output resistor, ROUT, determines how the output cur-

rent is converted to voltage. VOUT is simply IRIN • ROUT.

In choosing an output resistor, the maximum output volt-

age must ﬁ rst be considered. If the following circuit is a

buffer or ADC with limited input range, then ROUT must be

chosen so that IOUT(MAX) • ROUT is less than the allowed

maximum input range of this circuit. In addition, the output

impedance is determined by ROUT.

If the circuit to be driven has high input impedance, then

almost any useful output impedance will be acceptable.

However, if the driven circuit has relatively low input imped-

ance, or draws spikes of current such as an ADC might

do, then a lower ROUT value may be required in order to

preserve the accuracy of the output. As an example, if the

input impedance of the driven circuit is 100 times ROUT

then the accuracy of VOUT will be reduced by 1% since:

VIRR

OUT OUT OUT IN DRIVEN

OUT IN DRIVEN

••()

()

IIR IR

OUT OUT OUT OUT

•• .••

100

101 099=

Full-Scale Sense Voltage, Selection of External Input

Resistor, RIN

The external input resistor, RIN, controls the transconduc-

tance of the current sense circuit. Since IOUT = VSENSE/RIN,

transconductance gm = 1/RIN. For example, if RIN =100,

then IOUT = VSENSE/100 or IOUT = 1mA for VSENSE =100mV.

RIN should be chosen to allow the required resolution

while limiting the output current. The LT6105 can output

more than 1mA into ROUT without introducing a signiﬁ -

cant increase in gain error. By setting RIN such that the

largest expected sense voltage gives IOUT = 1mA, then

the maximum output dynamic range is available. Output

dynamic range is limited by both the maximum allowed

output current and the maximum allowed output voltage,

as well as the minimum practical output signal. If less

dynamic range is required, then RIN can be increased

accordingly, reducing the maximum output current and

power dissipation. The LT6105’s performance is optimized

for values of RIN = 100Ω to 1k. Values outside this range

may result in additional errors. The power dissipation

across RIN and ROUT should not exceed the resistors’

recommended ratings.

APPLICATIONS INFORMATION

LT6105

6105fa

Error Sources

The current sense system uses an ampliﬁ er, current mirrors

and external resistors to apply gain and level shifting. The

output is then dependent on the matching characteristics

of the current mirrors, characteristics of the ampliﬁ er such

as gain and input offset, as well as matching of external

resistors. Ideally, the circuit output is:

VV R

RVIR

OUT SENSE OUT

IN SENSE SENSE SENSE

==•; •

In this case, the only error is due to resistor mismatch,

which provides an error in gain only. Mismatch in the

internal current mirror adds to gain error but is trimmed

to less than 0.3%. Offset voltage and sense input current

are the main cause of any additional error.

Error Due to Input Offset Voltage

Dynamic range is inversely proportional to the input offset

voltage. Dynamic range can be thought of as the maximum

VSENSE divided by VOS. The offset voltage of the LT6105

is typically only ±100μV.

Error Due to Sense Input Offset Current

Input offset current or mismatches in input bias current will

introduce an additional input offset voltage term. Typical

input offset current is 0.05μA. Lower values of RIN will

keep this error to a minimum. For example, if RIN = 100Ω,

then the additional offset is 5μV.

Output Current Limitations Due to Power Dissipation

The LT6105 can deliver up to 1mA continuous current to

the output pin. This output current, IOUT, is the mirrored

current which ﬂ ows through RIN2 and enters the current

sense amp via the +IN pin for V–IN > 1.6V, and exits out of

–IN through RIN1 for V–IN < 1.6V. The total power dissipa-

tion due to input currents, PIN, and the dissipation due to

internal mirrored currents, PQ:

TOTAL = PIN + PQ

IN = (V+IN) • IRIN2; V–IN > 1.6V

IN = (V+ – (V–IN)) • IRIN1; V–IN < 1.6V

Since the current exiting –IN is coming from V+, the voltage

is V+ – V–IN. Taking the worst case V–IN = 0V, the above

equation becomes:

IN ≅ V+ • IRIN1, for V–IN < 1.6V.

The power dissipated due to internal mirrored currents:

Q = 2 • IOUT • V+

The factor of 2 is the result of internal current shifting and

1:1 mirroring.

At maximum supply and maximum output current, the

total power dissipation can exceed 100mW. This will

cause signiﬁ cant heating of the LT6105 die. In order to

prevent damage to the LT6105, the maximum expected

dissipation in each application should be calculated. This

number can be multiplied by the θJA value listed in the Pin

Conﬁ guration section to ﬁ nd the maximum expected die

temperature. This must not be allowed to exceed 150°C,

or performance may be degraded. As an example, if an

LT6105 in the MSOP package is to be run at VS+ = 44V and

V+ = 36V with 1mA output current at 80°C ambient:

Q(MAX) = 2 • IOUT(MAX) • V+ = PQ(MAX) = 72mW

IN(MAX) = IRIN2(MAX) • V+IN(MAX) = 44mW

RISE = θJA • PTOTAL(MAX)

MAX = TAMBIENT + TRISE

TMAX must be < 150°C

PTOTAL(MAX) = 116mW and the maximum die temperature

will be 109°C. If this same circuit must run at 125°C ambi-

ent, the maximum die temperature will increase to 150°C.

Note that supply current, and therefore PQ, is proportional

to temperature. Refer to the Typical Performance Charac-

teristics section. In this condition, the maximum output

current should be reduced to avoid device damage. The

DCB package, on the other hand, has a lower θJA and

subsequently, a lower die temperature increase than the

MSOP. With the same condition as above, the DCB will

rise only 7.5°C to 87.5°C and 132.5°C, respectively.

It is important to note that the LT6105 has been designed

to provide at least 1mA to the output when required, and

can deliver more under large VSENSE conditions. Care must

be taken to limit the maximum output current by proper

choice of sense resistor and input resistors.

APPLICATIONS INFORMATION

LT6105

6105fa

Output Filtering

The output voltage, VOUT is simply IOUT • ZOUT. This

makes ﬁ ltering straightforward. Any circuit may be used

which generates the required ZOUT to get the desired ﬁ lter

response. For example, a capacitor in parallel with ROUT

will give a low pass response. This will reduce unwanted

noise from the output, and may also be useful as a charge

reservoir to keep the output steady while driving a switch-

ing circuit such as a mux or an ADC. This output capacitor

in parallel with an output resistor will create a pole in the

output response at:

fRC

db OUT OUT

–•• •

=π

APPLICATIONS INFORMATION

Response Time

The LT6105 is designed to exhibit fast response to inputs

for the purpose of circuit protection or signal transmission.

This response time will be affected by the external circuit

in two ways—delay and speed. If the output current is

very low and an input transient occurs, there may be an

increased delay before the output voltage begins changing.

This can be improved by increasing the minimum output

current, either by increasing RSENSE or decreasing RIN. The

effect of increased output current is illustrated in the step

response curves in the Typical Performance Characteristics

section of this data sheet. Note that the curves are labeled

with respect to the initial output currents. The speed is

also affected by the external circuit. In this case, if the

input changes very quickly, the internal ampliﬁ er will slew

the base of the internal output PNP (Figure 1) in order to

maintain the internal loop. This results in current ﬂ owing

through RIN and the internal PNP. This current slew rate

will be determined by the ampliﬁ er and PNP characteris-

tics as well as the input resistor, RIN. See the Slew Rate

vs RIN curve in the Typical Performance Characteristics

section. Using a smaller RIN will allow the output current

to increase more quickly, decreasing the response time

at the output. This will also have the effect of increasing

the maximum output current.

–

0.039Ω

249Ω

249Ω 4.99k

LT6105

TO LOAD

SOURCE

0V TO 44V

VOUT = 780mV/A

VOUT

0.22μF

6105 TA02

2.85V TO 36V

VS+

VS––IN

+IN

V–

V+

Gain of 20 Current Sense Ampliﬁ er with Output Filtering

TYPICAL APPLICATIONS

LT6105

6105fa

TYPICAL APPLICATIONS

50ms/DIV

5V/DIV

2V/DIV

10V/DIV

6105 F05

VBAT = 3.6V

ICPO = 200μA

CCPO = 2.2ΩF

Figure 5. Current Measurement Waveforms. The Top Trace Is the

MOSFET Gate with High On. The Middle Trace Is the Bottom of

the Solenoid/ Inductor. The Bottom Trace Is the LT6105 Output,

Representing Solenoid Current at 80mA/ DIV. Glitches Are Useful

Indicators of Solenoid Plunger Movement

Solenoid Monitor

The large input common mode range of the LT6105

makes it suitable for monitoring currents in quarter,

half and full bridge inductive load driving applications.

Figure 4 shows an example of a quarter bridge. The

MOSFET pulls down on the bottom of the solenoid to

increase solenoid current. It lets go to decrease current,

and the solenoid voltage freewheels around the Schottky

diode. Current measurement waveforms are shown in

Figure 5. The small glitches occur due to the action of

the solenoid plunger, and this provides an opportunity for

mechanical system monitoring without an independent

sensor or limit switch.

Figure 6 shows another solenoid driver circuit, this time

with one end of the solenoid grounded and a P-channel

MOSFET pulling up on the other end. In this case, the

inductor freewheels around ground, imposing a negative

input common mode voltage of one Schottky diode drop.

This voltage may exceed the input range of the LT6105.

This does not endanger the device, but it severely degrades

its accuracy. In order to avoid violating the input range,

pull-up resistors may be used as shown.

6105 F04

LT6105

V–

V+

24V, 3W

SOLENOID

200Ω

1N5818

2N7000

–IN +IN

4.99k

200Ω

VOUT = 25mV/mA

VOUT

5VDC

24VDC

0V/OFF 5V/ON

–

1Ω

6105 F06

LT6105

V–

V+

24V, 3W

SOLENOID

200Ω

1N5818

TP0610L

1N914

–IN +IN

4.99k

200Ω

VOUT = 25mV/mA

VOUT

5VDC

24VDC

19V/ON 24V/OFF

–

1Ω

Figure 4. Simplest Form of a Solenoid Driver. The LT6105

Monitors the Current in Both On and Freewheel States. The

Lowest Common Mode Voltage Is 0V, While the Highest Is

24V Plus the Forward Voltage of the Schottky Diode

Figure 6. A Similar Circuit to Figure 4, but with Solenoid

Grounded, so Freewheeling Forces Inputs Negative.

Providing Resistive Pull-Ups Keeps Ampliﬁ er Inputs From

Falling Outside of Their Accurate Input Range

LT6105

6105fa

PACKAGE DESCRIPTION

3.00 p0.10

(2 SIDES)

2.00 p0.10

(2 SIDES)

NOTE:

1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (TBD)

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE

TOP AND BOTTOM OF PACKAGE

0.40 p 0.10

BOTTOM VIEW—EXPOSED PAD

1.65 p 0.10

(2 SIDES)

0.75 p0.05

R = 0.115

TYP

R = 0.05

TYP

1.35 p0.10

(2 SIDES)

PIN 1 BAR

TOP MARK

(SEE NOTE 6)

0.200 REF

0.00 – 0.05

(DCB6) DFN 0405

0.25 p 0.05

0.50 BSC

PIN 1 NOTCH

R0.20 OR 0.25

s 45o CHAMFER

0.25 p 0.05

1.35 p0.05

(2 SIDES)

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

1.65 p0.05

(2 SIDES)

2.15 p0.05

0.70 p0.05

3.55 p0.05

PACKAGE

OUTLINE

0.50 BSC

DCB Package

6-Lead Plastic DFN (2mm × 3mm)

(Reference LTC DWG # 05-08-1715)

LT6105

6105fa

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

PACKAGE DESCRIPTION

MSOP (MS8) 0307 REV F

0.53 p 0.152

(.021 p .006)

SEATING

PLANE

NOTE:

1. DIMENSIONS IN MILLIMETER/(INCH)

2. DRAWING NOT TO SCALE

3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.

MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.

INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX

0.18

(.007)

0.254

(.010)

1.10

(.043)

MAX

0.22 – 0.38

(.009 – .015)

TYP

0.1016 p 0.0508

(.004 p .002)

0.86

(.034)

REF

0.65

(.0256)

BSC

0o – 6o TYP

DETAIL “A”

GAUGE PLANE

4.90 p 0.152

(.193 p .006)

8765

3.00 p 0.102

(.118 p .004)

(NOTE 3)

3.00 p 0.102

(.118 p .004)

(NOTE 4)

0.52

(.0205)

REF

5.23

(.206)

MIN

3.20 – 3.45

(.126 – .136)

0.889 p 0.127

(.035 p .005)

RECOMMENDED SOLDER PAD LAYOUT

0.42 p 0.038

(.0165 p .0015)

TYP

0.65

(.0256)

BSC

MS8 Package

8-Lead Plastic MSOP

(Reference LTC DWG # 05-08-1660)

LT6105

6105fa

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com

LT 0408 REV A • PRINTED IN USA

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High Voltage High Side Current Sense Ampliﬁ er 4V to 60V/5V to 100V Operation, External Resistor Set Gain, SOT23

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–+

6105 F07

LT6105

V–

V+

TO –15V

LOAD

–15V

NEGATIVE

SUPPLY 100Ω

–IN +IN

4.99k

100Ω

VOUT = 1V/A

VOUT

5VDC

–

20mΩ

CURRENT FLOW

LT6105

V–

V+

TO +15V

LOAD

–15V

+15V

POSITIVE

SUPPLY

100Ω

–IN

+IN

4.99k

100Ω

VOUT = 1V/A VOUT

5VDC

20mΩ

CURRENT FLOW

Figure 7. The LT6105 Can Monitor the Current of Either Positive

or Negative Supplies, Without a Schematic Change. Just Ensure

That the Current Flow Is in the Correct Direction

Supply Monitoring

The input common mode range of the LT6105 also makes

it suitable for monitoring either positive or negative sup-

plies. Figure 7 shows one LT6105 applied as a simple

positive supply monitor, and another LT6105 as a simple

negative supply monitor. Note that the schematics are

practically identical and both have outputs conveniently

referred to ground. The only requirement for negative

supply monitoring, in addition to the usual constraints of

the absolute maximum ratings, is that the negative supply

to that LT6105 be at least as negative as the supply it is

monitoring.