Features * Operating Voltage: 5V * Access Time: 40 ns * Very Low Power Consumption * * * * * * * * - Active: 275 mW (Max) - Standby: 10 mW (Typ) Wide Temperature Range: -55C to +125C 400 Mils Width Packages: FP32 and SB32 TTL Compatible Inputs and Outputs Asynchronous No Single Event Latch-up below a LET Threshold of 80 MeV/mg/cm2@125C Tested up to a Total Dose of 300 krads (Si) according to MIL STD 883 Method 1019 ESD better than 4000V Deliveries at least equivalent to QML procurement according to MIL-PRF38535 Description The AT65609EHV is a very low power CMOS static RAM organized as 131072 x 8 bits. Utilizing an array of six transistors (6T) memory cells, the AT65609EHV combines an extremely low standby supply current with a fast access time at 40 ns over the full military temperature range. The high stability of the 6T cell provides excellent protection against soft errors due to noise. The AT65609EHV is processed according to the methods of the latest revision of the MIL PRF 38535 or ESCC 9000. Rad. Tolerant 128K x 8 5-volts Very Low Power CMOS SRAM AT65609EHV It is manufactured on the same process as the MH1RT RAD-hard sea of gates series. PRELIMINARY 7832B-AERO-11/09 PRELIMINARY Block Diagram Pin Configuration 32-lead DIL side-brazed or 32-lead Flat Pack - 400 Mils NC A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 GND Note: 2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 Vcc A15 CS2 WE A13 A8 A9 A11 OE A10 CS1 I/O7 I/O6 I/O5 I/O4 I/O3 NC pin is not bonded internally. So, it can be connected to GND or VCC. AT65609EHV 7832B-AERO-11/09 AT65609EHV Pin Description Table 1. Pin Names Names Description A0 - A16 Address inputs I/O0 - I/O7 Data Input/Output CS1 Chip select 1 CS2 Chip select 2 WE Write Enable OE Output Enable VCC Power GND Ground Table 2. Truth Table CS1 CS2 WE OE Inputs/ Outputs H X X X Z Deselect/Power-down X L X X Z Deselect/Power-down L H H L Data Out Read L H L X Data In Write L H H H Z Note: 7832B-AERO-11/09 Mode Output Disable L = low, H = high, X = H or L, Z = high impedance. PRELIMINARY 3 PRELIMINARY Electrical Characteristics Absolute Maximum Ratings Supply voltage to GND potential:..........................-0.5V + 7.0V *NOTE: Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure between recommended DC operating and absolute maximum rating conditions for extended periods may affect device reliability. DC input voltage: ..............................GND - 0.5V to VCC + 0.5 DC output voltage high Z state: ........GND - 0.5V to VCC + 0.5 Storage temperature: .......................................-65C to +150C Output current into outputs (low): .................................. 20 mA Electro Static Discharge voltage with HBM method (MIL STD 883D method 3015): ................................. > 4000V Electro Static Discharge voltage with Socketed CDM method (ANSI/ESD SP5.3.2-2004): ....................................... > 1000V Military Operating Range Operating Voltage Operating Temperature 5V + 10% -55C to + 125C Recommended DC Operating Conditions Parameter Description Minimum Typical Maximum Unit VCC Supply voltage 4.5 5.0 5.5 V GND Ground 0.0 0.0 0.0 V VIL Input low voltage GND - 0.5 0.0 0.8 V VIH Input high voltage 2.2 - VCC + 0.5 V Parameter Description Cin(1) Cout(1) Capacitance Note: 4 Minimum Typical Maximum Unit Input low voltage - - 8 pF Output high voltage - - 8 pF 1. Guaranteed but not tested. AT65609EHV 7832B-AERO-11/09 AT65609EHV DC Parameters DC Test Conditions TA = -55C to + 125C; Vss = 0V; VCC = 4.5V to 5.5V Symbol Description Minimum Typical Maximum Unit IIX (1) Input leakage current -1 - 1 A IOZ(1) Output leakage current -1 - 1 A VOL (2) Output low voltage - - 0.4 V VOH (3) Output high voltage 2.4 - - V 1. GND < Vin < VCC, GND < Vout < VCC Output Disabled. 2. 3. VCC min. IOL = 8 mA VCC min. IOH = -4 mA. Consumption Symbol Description AT65609EHV Unit Value ICCSB (1) Standby supply current 5 mA max ICCSB1 (2) Standby supply current 3 mA max ICCOP (3) Dynamic operating current 50 mA max 1. 2. 3. 7832B-AERO-11/09 CS1 > VIH or CS2 < VIL and CS1 < VIL. CS1 > VCC - 0.3V or, CS2 < GND + 0.3V and CS1 < 0.2V. F = 1/TAVAV, Iout = 0 mA, WE = OE = VCC, Vin = GND or VCC, VCC max, CS1=VIL, CS2=VIH PRELIMINARY 5 PRELIMINARY AC Parameters AC Test Conditions Input Pulse Levels: ............................................................................................... GND to 3.0V Input Rise/Fall Times: ......................................................................................................... 5 ns Input Timing Reference Levels: ......................................................................................... 1.5V Output loading IOL/IOH (see Figure 1 and Figure 2): ................................................... +30 pF AC Test Loads Waveforms Figure 1 6 Figure 2 Figure 3 AT65609EHV 7832B-AERO-11/09 AT65609EHV Data Retention Mode Atmel CMOS RAM's are designed with battery backup in mind. Data retention voltage and supply current are guaranteed over temperature. The following rules ensure data retention: 1. During data retention chip select CS1 must be held high within VCC to VCC -0.2V or, chip select CS2 must be held down within GND to GND +0.2V. 2. Output Enable (OE) should be held high to keep the RAM outputs high impedance, minimizing power dissipation. 3. During power up and power-down transitions CS1 and OE must be kept between VCC + 0.3V and 70% of VCC, or with CS2 between GND and GND -0.3V. 4. The RAM can begin operation > TR ns after VCC reaches the minimum operation voltages (4.5V). Timing Data Retention Characteristics Parameter Description VCCDR VCC for data retention 2.0 - - V TCDR Chip deselect to data retention time 0.0 - - ns TR Operation recovery time TAVAV(1) - - ns ICCDR1(2) Data retention current at 2.0V - 1 1.5 mA ICCDR2(2) Data retention current at 3.0V - 1.5 2 mA Notes: 7832B-AERO-11/09 Typical Minimum TA = 25 C Maximum Unit 1. TAVAV = Read Cycle Time 2. CS1 = VCC or CS2 = CS1 = GND, Vin = GND/VCC, this parameter is only tested at VCC = 2V. PRELIMINARY 7 PRELIMINARY Write Cycle Symbol Parameter AT65609EHV Unit Value TAVAW Write cycle time 35 ns min TAVWL Address set-up time 0 ns min TAVWH Address valid to end of write 30 ns min TDVWH Data set-up time 20 ns min TE1LWH CS1 low to write end 30 ns min TE2HWH CS2 high to write end 30 ns min TWLQZ Write low to high Z(1) 12 ns max TWLWH Write pulse width 30 ns min TWHAX Address hold from to end of write 3 ns min TWHDX Data hold time 0 ns min TWHQX Write high to low Z(1) 0 ns min Note: Write Cycle 1 8 Parameters guaranteed, not tested, with output loading 5 pF. WE Controlled, OE High During Write AT65609EHV 7832B-AERO-11/09 AT65609EHV Write Cycle 2 WE Controlled, OE Low Write Cycle 3 CS1 or CS2 Controlled Note: 7832B-AERO-11/09 The internal write time of the memory is defined by the overlap of CS1 Low and CS2 HIGH and WE LOW. Both signals must be actived to initiate a write and either signal can terminate a write by going in actived. The data input setup and hold timing should be referenced to the actived edge of the signal that terminates the write. Data out is high impedance if OE = VIH. PRELIMINARY 9 PRELIMINARY Read Cycle Symbol Parameter AT65609EHV Unit Value TAVAV Read cycle time 40 ns min TAVQV Address access time 40 ns max TAVQX Address valid to low Z(1) 3 ns min TE1LQV Chip-select1 access time 40 ns max TE1LQX CS1 low to low Z(1) 3 ns min TE1HQZ CS1 high to high Z(1) 15 ns max TE2HQV Chip-select2 access time 40 ns max TE2HQX CS2 high to low Z(1) 3 ns min TE2LQZ CS2 low to high Z(1) 15 ns max TGLQV Output Enable access time 12 ns max TGLQX OE low to low Z(1) 0 ns min TGHQZ OE high to high Z(1) 10 ns max Note: 10 1. Parameters Guaranteed, not tested, with output loading 5 pF. AT65609EHV 7832B-AERO-11/09 AT65609EHV Read Cycle 1 Address Controlled (CS1 = OE Low, CS2 = WE High) Read Cycle 2 CS1 Controlled (CS2 = WE High) Read Cycle 3 CS2 Controlled (WE High, CS1 Low) 7832B-AERO-11/09 PRELIMINARY 11 PRELIMINARY Ordering Information Part Number Temperature Range Speed Package AT65609EHV-C940-E (1) 25C 40 ns SB32.4 AT65609EHV-DJ40-E (1) 25C 40 ns FP32.4 AT65609EHV-C940MQ -55 to +125C 40 ns SB32.4 AT65609EHV-DJ40MQ -55 to +125C 40 ns FP32.4 AT65609EHV-C940SV -55 to +125C 40 ns SB32.4 AT65609EHV-DJ40SV -55 to +125C 40 ns FP32.4 AT65609EHV-C940SR -55 to +125C 40 ns SB32.4 AT65609EHV-DJ40SR -55 to +125C 40 ns FP32.4 Note: 12 Flow Engineering Samples Mil Level B Space Level B Space Level B RHA 1. Contact Atmel for availability. AT65609EHV 7832B-AERO-11/09 AT65609EHV Package Drawings 32-lead Flat Pack 400 Mils 7832B-AERO-11/09 PRELIMINARY 13 PRELIMINARY 32-lead Side Braze 400 Mils 14 AT65609EHV 7832B-AERO-11/09 AT65609EHV Document Revision History Changes from 7832A to 7832B 1. Page 1 : total dose value updated and ESD item added 2. Page 5 : ESD HBM improved and ESD Socketed CDM added 3. Page 6 : note 3 of consumption table updated 4. Page 13 : ordering information section updated 7832B-AERO-11/09 PRELIMINARY 15 Headquarters International Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Atmel Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel: (852) 2721-9778 Fax: (852) 2722-1369 Atmel Europe Le Krebs 8, Rue Jean-Pierre Timbaud BP 309 78054 Saint-Quentin-enYvelines Cedex France Tel: (33) 1-30-60-70-00 Fax: (33) 1-30-60-71-11 Atmel Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel: (81) 3-3523-3551 Fax: (81) 3-3523-7581 Technical Support aero@nto.atmel.com Sales Contact www.atmel.com/contacts Product Contact Web Site www.atmel.com Literature Requests www.atmel.com/literature Disclaimer: The information in this document is provided in connection with Atmel products. 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