© 2000 Fairchild Semiconductor Corporation DS008442 www .fairchildsemi.com
August 1986
Revised March 2000
DM74LS244 Octal 3-STATE Buffer/Line Driver/Line Receiver
DM74LS244
Octal 3-STATE Buffer/Line Driver/Line Receiver
General Descript ion
These buffers/line drivers are designed to improve both the
performance and PC board density of 3-STATE buffers/
drivers employed as memory-address drivers, clock driv-
ers, and bus-oriented transmitters/receivers. Featuring 400
mV of hysteresis at each low current PNP data line input,
they provi de improve d noise rej ection and h igh fan out ou t-
puts and can be used to drive terminated lines down to
133.
Features
3-STATE outputs drive bus lines directly
PNP inputs reduce DC loading on bus lines
Hysteresis at data inputs improves noise margins
Typical IOL (sink current) 24 mA
Typical IOH (source current) 15 mA
Typical propagation delay times
Invert ing 10.5 ns
Noninverting 12 ns
Typical enable/disable time 18 ns
Typical power dissipation (enabled)
Invert ing 130 mW
Noninverting 135 mW
Ordering Code:
Devices also available in Tape and R eel. Speci fy by append ing the suffix let t er “X” to the o rdering c ode.
Connection Diagram Function Table
L = LOW Logic Lev el
H = HIGH Logic Level
X = Either LOW or HIGH Logic Level
Z = High Imp edance
Order Number Package Number Package Description
DM74LS244WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
DM74LS244SJ M20D 20-Lead Small Outline Packag e (SOP ), EIAJ TYPE II, 5.3mm W ide
DM74LS244N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Inputs Output
GAY
LLL
LHH
HXZ
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DM74LS244
Absolute Maximum Ratings(No te 1) Note 1: The “A bsolute Maxim um Ratin gs” are those valu es beyon d which
the saf ety of the device cannot be guarante ed. The device s hould not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not gua rant eed at the absolute maximum ratin gs.
The “Re comme nded Operat ing Co ndition s” table will define the cond itions
for actu al device operation.
Recommended Operating Conditions
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Note 2: All typic als are at VCC = 5V, TA = 25°C.
Note 3: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Supply Voltage 7V
Input Voltag e 7V
Operating Free Air Temperature Range 0°C to +70°C
Storage Temperature Range 65°C to +150°C
Symbol Parameter Min Nom Max Units
VCC Supply Voltage 4.75 5 5.25 V
VIH HIGH Level Input Voltage 2 V
VIL LOW Level Input Voltage 0.8 V
IOH HIGH Level Output Current 15 mA
IOL LOW Level Output Current 24 mA
TAFree Air Operating Temperature 0 70 °C
Symbol Parameter Conditions Min Typ Max Units
(Note 2)
VIInput Clamp Voltage VCC = Min, II = 18 mA 1.5 V
HYS Hysteresis (VT+ VT)V
CC = Min 0.2 0.4 V
Data Inputs Only
VOH HIGH Level Output Voltage VCC = Min, VIH = Min 2.7
VIL = Max, IOH = 1 mA
VCC = Min, VIH = Min 2.4 3.4 V
VIL = Max, IOH = 3 mA
VCC = Min, VIH = Min 2
VIL = 0.5V, IOH = Max
VOL LOW Level Output Voltage VCC = Min IOL = 12 mA 0.4 VVIL = Max IOL = Max 0.5
VIH = Min
IOZH Off-State Output Current, VCC = Max VO = 2.7V 20 µA
HIGH Level Voltage Applied VIL = Max
IOZL Off-State Output Current, VIH = Min VO = 0.4V 20 µA
LOW Level Voltage Applied
IIInput Current at Maximum VCC = Max VI = 7V 0.1 mA
Input Voltage
IIH HIGH Level Input Current VCC = Max VI = 2.7V 20 µA
IIL LOW Level Input Current VCC = Max VI = 0.4V 0.5 200 µA
IOS Short Circuit Output Current VCC = Max (Note 3) 40 225 mA
ICC Supply Current VCC = Max, Outputs HIGH 13 23
Outputs Open Outputs LOW 27 46 mA
Outputs Disabled 32 54
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DM74LS244
Switching Characteristics
at VCC = 5V, TA = 25 °C
Symbol Parameter Conditions Max Units
tPLH Propagation Delay Time CL = 45 pF 18 ns
LOW-to-HIGH Level Output RL = 667
tPHL Propagation Delay Time CL = 45 pF 18 ns
HIGH-to-LOW Level Output RL = 667
tPZL Output Enable Time to CL = 45 pF 30 ns
LOW Level RL = 667
tPZH Output Enable Time to CL = 45 pF 23 ns
HIGH Level RL = 667
tPLZ Output Disable Time CL = 5 pF 25 ns
from LOW Level RL = 667
tPHZ Output Disable Time CL = 5 pF 18 ns
from HIGH Level RL = 667
tPLH Propagation Delay Time CL = 150 pF 21 ns
LOW-to-HIGH Level Output RL = 667
tPHL Propagation Delay Time CL = 150 pF 22 ns
HIGH-to-LOW Level Output RL = 667
tPZL Output Enable Time to CL = 150 pF 33 ns
LOW Level RL = 667
tPZH Output Enable Time to CL = 150 pF 26 ns
HIGH Level RL = 667
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DM74LS244
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M20B
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DM74LS244
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
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DM74LS244 Octal 3-STATE Buffer/Line Driver/Li ne Receiver
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N20A
Fairchild does no t assume any responsibility for use of any circuitry de scribed, no circuit patent licenses ar e implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life suppor t de vices o r systems a re devices or syste ms
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical compon ent i n any compon ent of a life su pport
device or system whose failure to perform can be rea-
sonabl y ex pect ed to ca use the fa i lure of the life su pp ort
device or system, or to affect its safety or effectiveness.
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