TOSHIBA TMP87CC78/H78/K78/M78 CMOS 8-Bit Microcontroller TMP87CC78F, TMP87CH78F, TMP87CK78F, TMP87CM78F The 87CC78/H78/K78/M78 are the high speed and high performance 8-bit single chip microcomputers. These MCU contain 8-bit A/D conversion inputs and a VFT (Vacuum Fluorescent Tube) driver on a chip. Part No. ROM RAM Package OTP MCU TMP87CC78F 12 Kx 8-bit . wort sss rst porn n srry 512 x 8-bit TMP87CH78F 16K x 8-bit rrr rc P-QFP100-1420-0.65A TMP87PM78F TMP87CK78F 24 K x 8-bit . warts rrr tarpon rrr) 1024 x 8-bit TMP87CM78F 32K x8-bit Features @8-bit single chip microcomputer TLCS-870 Series @ Instruction execution time: 0.5 us (at 8 MHz), 122 us (at 32.768 kHz) @ 412 basic instructions @ Multiplication and Division (8 bits x 8 bits , 16 bits + 8 bits) Bit manipulations (Set/Clear/Complement/Move/Test/Exclusive or) @ 16-bit data operations @ 1-byte jump/subroutine-call (Short relative jump/ Vector call) 15 interrupt sources (External: 5, Internal: 10) e Allsources have independent latches each, and nested interrupt control is available. @ 3 edge-selectable external interrupts with noise reject @ High-speed task switching by register bank changeover @ 13 Input/Output ports (89 pins) TMP87CC78F @ Output: 2 port (16 pins) TMP87CH78F P-QFP100-1420-0.65A @ Input/Output: 11 ports (73 pins) ivitthaeal @Two 16-bit Timer/Counters TMP87PM78F @ Timer, Eventcounter, programmable pulse generator output, Pulse width measurement, External trigger timer, Window modes. @ Two 8-bit Timer/Counters @ Timer, Event counter, Capture (Pulse width/duty measurement), PWM output, Programmable divider output modes @ Time Base Timer (Interrupt frequency: 1 Hz to 16 kHz) @ Divider output function (frequency: 1kHz to 8 kHz) 000707EBA1 @ For a discussion of how the reliability of microcontrollers can be predicted, please refer to Section 1.3 of the chapter entitled Quality and Reliability Assurance / Handling Precautions. @ TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the Handling Guide for Semiconductor Devices, or TOSHIBA Semiconductor Reliability Handbook etc.. @The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury (Unintended Usage). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer's own risk. @ The products described in this document are subject to the foreign exchange and foreign trade laws. @ The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. @ The information contained herein is subject to change without notice. 3-78-1 2000-07-19TOSHIBA TMP87CC78/H78/K78/M78 @Watchdog Timer Interrupt source/reset output (programmable) @8-bit Serial Interface: 2 channels With 8 bytes transmit/receive data buffer @ Internal/external serial clock, and 4/8-bit mode @8-bit successive approximate type A/D converter with sample and hold 8 analog inputs Conversion time: 23 4s at 8 MHz @ Vacuum Fluorescent Tube Driver (automatic display) High breakdown voltage ports (max. 40 V x 50 bits) @ Key scanning function @ Key-matrix constructed by segment outputs (1 to 16) and key inputs (1 to 8) @ Dual clock operation @ Single/Dual-clock mode (option) @ Five Power saving operating modes @ STOP mode: Oscillation stops. Battery/Capacitor back-up. Port output hold/High-impedance. @ SLOW mode: Low power consumption operation using low-frequency clock (32.768 kHz). @ IDLE1 mode: CPU stops, and Peripherals operate using high-frequency clock. Release by interrupts. @ IDLE2 mode: CPU stops, and Peripherals operate using high-and low-frequency clock. Release by interrupts. @ SLEEP mode: CPU stops, and Peripherals operate using low-frequency clock. Release by interrupts. @Wide operating voltage: 2.7 to 5.5 V at 32.768 kHz, 4.5 to 5.5 V at 8 MHz/ 32.768 kHz @Emulation Pod: BM87CM78F0A 3-78-2 2000-07-19TMP87CC78/H78/K78/M78 P-QFP100-1420-0.65A Pin Assignments (Top View) TOSHIBA z amloNn -|/Se SEBEEE, . Y~Rrwewotmneonvnd nan owre YeSesegssree ses sge omnmnvunst Ani COA OAnRW HTH NN (SLD) OSd Lg Oe SSA (vL5) bGd Gems 6z For) Zz2d (1NoOLx) (19) 79d Comes gz for] =LZd (NILX) (219) Sd Comers 7@foog sal (LL9) 7$ Commss 9z fr ~Od (O19) SSd Homm9s $z fr aaa (65) 96d Comms vz PCD 4auvA (89) 49d Comes z PI SSsWvA (49) Od Comm6s zz Fr SSA (95) L2d Commo9 tz Poco 29d (ZNIY) (s9/0$) @d COOL oz frog: 39d (9NI) (v5, 1S) 4d Comz9 6. Gor 89d (SNI) (e5/2S) pd DomE9 8.4 #9d (PNIV) (2D S) S4d omg ZL 9d (ENI) (9/78) 94d Cems9 9. tr 29d (ZNIV) (09/65) 44d Com99 Str 19d (LNIY) (98) 08d Comm2Z9 vl [tr 09d (ONIY) (2S) L8d Come9 L for = ed (DL/ELNI) (8s) 28d Commb69 ZL for Zd (Z0s) (68) 8d Commoz LLPrr ted (11S) (OLS) y8d Coe 01 rr + Od (L4DS) (LLS) S8d Pemmzz 6 bro Ltd (ZAan/70S) (71S) 98d ome g frog 9td (9AanN/Z1S) (1$) @d Commer. PO Srd (SAIN/ZADS) (vl$) 06d fems 9 Pr trd (vVAIN/0dd/IN Md) (SLS) L6d f=qm9Z s Pr 7 Evd (Aq>) (91S) 26d Codez v Poo Zvrd (ZAa) (Z4LS) 6d Comme foro trd (LAq) (81S) 6d Comm6Z O Z Pre Ord (OAIy (61S) S64 Comm08 | foo daa SBBSSHSHSBBSRAARARAARRARS SSSSSSSSSSRESR ERS S0RE 28a qgaagagcgooanonhadcaaoaaaanaa 2000-07-19 All VDDs should be connected externally for keeping the same voltage level. 3-78-3 Note:TOSHIBA Block Diagram VO Ports Output Ports P87 P77 to to P80 P70 P97 to P30 PQ P8 P7 VDD Power Supply { VSS TMP87CC78/H78/K78/M78 /O Ports A c P57 P1D7 P1E7 P1F1 N to to to to P1D0 P1EO FO PID PIE PIF Key scan control VFT driver circuit (automatic display) VFT Poewr VKK Supply Reset I/O RESET System Controller Test Pin TEST Standby Controller Timing Generator Time Base F Timer Resonator XIN High Connectiong (XOUT u Clock Pins Low Generator Watchdog Timer frequ ram Counter Stack Pointer Data Memory Program Register banks Memory(ROM) Interrupt Controller 8-bit Serial Timer/Counters Interfaces TC3 TC4 SIO1 $102 16-bit Timer/Counters TC1 TC2 P22 VAREF P67 (AIN7) PO7 P17 P33 Pa7 to VASS ta to to to to P20 4 P60 (AINO) POO P10 P30 P40 yy Y~ /O Ports 2000-07-19 3-78-4TOSHIBA TMP87CC78/H78/K78/M78 Pin Function mae Pin Name Input / Output Function P07 to POO vo Two 8-bit programmable input/output ports (tri-state). P17, P16 vo Pe Each bit of these ports can be individually [Urs P15 (TC2) VO (Input) | configured as an input or an output under | Timer/Counter 2 input vee eeeeeeteeeeeeceeeeeneee Pe ccsccueetsieeeeteneeees software control. one Fe conse oe VO Gnu) | During reset, all bitsare configured as | Programmable pulse generator output P13 (DVO) VO (Input) | INPUts- 7 Divider output vate eceeceeeeecetentsseecceecceseapeccerscsteesceeeeeneees When used asadivider output, the latch [o.oo ceeccesccnsstecceeeeescteasaeseeeeeeeenteaees aan External interrupt input 2 or must be set to 1. Pe TTD vO Gnput Timer/Counter 1 input P11 (INT1) External interrupt input 1 P10 (INTO) External interrupt input 0 P22 (XTOUT) VO (Output) | 3-bit input/output port with latch. Resonator connecting pins (32.768 kHz). PE ee For inputting external clock, XTIN is used P21 (XTIN) I/O (Input) When used as an input port, the latch must | and XTOUT is opened. _ beset to 1. External interrupt input 5orSTOP mode P20(INT5/STOP) release signal input we . External interrupt input 3 or Timer/Counter P33 (INT3/TC3) VO (Input) 4-bit input/output port with latch. 3 input P32 (SO1) VO (Output) | When used as an input port, a SIO $10 serial data Output! vee cetunnaeesensseesecseseeevstseepfeccussssetensseesensaeess input/output, a timer/counter input, or an oon P31 (S11) VO (Input) | interrupt input, the latch must be set to 510 serial data Input! cleared to "0". P30 (SCK1) 70 (I/O) $IO serial clock input/output P47 (SO2/KEY7) 70 (I/O) 8-bit input/output port with latch. SIO Serial data output2 or key scan input? P46 (SI2 / KEY6) /O (Input) When used as an input port, a SIO SIO Serial data input2 or key scan input6 decceeeeeeeeeteceeeeeeeeeeeeeteteeapbescseecseteeeeeeeeeeeeee Input/Output, or a PWIM/PDO output, the SiO Serial clock inputioutput2 3 key Scan PAS (SCK2/ KEYS) latch must be set to 1. inputs deceeeeeeeeeteeccecueeeeeeeeeeeees V0 (vO) bit PW olitput or P44 (PWIIPDOIKEY 4) 8-bit programmable divider output or key veveeeeeceeeetecsnettrteceeecetneapbecesseessseeceeeeeneeeee SCAN INPUT i eeeeneeeeereeees P43 (KEY3) to P40 (KEYO) \/O (input) Key scan inputs 3 to 0 8-bit high breakdown voltage linput/output ports P57 (G8) to P50 (G15) Vo (Output) with the latch. When used as a VFT driver output, the | \VFT digit driver outputs latch must be cleared to0". 8-bit programmable input/output port (tri-state).Each P67 (AIN7) to P60 (AINO) V/O (Input) bit of the port can be individually configured asan _| A/D converter analog inputs input or an output under software control. P77 (S5/GO) to P72 (SO / G5) Two &-bit high breakdown voltage output | yFT digit/segment driver outputs deceeeeeeeeetecetecueeeeeeeeteenes output Outpu)_ | ports with the latch. veers eenrnnrecenni P71 (G6) to P70 (G7) VFT digit driver outputs When used as a VFT driver output, the P87 (S13) to P80 (S6) Output (Output) | latch must be cleared to 0. P97 (S21) to P90 ($14) Three 8-bit high breakdown voltage input/output ports with the latch. PD7($29) to PDO ($22) VFT segment driver outputs VO (Output) | When used asa VFT driver output, the PE7(S37) to PEO (S30) latch must be cleared to 0. 2-bit high breakdown voltage input/output port with PF1(S39) to PFO (S38) latch.When used VFT driver output, the latch most be 3-78-5 2000-07-19TOSHIBA TMP87CC78/H78/K78/M78 Pin Name Input / Output Function Resonator connecting pins for high-frequency clock. XIN, XOUT Input, output | For inputting external clock, XIN Is used and XOUT is opened. Reset signal input or watchdog timer output / address-trap-reset output / system- RESET vo clock-reset outputed. TEST Input Test pin for out-going test. Be tied to low. VDD, VSS (Note) +5V,0V (GND) VKK Power Supply | VFT driver power supply VAREF, VASS Analog reference voltage inputs (High, Low) Note: All VDDs should be connected externally for keeping the same voltage Jevel. 3-78-6 2000-07-19TOSHIBA TMP87CC78/H78/K78/M78 OPERATIONAL DESCRIPTION The CPU core consists of a CPU, asystem clock controller, an interrupt controller, and a watchdog timer. This section provides a description of the CPU core, the program memory (ROM), the data memory 1. CPU CORE FUNCTIONS (RAM), and the reset circuit. 1.1 Memory Address Map The TLCS-870 Series is capable of addressing 64K bytes of memory. Figure 1-1 shows the memory address maps of the 87CC78/H78/K78/M78. In the TLCS-870 Series, the memory is organized 4 address spaces (ROM, RAM, SFR, and DBR). It uses a memory mapped I/O system, and all I/O registers are mapped in the SFR/DBR address spaces. There are 16 banks of general-purpose registers. The register banks are also assigned to the first 128 bytes of the RAM address space. SFR ( 0000, 0000, 0000, 0000, 003F 64 bytes 003F 64 bytes 003F 64 bytes 0035 64 bytes 0040 0040 0040 0040 | 128 byt | 128 byt : | 128byt | 128 byt ) Register banks : ytes : es : es : ytes P OOBE [oes OOBE [ones al OOBE |e. (B registers x16 banks) 00CcO 00co 00co 00co RAM | | 896 bytes 896 bytes 384 bytes 384 bytes | Note: : : : ROM; = Read Only Memory includes : : 023F | 023F | Program memory : : : ot bobo: : RAM; Random Access Memory includes : 043F 043F : Data memory Dake ae ne ae a ae aie ne Stack i o~ ~ li} wD ~~ D ~ General-purpose register banks ( 0 F80 0 F80 OF80 OF80 SFR; Special Function Register includes : : : i i HO ports DBR 128 bytes 128 bytes : 128 bytes : 128 bytes Peripheral control registers L : : : : Peripheral status registers OFFF OFFF OFFF OFFF System control registers i= x& i> amit sink = Interrupt control registers 8000 DG PoP: : ot Program Status Word : A000 co00 Do: : DBR; Data Buffer Register includes : : : : vi ; SIO data buffer : 32512 Dok ~waL : : a3 5 bytes. 724320 bytes: 16128 bytes D900 2032 byte VFT display data buffer FFOO cece eee ene eee FFOO wee eee ee eee eeee FFOO weet eee eee ee ee FFOO ween eee eens ROM : : = 192bytes 52 2 A" 192bytes = : 192 bytes 192 bytes BA be bcnteeeeeeeeenes reo ceeeceuesteaeeeaeees FFBF |eeceecseeceseseeesee] FFBF [o.ccecccsesceeeeeees FFCO } Vector table for vector call] pas f FeDe 32 bytes Pepe 32 bytes | repr |... 27 utes. | eeDE |... 32 bytes |) instructions (16 vectors) nage call FFEQ Vector table for interrupts/| . : struct FFFF 32 bytes FFFF 32 bytes FFFF 32 bytes 32 bytes reset (16 vectors) Instructions 87CM78 87CK78 87CH78 87CC78 Figure 1-1. Memory Address Maps 3-78-7 2000-07-19TOSHIBA TMP87CC78/H78/K78/M78 Electrical Characteristics Absolute Maximum Ratings (Vsg = OV ) Parameter Symbol Pins Ratings Unit Supply Voltage Vop -0.3t06.5 Vv Input Voltage Vin -0.3 to Vpp + 0.3 Vv Output Voltage Vout | P2, P3, P4, P5, P6, XOUT, RESET - 0.3 to Vpp + 0.3 V VouT3 | Source open drain ports Vpp - 40 to Vpp + 0.3 lout PO, P1, P2, P3, P4, P6 3.2 Output Current (Per 1 pin) louT3 P8, P9, PD, PE, PF -12 mA louta PS, P7 (digit outputs) -25 =lout: | PO, P1, P2, P3, P4, P6 120 Output Current (Total) mA Slout2z |P5, P7, P&, P9, PD, PE, PF - 240 Power Dissipation [Topr = 25C] PD Note 2 1200 mw Soldering Temperature (time) Tsld 260 (10s) C Storage Temperature Tstg -55to 125 * Operating Temperature Topr -30to 70 Note 1: The absolute maximum ratings are rated values which must not be exceeded during operation, even for an instant. Any one of the ratings must not be exceeded. [f any absolute maximum rating is exceeded, a device may break down or its performance may be degraded, causing it to catch fire or explode resulting in injury to the user. Thus, when designing products which include this device, ensure that no absolute maximum rating value will ever be exceeded. Note 2: Power Dissipation (PD) ; For PD, it is necessary to decrease 14.3 mw/C. Note 3: All VDDs should be connected externally for keeping the same voltage level. Recommended Operating Conditions | (Vss=0V, Topr= - 30 to 70C) Parameter Symbol Pins Conditions Min Max Unit NORMAL 1, 2 mades fc=8 MHz 4.5 IDLE1, 2 modes Supply Voltage Vop fs= SLOW mode 07 5.5 Vv STOP mode 2.0 Output Voltage Vout3 | Source open drain ports Vop - 38 Vop Vv Vv Except hysteresis input Vpp x 0.70 1H1 ua Vpp24.5V DD Input High Voltage Vin2 Hysteresis input Vpp x 0.75 Vop Vv Vin3 Vpp <4.5 Vv Vpp x 0.90 Vv Except hysteresis input Vop x 0.30 1L1 p Y p Vpp24.5V DD Input Low Voltage Vit2 Hysteresis input 0 Vpp x 0.25 Vv Vig Vpp <4.5V Vpp x 0.10 Vpp = 4.5 V to 5.5V 8.0 fe XIN, XOUT 0.4 MHz Clock Frequency Vpp =2.7V to5.5V 4.2 fs XTIN, XTOUT 30.0 34.0 kHz Note 1: The recommended operating conditions for a device are operating conditions under which it can be guaranteed that the device will operate as specified. {f the device is used under operating conditions other than the recommended operating conditions (supply voltage, operating temperature range, specified AC/DC values etc.), malfunction may occur. Thus, when designing products which include this device, ensure that the recommended operating conditions for the device are always adhered to. Note 2: Clock frequency fc: Supply voltage range is specified in NORMAL 1/2 mode and IDLE 1/2 mode. 3-78-101 2000-07-19TOSHIBA TMP87CC78/H78/K78/M78 How to calculate power consumption. With the TMP87CC78/CH78/CK78/CM78F, a pull-down resistor (Rk = 80 kQ typ.) can be built into a VFT driver using mask option (port by port). The share of VFT driver loss (VFT driver output loss + pull-down resistor (Rk) loss) in power consumption Pmax is high. When using a fluorescent display tube with a large number of segments, the maximum power consumption Pd must not be exceeded. power consumption Pmax = operating power consumption + normal output portloss + VFT driver loss Where, operating power consumption : VDDxIDD normal power consumption > Dlout1x0.4 VFT driver loss : VFT driver outputloss + pull-down resistor (Rk) loss Example: When Ta = 10 to 50C and a fluorescent display tube with segment output = 3 mA, digit output = 15 mA, Vxx = -25 Vis used. Operating conditions: VDD = 5V+10%, fc = 8 MHz, VFT dimmer time (DIM) = (14/16) x tseg: Power consumption Pmax = (1) + (2) + (3) Where, (1) Operating power consumption : VppxIpp=5.5Vx 16 mA =88 mW (2) Normal output port loss : Zlout1x0.4V=120 mAx0.4 V = 48 mW (3) VFT driver loss : segment pin = 3mAx2V xnumber of segments X = 6mMW x X digit pin = 15mAx 2 Vx 14/16 (DIM) = 26.25 mW Rk loss = (5.5 + 25 V)2/50 kO x (number of segments X + 1) = 18.605 mW x (X + 1) Therefore, Pmax = 88mW + 48mW+6mWxX + 26.25 mW + 18.605 mWx (X + 1) = 180.855 mW + 24.605... Maximum power consumption Pd when Ta = 50 C is determined by the following equation: PD = 1200 mW-(14.3 x25) = 842.5 mW The number of segments X which can be lit is: PD > Pmax 842.5 mW > 180.855 + 24.605 X 26 >X Thus, a fluorescent display tube with less than 26 segments can be used. If a fluorescent display tube with 26 segments or more is used, either a pull-down resistor must be attached externally , or the number of segments to be lit must be kept to less than 26 by software. 3-78-102 2000-07-19TOSHIBA TMP87CC78/H78/K78/M78 D.C. Characteristics (Vss = OV, Topr= 30 to 70C) Parameter Symbol Pins Conditions Min | Typ. | Max | Unit Hysteresis Voltage Vus | Hysteresis input - 0.9 - Vv lina TEST lin2 Open drain ports, Tri-state ports = - - +2 Input Current p e P Vpp=5.5V uA ling | RESET, STOP Vin =5-5V/0 lina PD, PE, PF ports (Note3) - - 80 . Rint Port P4 with pull-down 30 70 150 Input Resistance Rina | RESET 100 | 220 | 450 | kQ Pull-down Resistance Re Source open drain ports Vpp = 5.5V, Vex = -30V 50 80 110 lLo1 Sink open drain ports Vpp=5.5V, VouT=5.5V - - 2 cutput reakage ILoz | Source open drain ports Vpp =5.5V, Vout= -32V - - -2 | wA ILo3 | Tri-state ports Vpn =5.5V, VouTt=5-.5V/0V - - +2 . Von2 | Tri-state ports Vpp = 4.5 V, lon = -0.7mMA 4.1 - - Output High Voltage 2 p ee on Vv Vou2 | P8, P9, PD, PE, PF Vpp =4.5V, lon= -8mA 24] - - Output Low Voltage VoL | Except XOUT Vop=4.5V, lot = 1.6 mA - - 0.4 Vv Output High Current lou P5, P7 Vpp = 4.5 V, Voy =2.4V - -20| - mA Supply Current in Von=5.5V DD= - - NORMAL 1, 2 modes fc=8MHz 10 "6 A m Supply Current in fs = 32.768 kHz _ 5 7 IDLE 1,2 modes Vin = 5.3/0.2V Supply Current in SLOW mode lop Vpp =3.0V ~ 30 | 60 , ve ; fs = 32.768 kHz uA upply Current in Vin=2.8V/0.2V _ SLEEP mode N 15 30 Supply Current in Vpp =5.5V STOP mode Vin=5.3V/0.2V | 05 | 10 | 2A Note 1: Typical values show those at Topr=25,, Vpp =5 V. contained. Note 3: Input Current Ijy4 ; The current when the pull-down register (Rk) is not connected by the mask option. Note 2: Input Current Iny7Jin3; The current through resistor is not included, when the input resistor (pull-up/pull-down) is A/D Conversion Characteristics (Vss =O V, Vpp = 4.5 to 5.5 V, Topr= - 30 to 70C) Parameter Symbol Conditions Min Typ. Max Unit VarEF Vpp- 1.5 - Vpp Analog Reference Voltage Varer- Vass=2.5V Vv Vass Vss _ 1.5 Analog Input Voltage VAIN Vass _ VAREF Vv Analog Supply Current IREF - 0.5 1.0 mA Nonlinearity Error _ _ +1 Zero Point Error Vpp =5.0V, Vss5 = 0.0 V = - +1 Varer= 5.000 V LSB Full Scale Error Vass = 0.000 V = #1 Total Error _ _ +2 Note: Total errors includes all errors, except quantization error. 3-78-103 2000-07-19TOSHIBA TMP87CC78/H78/K78/M78 A.C. Characteristics (Vss =O V, Vpp = 4.5 to 5.5 V, Topr= 30 to 70C) Parameter Symbol Conditions Min Typ. Max Unit In NORMAL1, 2 modes 0.5 - 10 In IDLE 1, 2 modes Machine Cycle Time tey ys In SLOW mode 117.6 - 133.3 In SLEEP mode High Level Clock Pulse Width tweh __| For external clock operation XIN input), f = 8 MH 30 - - ns Low Level Clock Pulse Width twe, | O&!Ninput), fe = z High Level Clock Pulse Width twsh__| For external clock operation 14.7 5 Low Level Clock Pulse Width tws. | OCTIN input), fs = 32.768 kHz , x Recommended Oscillating Conditions | (Vss=0V, Vpp =4.5 to 5.5 V, Topr= - 30 to 70C) Oscillation Recommended Constant Parameter Oscillator Recommended Oscillator Frequency Cc C2 KYOCERA KBR8.0M 8 MHz Ceramic Resonator 30pf 30pf High-frequency KYOCERA KBR4.0MS Oscillation 4 MHz MURATA CSA 4.00MG 8 MHz TOYOCOM 210B 8.0000 Crystal Oscillator 20pf 20pf 4MHz TOYOCOM 204B 4.0000 Low-frequency gt Crystal Oscillator 32.768 KHz NDK MxX-38T 15pt 15pf Oscillation XTIN XTOUT B50 BA T SS (1) High-frequency Oscillation (2) Low-frequency Oscillation Note: An electrical shield by metal shield plate on the surface of IC package should be recommendable in order to prevent the device from the high electric fieldstress applied from CRT (Cathode Ray Tube) for continuous reliable operation. 3-78-104 2000-07-19