LM4880M/NOPB - NATIONAL SEMICONDUCTOR

LM4880

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LM4880 Dual 250 mW Audio Power Amplifier with

Shutdown Mode

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1FEATURES DESCRIPTION

The LM4880 is a dual audio power amplifier capable

2• No Bootstrap Capacitors or Snubber Circuits of delivering typically 250mW per channel of

are Necessary continuous average power to an 8Ωload with 0.1%

• Small Outline (SOIC) and PDIP Packaging THD+N using a 5V power supply.

• Unity-Gain Stable Boomer audio power amplifiers were designed

• External Gain Configuration Capability specifically to provide high quality output power with a

minimal amount of external components using

APPLICATIONS surface mount packaging.

• Headphone Amplifier Since the LM4880 does not require bootstrap

capacitors or snubber networks, it is optimally suited

• Personal Computers for low-power portable systems.

• CD-ROM Players The LM4880 features an externally controlled, low-

power consumption shutdown mode, as well as an

KEY SPECIFICATIONS internal thermal shutdown protection mechanism.

• THD+N at 1kHz at 200mW Continuous Average The unity-gain stable LM4880 can be configured by

Output Power into 8Ω: 0.1% (max) external gain-setting resistors.

• THD+N at 1kHz at 85mW Continuous Average

Output Power into 32Ω: 0.1% (typ)

• Output Power at 10% THD+N at 1kHz into 8Ω

325 mW (typ)

• Shutdown Current 0.7 µA (typ)

• 2.7V to 5.5V Supply Voltage Range

Connection Diagram

Figure 1. Small Outline and PDIP Packages- Top View

See Package Number D0008A for SOIC

or Package Number P0008E for PDIP

1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

LM4880

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Typical Application

*Refer to Application Information for information concerning proper selection of the input and output coupling

capacitors.

Figure 2. Typical Audio Amplifier Application Circuit

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Absolute Maximum Ratings (1)(2)

Supply Voltage 6.0V

Storage Temperature −65°C to +150°C

Input Voltage −0.3V to VDD + 0.3V

Power Dissipation (3) Internally limited

ESD Susceptibility (4) 2000V

ESD Susceptibility (5) 200V

Junction Temperature 150°C

Soldering Information Small Outline Package Vapor Phase (60 sec.) 215°C

Infrared (15 sec.) 220°C

Thermal Resistance θJC (PDIP) 37°C/W

θJA (PDIP) 107°C/W

θJC (SOIC) 35°C/W

θJA (SOIC) 170°C/W

(1) Absolute Maximum Ratings indicate limits beyond which damage may occur. Operating Ratings indicate conditions for which the device

is functional, but do not specify specific performance limits. Electrical Characteristics state DC and AC electrical specifications under

particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings.

Specifications are not specified for parameters where no limit is given, however, the typical value is a good indication of device

performance.

(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and

specifications.

(3) The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX,θJA, and the ambient temperature

TA. The maximum allowable power dissipation is PDMAX = (TJMAX −TA)/θJA or the number given in the Absolute Maximum Ratings,

whichever is lower. For the LM4880, TJMAX = 150°C, and the typical junction-to-ambient thermal resistance is 170°C/W for package

D0008A and 107°C/W for package P0008E.

(4) Human body model, 100 pF discharged through a 1.5 kΩresistor.

(5) Machine model, 220 pF–240 pF discharged through all pins.

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Operating Ratings

Temperature Range TMIN≤TA≤TMAX −40°C≤TA≤+85°C

Supply Voltage 2.7V≤VDD≤5.5V

Electrical Characteristics (1)(2)

The following specifications apply for VDD = 5V unless otherwise specified. Limits apply for TA= 25°C.

Symbol Parameter Conditions LM4880 Units

(Limits)

Typical Limit

(3) (4)

VDD Supply Voltage 2.7 V (min)

5.5 V (max)

IDD Quiescent Power Supply Current VIN=0V, IO=0A 3.6 6.0 mA (max)

ISD Shutdown Current VPIN5=VDD 0.7 5 μA (max)

VOS Output Offset Voltage VIN=0V 5 50 mV (max)

POOutput Power THD=0.1% (max); f=1 kHz;

RL=8Ω250 200 mW (min)

RL=32Ω85 mW

THD+N=10%; f=1 kHz

RL=8Ω325 mW

RL=32Ω110 mW

THD+N Total Harmonic Distortion+Noise RL=8Ω, PO=200 mW; 0.03 %

RL=32Ω, PO=75 mW; 0.02 %

f=1 kHz

PSRR Power Supply Rejection Ratio CB= 1.0 μF, 50 dB

VRIPPLE=200 mVrms, f = 100 Hz

(1) All voltages are measured with respect to the ground pin, unless otherwise specified.

(2) Absolute Maximum Ratings indicate limits beyond which damage may occur. Operating Ratings indicate conditions for which the device

is functional, but do not specify specific performance limits. Electrical Characteristics state DC and AC electrical specifications under

particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings.

Specifications are not specified for parameters where no limit is given, however, the typical value is a good indication of device

performance.

(3) Typicals are measured at 25°C and represent the parametric norm.

(4) Limits are ensured to TI's AOQL (Average Outgoing Quality Level).

Automatic Shutdown Circuit

Figure 3. Automatic Shutdown Circuit

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Automatic Switching Circuit

Figure 4. Automatic Switching Circuit

External Components Description

(Figure 2)

Components Functional Description

1. RiInverting input resistance which sets the closed-loop gain in conjunction with RF. This resistor also forms a high

pass filter with Ciat fc= 1/(2πRiCi).

2. CiInput coupling capacitor which blocks the DC voltage at the amplifier's input terminals. Also creates a high pass

filter with Riat fc= 1/(2πRiCi). Refer to PROPER SELECTION OF EXTERNAL COMPONENTS for an explanation

of how to determine the value of Ci.

3. RFFeedback resistance which sets closed-loop gain in conjunction with Ri.

4. CSSupply bypass capacitor which provides power supply filtering. Refer to Application Information for proper

placement and selection of the supply bypass capacitor.

5. CBBypass pin capacitor which provides half-supply filtering. Refer to PROPER SELECTION OF EXTERNAL

COMPONENTS for information concerning proper placement and selection of CB.

6. CoOutput coupling capacitor which blocks the DC voltage at the amplifier's output. Forms a high pass filter with RLat

fo= 1/(2πRLCo).

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Typical Performance Characteristics

THD + N THD + N

vs vs

Output Power Output Power

Figure 5. Figure 6.

THD + N THD + N

vs vs

Output Power Output Power

Figure 7. Figure 8.

THD + N THD + N

vs vs

Output Power Output Power

Figure 9. Figure 10.

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Typical Performance Characteristics (continued)

THD + N THD + N

vs vs

Frequency Frequency

Figure 11. Figure 12.

THD + N THD + N

vs vs

Frequency Frequency

Figure 13. Figure 14.

Output Power vs Output Power vs

Load Resistance Load Resistance

Figure 15. Figure 16.

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Typical Performance Characteristics (continued)

Output Power vs Output Power vs

Supply Voltage Supply Voltage

Figure 17. Figure 18.

Output Power vs Clipping Voltage vs

Supply Voltage Supply Voltage

Figure 19. Figure 20.

Clipping Voltage vs Power Dissipation vs

Supply Voltage Output Power

Figure 21. Figure 22.

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Typical Performance Characteristics (continued)

Output Attenuation in

Channel Separation Shutdown Mode

Figure 23. Figure 24.

Power Supply

Noise Floor Rejection Ratio

Figure 25. Figure 26.

Open Loop Supply Current vs

Frequency Response Supply Voltage

Figure 27. Figure 28.

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Typical Performance Characteristics (continued)

Frequency Response vs Frequency Response vs

Output Capacitor Size Output Capacitor Size

Figure 29. Figure 30.

Frequency Response vs Typical Application

Input Capacitor Size Frequency Response

Figure 31. Figure 32.

Typical Application

Frequency Response Power Derating Curve

Figure 33. Figure 34.

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APPLICATION INFORMATION

SHUTDOWN FUNCTION

In order to reduce power consumption while not in use, the LM4880 contains a shutdown pin to externally turn off

the amplifier's bias circuitry. This shutdown feature turns the amplifier off when a logic high is placed on the

shutdown pin. The trigger point between a logic low and logic high level is typically half supply. It is best to switch

between ground and the supply to provide maximum device performance. By switching the shutdown pin to VDD,

the LM4880 supply current draw will be minimized in idle mode. While the device will be disabled with shutdown

pin voltages less than VDD, the idle current may be greater than the typical value of 0.7 μA. In either case, the

shutdown pin should be tied to a definite voltage because leaving the pin floating may result in an unwanted

shutdown condition.

In many applications, a microcontroller or microprocessor output is used to control the shutdown circuitry which

provides a quick, smooth transition into shutdown. Another solution is to use a single-pole, single-throw switch in

conjunction with an external pull-up resistor. When the switch is closed, the shutdown pin is connected to ground

and enables the amplifier. If the switch is open, then the external pull-up resistor will disable the LM4880. This

scheme ensures that the shutdown pin will not float which will prevent unwanted state changes.

POWER DISSIPATION

Power dissipation is a major concern when using any power amplifier and must be thoroughly understood to

ensure a successful design. Equation 1 states the maximum power dissipation point for a single-ended amplifier

operating at a given supply voltage and driving a specified output load.

PDMAX = (VDD)2/(2π2RL) (1)

Since the LM4880 has two operational amplifiers in one package, the maximum internal power dissipation point

is twice that of the number which results from Equation 1. Even with the large internal power dissipation, the

LM4880 does not require heat sinking over a large range of ambient temperatures. From Equation 1, assuming a

5V power supply and an 8Ωload, the maximum power dissipation point is 158 mW per amplifier. Thus the

maximum package dissipation point is 317 mW. The maximum power dissipation point obtained must not be

greater than the power dissipation that results from Equation 2:

PDMAX = (TJMAX-TA)/θJA (2)

For the LM4880 surface mount package, θJA = 170° C/W and TJMAX = 150°C. Depending on the ambient

temperature, TA, of the system surroundings, Equation 2 can be used to find the maximum internal power

dissipation supported by the IC packaging. If the result of Equation 1 is greater than that of Equation 2, then

either the supply voltage must be decreased, the load impedance increased, or the ambient temperature

reduced. For the typical application of a 5V power supply, with an 8Ωload, the maximum ambient temperature

possible without violating the maximum junction temperature is approximately 96°C provided that device

operation is around the maximum power dissipation point. Power dissipation is a function of output power and

thus, if typical operation is not around the maximum power dissipation point, the ambient temperature may be

increased accordingly. Refer to Typical Performance Characteristics for power dissipation information for lower

output powers.

POWER SUPPLY BYPASSING

As with any power amplifier, proper supply bypassing is critical for low noise performance and high power supply

rejection. The capacitor location on both the bypass and power supply pins should be as close to the device as

possible. As displayed in Typical Performance Characteristics, the effect of a larger half supply bypass capacitor

is improved low frequency PSRR due to increased half-supply stability. Typical applications employ a 5V

regulator with 10 μF and a 0.1 μF bypass capacitors which aid in supply stability, but do not eliminate the need

for bypassing the supply nodes of the LM4880. The selection of bypass capacitors, especially CB, is thus

dependant upon desired low frequency PSRR, click and pop performance as explained in PROPER SELECTION

OF EXTERNAL COMPONENTS, system cost, and size constraints.

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AUTOMATIC SHUTDOWN CIRCUIT

As shown in Figure 3, the LM4880 can be set up to automatically shutdown when a load is not connected. This

circuit is based upon a single control pin common in many headphone jacks. This control pin forms a normally

closed switch with one of the output pins. The output of this circuit (the voltage on pin 5 of the LM4880) has two

states based on the state of the switch. When the switch is open, signifying that headphones are inserted, the

LM4880 should be enabled. When the switch is closed, the LM4880 should be off to minimize power

consumption.

The operation of this circuit is rather simple. With the switch closed, Rpand Roform a resistor divider which

produces a gate voltage of less than 5 mV. This gate voltage keeps the NMOS inverter off and Rsd pulls the

shutdown pin of the LM4880 to the supply voltage. This places the LM4880 in shutdown mode which reduces the

supply current to 0.7 μA typically. When the switch is open, the opposite condition is produced. Resistor Rppulls

the gate of the NMOS high which turns on the inverter and produces a logic low signal on the shutdown pin of

the LM4880. This state enables the LM4880 and places the amplifier in its normal mode of operation.

This type of circuit is clearly valuable in portable products where battery life is critical, but is also beneficial for

power conscious designs such as “Green PC's”.

AUTOMATIC SWITCHING CIRCUIT

A circuit closely related to Automatic Shutdown Circuit is Automatic Switching Circuit.Automatic Switching Circuit

utilizes both the input and output of the NMOS inverter to toggle the states of two different audio power

amplifiers. The LM4880 is used to drive stereo single ended loads, while the LM4861 drives bridged internal

speakers.

In this application, the LM4880 and LM4861 are never on at the same time. When the switch inside the

headphone jack is open, the LM4880 is enabled and the LM4861 is disabled since the NMOS inverter is on. If a

headphone jack is not present, it is assumed that the internal speakers should be on and thus the voltage on the

LM4861 shutdown pin is low and the voltage at the LM4880 pin is high. This results in the LM4880 being

shutdown and the LM4861 being enabled.

Only one channel of this circuit is shown in Figure 4 to keep the drawing simple but the typical application would

a LM4880 driving a stereo external headphone jack and two LM4861's driving the internal stereo speakers. If

only one internal speaker is required, a single LM4861 can be used as a summer to mix the left and right inputs

into a single mono channel.

PROPER SELECTION OF EXTERNAL COMPONENTS

Selection of external components when using integrated power amplifiers is critical to optimize device and

system performance. While the LM4880 is tolerant of external component combinations, care must be exercised

when choosing component values.

The LM4880 is unity-gain stable which gives a designer maximum system flexibility. The LM4880 should be used

in low gain configurations to minimize THD + N values, and maximize the signal to noise ratio. Low gain

configurations require large input signals to obtain a given output power. Input signals equal to or greater than 1

Vrms are available from sources such as audio codecs. Please refer to AUDIO POWER AMPLIFIER DESIGN for

a more complete explanation of proper gain selection.

Besides gain, one of the major design considerations is the closed-loop bandwidth of the amplifier. To a large

extent, the bandwidth is dictated by the choice of external components shown in Figure 2. Both the input

coupling capacitor, Ci, and the output coupling capacitor, Co, form first order high pass filters which limit low

frequency response. These values should be chosen based on needed frequency response for a few distinct

reasons.

Selection of Input and Output Capacitor Size

Large input and output capacitors are both expensive and space hungry for portable designs. Clearly a certain

sized capacitor is needed to couple in low frequencies without severe attenuation. But in many cases the

transducers used in portable systems, whether internal or external, have little ability to reproduce signals below

100 Hz–150 Hz. Thus using large input and output capacitors may not increase system performance.

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In addition to system cost and size, click and pop performance is effected by the size of the input coupling

capacitor, Ci. A larger input coupling capacitor requires more charge to reach its quiescent DC voltage (normally

1/2 VDD.) This charge comes from the output via the feedback and is apt to create pops upon device enable.

Thus, by minimizing the capacitor size based on necessary low frequency response, turn-on pops can be

minimized.

Besides minimizing the input and output capacitor sizes, careful consideration should be paid to the bypass

capacitor size. The bypass capacitor, CB, is the most critical component to minimize turn-on pops since it

determines how fast the LM4880 turns on. The slower the LM4880's outputs ramp to their quiescent DC voltage

(nominally 1/2 VDD), the smaller the turn-on pop. Choosing CBequal to 1.0 μF along with a small value of Ci(in

the range of 0.1 μF to 0.39 μF), should produce a virtually clickless and popless shutdown function. While the

device will function properly, (no oscillations or motorboating), with CBequal to 0.1 μF, the device will be much

more susceptible to turn-on clicks and pops. Thus, a value of CBequal to 1.0 μF or larger is recommended in all

but the most cost sensitive designs.

AUDIO POWER AMPLIFIER DESIGN

Design a Dual 200 mW/8ΩAudio Amplifier

Given:

Power Output: 200 mWrms

Load Impedance: 8Ω

Input Level: 1 Vrms (max)

Input Impedance: 20 kΩ

Bandwidth: 100 Hz–20 kHz ± 0.50 dB

A designer must first determine the needed supply rail to obtain the specified output power. Calculating the

required supply rail involves knowing two parameters, Vopeak and also the dropout voltage. As shown in Typical

Performance Characteristics, the dropout voltage is typically 0.5V. Vopeak can be determined from Equation 3.

(3)

For 200 mW of output power into an 8Ωload, the required Vopeak is 1.79V. Since this is a single supply

application, the minimum supply voltage is twice the sum of Vopeak and Vod. Since 5V is a standard supply

voltage in most applications, it is chosen for the supply rail. Extra supply voltage creates headroom that allows

the LM4880 to reproduce peaks in excess of 200 mW without clipping the signal. At this time, the designer must

make sure that the power supply choice along with the output impedance does not violate the conditions

explained in POWER DISSIPATION. Remember that the maximum power dissipation value from Equation 1

must be multiplied by two since there are two independent amplifiers inside the package.

Once the power dissipation equations have been addressed, the required gain can be determined from

Equation 4.

(4)

AV=−RF/Ri(5)

From Equation 4, the minimum gain is: AV=−1.26

Since the desired input impedance was 20 kΩ, and with a gain of −1.26, a value of 27 kΩis designated for Rf,

assuming 5% tolerance resistors. This combination results in a nominal gain of −1.35. The final design step is to

address the bandwidth requirements which must be stated as a pair of −3 dB frequency points. Five times away

from a −3 dB point is 0.17 dB down from passband response assuming a single pole roll-off. As stated in

External Components Description, both Riin conjunction with Ci, and Cowith RL, create first order high pass

filters. Thus to obtain the desired frequency low response of 100 Hz within ± 0.5 dB, both poles must be taken

into consideration. The combination of two single order filters at the same frequency forms a second order

response. This results in a signal which is down 0.34 dB at five times away from the single order filter −3 dB

point. Thus, a frequency of 20 Hz is used in the following equations to ensure that the response if better than 0.5

dB down at 100 Hz.

Ci≥1/(2π*20kΩ*20Hz) = 0.397 μF; use 0.39 μF

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Co≥1/(2π*8Ω*20Hz) = 995 μF; use 1000 μF

The high frequency pole is determined by the product of the desired high frequency pole, fH, and the closed-loop

gain, AV. With a closed-loop gain magnitude of 1.35 and fH= 100 kHz, the resulting GBWP = 135 kHz which is

much smaller than the LM4880 GBWP of 12.5 MHz. This figure displays that if a designer has a need top design

an amplifier with a higher gain, the LM4880 can still be used without running into bandwidth limitations.

LM4880 MDA MWA

DUAL 250 MW AUDIO POWER AMPLIFIER WITH SHUTDOWN MODE

Figure 35. Die Layout (B - Step)

Table 1. Die/Wafer Characteristics

Fabrication Attributes General Die Information

Physical Die Identification LM4880B Bond Pad Opening Size (min) 86µm x 86µm

Die Step B Bond Pad Metalization ALUMINUM

Physical Attributes Passivation NITRIDE

Wafer Diameter 150mm Back Side Metal Bare Back

Dise Size (Drawn) 952µm x 1283µm Back Side Connection GND

37mils x 51mils

Thickness 254µm Nominal

Min Pitch 117µm Nominal

Special Assembly Requirements:

Note: Actual die size is rounded to the nearest micron.

Die Bond Pad Coordinate Locations (B - Step)

(Referenced to die center, coordinates in µm) NC = No Connection

X/Y COORDINATES PAD SIZE

SIGNAL NAME PAD# NUMBER X Y X Y

BYPASS 1 -322 523 86 x 86

GND 2 -359 259 86 x 188

NC 3 -359 5 86 x 86

GND 4 -359 -259 86 x 188

SHUTDOWN 5 -323 -523 86 x 86

INPUT B 6 -109 -523 86 x 86

OUTPUT B 7 8 -523 86 x 86

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VDD 8 358 -78 86 x 188

GND 9 358 141 86 x 188

OUTPUT A 10 359 406 86 x 86

INPUT A 11 323 523 86 x 86

NC 12 8 523 86 x 86

NC 13 -109 523 86 x 86

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REVISION HISTORY

Changes from Revision B (May 2013) to Revision C Page

• Changed layout of National Data Sheet to TI format .......................................................................................................... 14

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PACKAGE OPTION ADDENDUM

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Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead/Ball Finish

(6)

MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

Samples

LM4880M ACTIVE SOIC D 8 95 TBD Call TI Call TI -40 to 85 LM

4880M

LM4880M/NOPB ACTIVE SOIC D 8 95 Green (RoHS

& no Sb/Br) SN Level-1-260C-UNLIM -40 to 85 LM

4880M

LM4880MX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS

& no Sb/Br) SN Level-1-260C-UNLIM -40 to 85 LM

4880M

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance

do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may

reference these types of products as "Pb-Free".

RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.

Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based

flame retardants must also meet the <=1000ppm threshold requirement.

(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish

value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

PACKAGE OPTION ADDENDUM

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Addendum-Page 2

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

(mm) B0

(mm) K0

(mm) P1

(mm) W

(mm) Pin1

Quadrant

LM4880MX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1

PACKAGE MATERIALS INFORMATION

www.ti.com 8-May-2013

Pack Materials-Page 1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

LM4880MX/NOPB SOIC D 8 2500 367.0 367.0 35.0

PACKAGE MATERIALS INFORMATION

www.ti.com 8-May-2013

Pack Materials-Page 2

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PACKAGE OUTLINE

.228-.244 TYP

[5.80-6.19]

.069 MAX

[1.75]

6X .050

[1.27]

8X .012-.020

[0.31-0.51]

.150

[3.81]

.005-.010 TYP

[0.13-0.25]

0 - 8 .004-.010

[0.11-0.25]

.010

[0.25]

.016-.050

[0.41-1.27]

4X (0 -15 )

.189-.197

[4.81-5.00]

NOTE 3

B .150-.157

[3.81-3.98]

NOTE 4

4X (0 -15 )

(.041)

[1.04]

SOIC - 1.75 mm max heightD0008A

SMALL OUTLINE INTEGRATED CIRCUIT

4214825/C 02/2019

NOTES:

1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.

Dimensioning and tolerancing per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not

exceed .006 [0.15] per side.

4. This dimension does not include interlead flash.

5. Reference JEDEC registration MS-012, variation AA.

.010 [0.25] C A B

PIN 1 ID AREA

SEATING PLANE

.004 [0.1] C

SEE DETAIL A

DETAIL A

TYPICAL

SCALE 2.800

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EXAMPLE BOARD LAYOUT

.0028 MAX

[0.07]

ALL AROUND

.0028 MIN

[0.07]

ALL AROUND

(.213)

[5.4]

6X (.050 )

[1.27]

8X (.061 )

[1.55]

8X (.024)

[0.6]

(R.002 ) TYP

[0.05]

SOIC - 1.75 mm max heightD0008A

SMALL OUTLINE INTEGRATED CIRCUIT

4214825/C 02/2019

NOTES: (continued)

6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

METAL SOLDER MASK

OPENING

NON SOLDER MASK

DEFINED

SOLDER MASK DETAILS

EXPOSED

METAL

OPENING

SOLDER MASK METAL UNDER

SOLDER MASK

DEFINED

EXPOSED

METAL

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE:8X

SYMM

SEE

DETAILS

SYMM

www.ti.com

EXAMPLE STENCIL DESIGN

8X (.061 )

[1.55]

8X (.024)

[0.6]

6X (.050 )

[1.27] (.213)

[5.4]

(R.002 ) TYP

[0.05]

SOIC - 1.75 mm max heightD0008A

SMALL OUTLINE INTEGRATED CIRCUIT

4214825/C 02/2019

NOTES: (continued)

8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

9. Board assembly site may have different recommendations for stencil design.

SOLDER PASTE EXAMPLE

BASED ON .005 INCH [0.125 MM] THICK STENCIL

SCALE:8X

SYMM

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