SC2608BSETRT - Semtech Corp.

POWER MANAGEMENT

Draft

1www.semtech.com

SC2608B

Simple, Synchronous

Voltage Mode PWM Controller

Features

Revision 4: Jan. 2007

The SC2608B is a versatile voltage-mode PWM control-

ler designed for use in step down DC/DC power supply

applications. A simple, fixed frequency, highly efficient

buck regulator can be implemented using the SC2608B

with minimal external components. The input voltage

range is from +5V to +12V. Internal level shift and drive

circuitry eliminates the need for an expensive P-channel,

high-side MOSFET. The small device footprint allows for

compact circuit design.

SC2608B features include temperature compensated

voltage reference, triangle wave oscillator, current limit

comparator, and an externally compensated error ampli-

fier. Current limit is implemented by sensing the voltage

drop across the bottom MOSFET RDS(ON).

The SC2608B operates at a fixed frequency of 250kHz

providing an optimum compromise between efficiency ,

external component size, and cost.

SC2608B has a thermal protection circuit, which is

activated if the junction temperature exceeds 150 OC.

+5V or +12V input voltage

250kHz operation

High efficiency (>90%)

1.25% Voltage feedback accuracy over tempera-

ture

Hiccup mode over current protection

1.2A output drive

RDS(ON) Current sensing for protection

Industrial temperature range

Available in SO-8 and SO-8 EDP package

Integrated boot strap diode

Termination supplies

Low cost microprocessor supplies

Peripheral card supplies

Industrial power supplies

High density DC/DC conversion

Figure 1

Description

Applications

Typical Application Circuit

Thermal Shut down

Fully WEEE and RoHS Compliant

POWER MANAGEMENT

SC2608B

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Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified

in the Electrical Characteristics section is not implied.

Note 1: Under pulsing condition, the peak negative voltage can not be lower than -3.6V with less than 20nS from 50% to 50%.

Absolute Maximum Ratings

Electrical Characteristics

Unless specified: VCC = 12V, VBST - VPhase = 12 V, VOUT = 3.3V, TJ = TA = 25oC.

Note 2: Under pulsing condition, the peak negative voltage can not be lower than -5V with less than 20nS from 50% to 50%.

POWER MANAGEMENT

SC2608B

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Electrical Characteristics

Unless specified: VCC = 12V, VBST - VPhase = 12 V, VOUT = 3.3V, TJ = TA = 25oC.

POWER MANAGEMENT

SC2608B

Top View

(8-Pin SO-8)

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Notes:

(1) Only available in tape and reel packaging. A reel con-

tains 2500 devices.

(2) This device is fully WEEE and RoHS Compliant

Pin Configuration Ordering information

Pin Descriptions

(8-Pin SOIC-8L EDP)

Top View

VCC

SENSE

COMP/SS

PHASE

GND

BST

VCC

SENSE

COMP/SS

PHASE

GND

BST

VCC

SENSE

COMP/SS

PHASE

GND

BST

VCC

SENSE

COMP/SS

PHASE

GND

BST

POWER MANAGEMENT

SC2608B

Figure 2

Figure 3

Block Diagram

Gate Drive Timing Diagram

BST

E/A

PHASE

Vcc

OSC

VCC

LEVEL

SHIFT

GND

OCP &

UVLO

NON-OVERLAP

TIMING

VCC

COMP/SS

REF

0.8V

PWM

OCP PHASE

SENSE

BST

E/A

PHASE

Vcc

OSC

VCC

LEVEL

SHIFT

GND

OCP &

UVLO

NON-OVERLAP

TIMING

VCC

COMP/SS

REF

0.8V

PWM

OCP PHASE

SENSE

POWER MANAGEMENT

SC2608B

Synchronous Buck ConverterSynchronous Buck Converter

Synchronous Buck Converter

The output voltage of the synchronous converter is set

and controlled by the output of the error amplifier. The

inverting input of the error amplifier receives its voltage

from the SENSE pin. The non-inverting input of the error

amplifier is connected to an internal 0.8V reference. The

error amplifier output is connected to the compensation

pin. The error amplifier generates a current proportional

to (0.8V-Vsense), which is the COMP pin output current

(Transconductance ~ 7mS). The voltage on the COMP

pin is the integral of the error amplifier current. The COMP

voltage is the non-inverting input of the PWM compara-

tor and controls the duty cycle of the MOSFET drivers.

The compensation network controls the stability and tran-

sient response of the regulator. The larger capacitor,

the slower COMP voltage changes, and slower the duty

cycle changes.

The non-inverting input voltage of the PWM comparator

is the triangular ramp signal generated from the oscilla-

tor. The peak-to-peak voltage of the ramp is 1V, this is a

parameter used in control loop calculation. When the

oscillator ramp signal rises above the COMP voltage, the

comparator output goes high and the PWM latch is re-

set. This pulls DH low, turning off the high-side MOSFET.

After a short delay (dead time), DL is pulled high, turning

on the low-side MOSFET. The oscillator also produces a

set pulse for the PWM latch to turn off the low-side

MOSFET, After a delay time, DH is pulled high to turn on

the high-side MOSFET. The delay time is determined by a

monostable on the chip.

The triangle wave minimum is about 0.8V, and the maxi-

mum is about 1.8V. Thus, if Vcomp = 0.7V, high side duty

cycle is the minimum (~0%) , but if Vcomp is 1.8V, duty

cycle is at maximum ( ~90%).The internal oscillator uses an

on-chip capacitor and trimmed precision current sources

to set the oscillation frequency to 250kHz. Figure 1 shows

a 2.5V output converter. If the Vout <2.5V, then the SENSE

voltage < 0.8V. In this case the error amplifier will be sourc-

ing current into the COMP pin so that COMP voltage and

duty cycle will gradually increase.If Vout > 2.5V, the error

amplifier will sink current and reduce the COMP voltage, so

that duty cycle will decrease.The circuit will be in steady

state when Vout =2.5V , Vsense = 0.8V, Icomp = 0. The

COMP voltage and duty cycle depend on Vin.

Under Vnder V

nder Vnder V

nder Voltage Lockoltage Lock

oltage Lockoltage Lock

oltage Lockoutout

outout

out

The under voltage lockout circuit of the SC2608B as-

sures that both high-side and low-side MOSFET driver

outputs remain in the off state whenever the supply volt-

age drops below the set threshold. Lockout occurs if VCC

falls below 3.6V typ.

Soft StartSoft Start

Soft Start

The SC2608B provides a soft start function to prevent large

inrush currents upon power-up or hiccup retry. If both COMP

and SENSE pins are low (<300mV), the device enters soft

start mode, and the compensation capacitor is slowly

charged by an internal 4uA current source. When the COMP

pin reaches 300mV, the low side FET is switched on in order

to refresh the bootstrap capacitor, and begin PWM from a

known state. As the COMP pin rises above 800mV, PWM

begins at minimum duty cycle.

COMP continues to charge, slowly sweeping the device

through the duty cycle range until FB reaches the regulation

point of 800mV. Once FB reaches the regulation point, the

soft start current is switched off, and the strong error amp

is enabled, providing a glitch-free entrance into closed loop

operation. The overcurrent comparator is still active during

soft start mode, and will override soft start in the event

that an overcurrent is detected, such as startup into a

dead short.

RDS(ON)DS(ON)

DS(ON)DS(ON)

DS(ON) Current Limiting Current Limiting

Current Limiting Current Limiting

Current Limiting

In case of a short circuit or overload, the low-side (LS) FET

will conduct large currents. To protect the regulator in this

situation, the controller will shut down the regulator and

begin a soft start cycle later. While the LS driver is on,the

Phase voltage is compared to the OCP trip voltage. If the

phase voltage is lower than OCP trip voltage, an over cur-

rent condition is detected. The low-side Rdson sense is imple-

mented at end of each LS-FET turn-on duration. The mini-

mum turn-on time of the LS-FET is set to be 400nS. This

will ensure the sampled signal is noise free by giving enough

time for the switching noise to die down.

Theory of Operation

OCP HiccupOCP Hiccup

OCP Hiccup

In the event that an overcurrent is detected, the SC2608B

latches the fault and begins a hiccup cycle. Switching is

immediately stopped, and the drivers are set to a tristate

condition (Both DH and DL are low). COMP is slowly

discharged to 300mV with an internal 4uA current source,

providing a long cooldown time to keep power dissipation

low in the event of a continuous dead short. Once COMP

and SENSE both fall below the 300mV threshold, the part

re-enables the 4uA soft start current , and the device begins

a normal startup cycle again.

POWER MANAGEMENT

SC2608B

Applications Information (Cont.)

The control model of SC2608B is depicted in Fig. 4.

This model can also be used to generate loop gain Bode

plots. The bandgap reference is 0.8V and trimmed to

+/-1% accuracy. The desired output voltage can be

achieved by setting the resistive divider network, R1 and

R2. The error amplifier is transconductance type with fixed

gain of:

The compensation network includes a resistor and a ca-

pacitor in series, which terminates the output of the

error amplifier to the ground.

The task here is to properly choose the compensation

network for a nicely shaped loop-gain Bode plot. The

following design procedures are recommended to accom-

plish the goal:

(1) Calculate the corner frequency of the output filter:

(2) Calculate the ESR zero frequency of the output filter

capacitor:

(3) Check that the ESR zero frequency is not too high.

If this condition is not met, the compensation structure

may not provide loop stability. The solution is to add

some electrolytic capacitors to the output capacitor bank

to correct the output filter corner frequency and the ESR

zero frequency. In some cases, the filter inductance may

also need to be adjusted to shift the filter corner fre-

quency. It is not recommended to use only high frequency

multi-layer ceramic capacitors for output filter.

(4) Choose the loop gain cross over frequency (0 dB fre-

quency). It is recommended that the crossover frequency

is always less than one fifth of the switching frequency :

If the transient specification is not stringent, it is better

to choose a crossover frequency that is less than one

tenth of the switching frequency for good noise immu-

nity. The resistor in the compensation network can then

be calculated as:

when

Fig. 4. SC2608B small signal model.

VIN

G_PWM

RcR

E/A

VBG

0.8V

LR1

Ci R2Co

() ()

⎟

⎠

⎞

⎜

⎝

⎛++

⎟

⎠

⎞

⎜

⎝

⎛++

••

⎟

⎠

⎞

⎜

⎝

⎛

•••=

inpwmm

LCs

CRs

CsR

VGGsT

()

csC

sH +

oLC

esr CR

esr F

SWOVERX FF •= 5

⎟

⎠

⎞

⎜

⎝

⎛

•

⎟

⎠

⎞

⎜

⎝

⎛

•

⎟

⎠

⎞

⎜

⎝

⎛

•

••

esr

OVERX

esr

minpwm V

GVG

FoFesr

<Fsw

Gm007.0

The total control loop-gain can then be derived as

follows:

where the ramp amplitude is fixed at 1 volts.

ramp

pwm V

Compensation Network DesignCompensation Network Design

Compensation Network Design

A note to the user is needed: The device cannot restart

until both COMP and SENSE are low, to prevent start up

into a charged output. In the event of an overcurrent

condition, the output is quickly discharged by the load,

therefore bringing SENSE below the 300mV threshold. If

the COMP pin is pulled low by an external device (such as

an open-drain logic gate used for system shutdown), and

SENSE is high(above 300mV) while COMP is low, then the

SC2608B turns on the low side FET to discharge the output

before changing to shutdown or soft-start mode. The low

side FET turns off when SENSE drops below 300mV and

the converter remains in the tri-state condition until COMP

is released. Although this shutdown technique can be used

successfully on the SC2608B, the system designer using

COMP for external shutdown will need to consider the load

on the low side FET when discharging the output capacitor

bank. For large capacitor bank, this peak current can be

quite large as it is limited only by the RDS(ON) of the low side

FET. Fortunately the duration of this event is quite short,

and has been shown in the lab to have no detrimental effect

on the performance of the external FETs.

Disabling the output by pulling down COMP/SS pin is only

recommended when the output capacitor bank is not too

large.

The PWM gain is inversion of the ramp amplitude, and

this gain is given by:

POWER MANAGEMENT

SC2608B

(6) The final step is to generate the Bode plot by using

the simulation model in Fig. 4 or using the equations pro-

vided here with Mathcad. The phase margin can then be

checked using the Bode plot.

Applications Information (Cont.)

(5) The compensation capacitor is determined by choos-

ing the compensator zero to be about one fifth of the

output filter corner frequency:

SC2608B soft start time is determined by the

compensation capacitor. Capacitance can be adjusted

to satisfy the soft start requirement.

An example is given below to demonstrate the proce-

dure introduced above.

set to

for suitable soft start time

Fig. 5. Bode plot of the loop

10 100 1.1031.1041.1051.106

100 Loop Gain Mag (dB)

mag i()

10 100 1.1031.1041.1051.106

180

135

0Loop Gain Phase (Degree)

phase i()

set

zero F

zero

C•

Vin=12V

Vo=2.5V

Fsw=250KHz

Io=15A

Ci=1nF

Co=4400uF

Rc=0.009

Ω

Vramp=1V

Gm=0.007A/V

Vbg=0.8V

C=327.95nF

Rc=1.33KΩRc=1.5KΩ

C=100nFset to

L=2.2uH

POWER MANAGEMENT

SC2608B

Application Information

Bill of MaterialsBill of Materials

Bill of Materials

metIytitnauQecnerefeRtraPredneV

111CV61/Fu7.4oegaY

22 3C,2CV61/Fu0051JFcinosanaP

314CV05/Fp001oegaY

42 31C,5CV61/Fu1oegaY

516CV52/F

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62 8C,7CV3.6/Fu0022JFcinosanaP

73 11C,01C,9CV3.6/Fu7.4oegaY

8121CFn2.2oegaY

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1112QAL

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2112RK1oegaY

312 6R,3R%1,K1oegaY

412 5R,4R0R1oegaY

5111UB8062CSHCETMES

T T

ypical Application Schematicypical Application Schematic

ypical Application Schematic

POWER MANAGEMENT

SC2608B

Application Information

T T

ypical DDR VDDQ Application Schematicypical DDR VDDQ Application Schematic

ypical DDR VDDQ Application Schematic

Bill of MaterialsBill of Materials

Bill of Materials

metIytitnauQecnerefeRtraPredneV

14 31C,21C,11C,1CV3.6/Fu7.4oegaY

23 4C,3C,2CV3.6/Fu0051JFcinosanaP

315CV05/Fp001oegaY

42 51C,6

CV61/Fu1oegaY

517CV52/Fn86oegaY

63 01C,9C,8CV3.6/Fu0081JFcinosanaP

71 41CV05/Fn1oegaY

811DH45TABoegaY

912D8414N1dlihcriaF

0111LA04/Hu2

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1111QAL30N90DPInoenifnI

2112QAL30N90DPInoenifnI

3114R%5,2R2oegaY

4112R%5,K1oegaY

5113R%1,K72.1oegaY

6115R%1,K1oegaY

7111UB8062

CSHCETMES

BST 1

DH 2

GND 3

DL 4

VCC

5SENSE

6COMP/SS

7Phase

8U1

SC2608B

1500uF/16V

4.7uF/16V

C11

4.7uF/6.3V

C12

4.7uF/6.3V

C13

4.7uF/6.3V

1800uF/6.3V

IPB09N03LA

1.2uH/40A

1uF/16V R4

2R2

C14

1N4148

+12V

BAT54H C15

1uF/16V

5VDual

1.27k

Sense Sense

C7 68nF

100pF

1.8VOUT/24A

1500uF/16V

C10

1800uF/6.3V

POWER MANAGEMENT

SC2608B

SEE DETAIL DETAIL A

.0 50 BSC

.2 36 BSC

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GAGE

PLANE

3. DIM ENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS

OR GATE BURRS.

-B-

CO NTRO LLING DIM ENSIONS ARE IN M ILLIMETERS (ANGLES IN DEG REES).

DAT U M S AND TO BE DET ERM INED A T DAT U M PL ANE

NOTES:

2. -A- -H-

SIDE VIEW

PLANE

bbb

aaa

ccc

DIM MIN

MILLIMETERS

NOM

DIMENSIONS

INCHES

MIN MAX MAXNOM

Outline Drawing - SO-8

Land Pattern - SO-8

(.205) (5.20)

.118 1.27.050 0.60.024 2.20.087 7.40.291

INCHES

DIMENSIONS

DIM

MILLIMETERS

THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY.

CO NSULT YO UR MANU FACTURIN G GRO UP TO ENSURE YOUR

CO MPANY'S M ANUFACTURING G UIDELINES ARE M ET.

NOTES:

REFERENCE IPC-SM-782A, RLP NO. 300A.

POWER MANAGEMENT

SC2608B

Outline Drawing - Power SOIC-8L (EDP)

Land Pattern - Power SOIC-8L (EDP)

THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY.

CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR

COMPANY'S MANUFACTURING GUIDELINES ARE MET.

NOTES:

REFERENCE IPC-SM-782A, RLP NO. 300A.

INCHES

DIMENSIONS

DIM

MILLIMETERS

E.201 5.10

FAILURE TO DO SO MAY COMPROMISE THE THERMAL AND/OR

FUNCTIONAL PERFORMANCE OF THE DEVICE.

SHALL BE CONNECTED TO A SYSTEM GROUND PLANE.

THERMAL VIAS IN THE LAND PATTERN OF THE EXPOSED PAD

SOLDER MAS K

THERMAL VIA

?0.36mm

D.098 2.49

F.096 2.44

3.00.118 1.27.050 0.60.024 2.20.087 7.40.291

SEE DETAIL DETAIL

.050 BSC

.236 BSC

.010

.150

.189 .154

.193

.012 -

0.25

1.27 BSC

6.00 BSC

3.90

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0

.016

.007

.049

.000

.053

80

0.20

0.10

-8

0.40

0.17

1.25

0.00

.041

.010

.069

.065

.005 1.35

(1.05)

0.72

1.04

0.25

-1.75

1.65

0.13

0.25

.010 .020 0.50

(L1) 01

0.25

GAGE

PLANE

3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS

OR GATE BURRS.

-B-

CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).

DATUMS AND TO BE DETERMINED AT DATUM PLANE

NOTES:

2. -A- -H-

SIDE VIEW

PLANE

EXPOSED PAD

bbb

aaa

ccc

DIM MIN

MILLIMETERS

NOM

DIMENSIONS

INCHES

MIN MAX MAXNOM

F.086 .090 .094 2.19 2.29 2.39

4. REFERENCE JEDEC STD MS-012, VARIATION BA.

Contact Information Semtech Corporation

Power Management Products Division

200 Flynn R oad, Camarillo, CA 93012

Phone: (805)498-2 11 1 F AX (805)498-3804