HT12E-20SOP - HOLTEK - Datasheet.Live

HT12A/HT12E

212 Series of Encoders

Selection Table

Function Address

No.

Address/

Data No. Data No. Oscillator Trigger Carrier

Output

Negative

Polarity Package

Part No.

HT12A 8 0 4 455kHz

resonator D8~D11 38kHz No 18DIP, 20SOP

HT12E 8 4 0 RC

oscillator TE No No 18DIP, 20SOP

Note: Address/Data represents pins that can be either address or data according to the application requirement.

Rev. 1.10 1 January 24, 2003

General Description

The 212 encoders are a series of CMOS LSIs for remote

control system applications. They are capable of encod-

ing information which consists of N address bits and

12-N data bits. Each address/data input can be set to

one of the two logic states. The programmed ad-

dresses/data are transmitted together with the header

bits via an RF or an infrared transmission medium upon

receipt of a trigger signal. The capability to select a TE

trigger on the HT12E or a DATA trigger on the HT12A

further enhances the application flexibility of the 212 se-

ries of encoders. The HT12A additionally provides a

38kHz carrier for infrared systems.

Features

·Operating voltage

-2.4V~5V for the HT12A

-2.4V~12V for the HT12E

·Low power and high noise immunity CMOS

technology

·Low standby current: 0.1mA (typ.) at VDD=5V

·HT12A with a 38kHz carrier for infrared transmission

medium

·Minimum transmission word

-Four words for the HT12E

-One word for the HT12A

·Built-in oscillator needs only 5% resistor

·Data code has positive polarity

·Minimal external components

·Pair with Holtek¢s2

12 series of decoders

·18-pin DIP, 20-pin SOP package

Applications

·Burglar alarm system

·Smoke and fire alarm system

·Garage door controllers

·Car door controllers

·Car alarm system

·Security system

·Cordless telephones

·Other remote control systems

Block Diagram

TE Trigger

HT12E

DATA Trigger

HT12A

Note: The address data pins are available in various combinations (refer to the address/data table).

Pin Assignment

HT12A/HT12E

Rev. 1.10 2 January 24, 2003

O s c i l l a t o r ¸3 D i v i d e r

O S C 1O S C 2

V D D V S S

1 2 T r a n s m i s s i o n

G a t e C i r c u i t

¸ 1 2 C o u n t e r &

1 o f 1 2 D e c o d e r

B i n a r y D e t e c t o r

T E

A 0

A 7

D O U T

D a t a S e l e c t

& B u f f e r

S y n c .

C i r c u i t

A D 8 A D 1 1

O s c i l l a t o r ¸5 7 6 D i v i d e r

V D D V S S

1 2 T r a n s m i s s i o n

G a t e C i r c u i t

¸ 1 2 C o u n t e r &

1 o f 1 2 D e c o d e r

B i n a r y D e t e c t o r

D O U T

D a t a S e l e c t

& B u f f e r

S y n c .

C i r c u i t

L / M B

X 2 X 1

A 0

A 7

D 8 D 1 1

8 - A d d r e s s

4 - D a t a

A 0

A 1

A 2

A 3

A 4

A 5

A 6

A 7

V S S

V D D

D O U T

X 1

X 2

L / M

D 1 1

D 1 0

D 9

D 8

1 8

1 7

1 6

1 5

1 4

1 3

1 2

1 1

1 0

8 - A d d r e s s

4 - D a t a

1 0

2 0

1 9

1 8

1 7

1 6

1 5

1 4

1 3

1 2

1 1

N C

V D D

D O U T

X 1

X 2

L / M

D 1 1

D 1 0

D 9

D 8

N C

A 0

A 1

A 2

A 3

A 4

A 5

A 6

A 7

V S S

H T 1 2 A

1 8 D I P - A

H T 1 2 A

2 0 S O P - A

8 - A d d r e s s

4 - A d d r e s s / D a t a

A 0

A 1

A 2

A 3

A 4

A 5

A 6

A 7

V S S

V D D

D O U T

O S C 1

O S C 2

T E

A D 1 1

A D 1 0

A D 9

A D 8

1 8

1 7

1 6

1 5

1 4

1 3

1 2

1 1

1 0

H T 1 2 E

1 8 D I P - A

8 - A d d r e s s

4 - A d d r e s s / D a t a

1 0

2 0

1 9

1 8

1 7

1 6

1 5

1 4

1 3

1 2

1 1

N C

V D D

D O U T

O S C 1

O S C 2

T E

A D 1 1

A D 1 0

A D 9

A D 8

N C

A 0

A 1

A 2

A 3

A 4

A 5

A 6

A 7

V S S

H T 1 2 E

2 0 S O P - A

Pin Description

Pin Name I/O Internal

Connection Description

A0~A7 I CMOS IN Pull-high

(HT12A)

Input pins for address A0~A7 setting

These pins can be externally set to VSS or left open

NMOS TRANSMISSION

GATE PROTECTION

DIODE (HT12E)

AD8~AD11 I

NMOS TRANSMISSION

GATE PROTECTION

DIODE (HT12E)

Input pins for address/data AD8~AD11 setting

These pins can be externally set to VSS or left open

D8~D11 I CMOS IN Pull-high

Input pins for data D8~D11 setting and transmission enable, active

low

These pins should be externally set to VSS or left open (see Note)

DOUT O CMOS OUT Encoder data serial transmission output

L/M I CMOS IN Pull-high

Latch/Momentary transmission format selection pin:

Latch: Floating or VDD

Momentary: VSS

TE I CMOS IN Pull-high Transmission enable, active low (see Note)

OSC1 I OSCILLATOR 1 Oscillator input pin

OSC2 O OSCILLATOR 1 Oscillator output pin

X1 I OSCILLATOR 2 455kHz resonator oscillator input

X2 O OSCILLATOR 2 455kHz resonator oscillator output

VSS I ¾Negative power supply, ground

VDD I ¾Positive power supply

Note: D8~D11 are all data input and transmission enable pins of the HT12A.

TE is a transmission enable pin of the HT12E.

Approximate Internal Connections

HT12A/HT12E

Rev. 1.10 3 January 24, 2003

N M O S

T R A N S M I S S I O N

G A T E

C M O S I N

P u l l - h i g h C M O S O U T O S C I L L A T O R 1

O S C 2

O S C 1

O S C I L L A T O R 2

X 1 X 2

E N

N M O S T R A N S M I S S I O N G A T E

P R O T E C T I O N D I O D E

VD D

Absolute Maximum Ratings

Supply Voltage (HT12A) ............VSS-0.3V to VSS+5.5V Supply Voltage (HT12E) ...........................-0.3V to 13V

Input Voltage ................................VSS-0.3 to VDD+0.3V Storage Temperature ............................-50°Cto125°C

Operating Temperature...........................-20°Cto75°C

Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum Ratings²may

cause substantial damage to the device. Functional operation of this device at other conditions beyond those

listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliabil-

ity.

Electrical Characteristics

HT12A Ta=25°C

Symbol Parameter Test Conditions Min. Typ. Max. Unit

VDD Conditions

VDD Operating Voltage ¾¾ 2.4 3 5 V

ISTB Standby Current

Oscillator stops

¾0.1 1 mA

5V ¾0.1 1 mA

IDD Operating Current

3V No load

fOSC=455kHz

¾200 400 mA

5V ¾400 800 mA

IDOUT Output Drive Current 5V

VOH=0.9VDD (Source) -1-1.6 ¾mA

VOL=0.1VDD (Sink) 2 3.2 ¾mA

VIH ²H²Input Voltage ¾¾

0.8VDD ¾VDD V

VIL ²L²Input Voltage ¾¾ 0¾0.2VDD V

RDATA

D8~D11 Pull-high

Resistance 5V VDATA=0V ¾150 300 kW

HT12E Ta=25°C

Symbol Parameter Test Conditions Min. Typ. Max. Unit

VDD Conditions

VDD Operating Voltage ¾¾ 2.4 5 12 V

ISTB Standby Current

Oscillator stops

¾0.1 1 mA

12V ¾24

IDD Operating Current

3V No load, fOSC=3kHz ¾40 80 mA

12V ¾150 300 mA

IDOUT Output Drive Current 5V

VOH=0.9VDD (Source) -1-1.6 ¾mA

VOL=0.1VDD (Sink) 1 1.6 ¾mA

VIH ²H²Input Voltage ¾¾

0.8VDD ¾VDD V

VIL ²L²Input Voltage ¾¾ 0¾0.2VDD V

fOSC Oscillator Frequency 5V ROSC=1.1MW¾

3¾kHz

RTE TE Pull-high Resistance 5V VTE=0V ¾1.5 3 MW

HT12A/HT12E

Rev. 1.10 4 January 24, 2003

Functional Description

Operation

The 212 series of encoders begin a 4-word transmission cycle upon receipt of a transmission enable (TE for the HT12E

or D8~D11 for the HT12A, active low). This cycle will repeat itself as long as the transmission enable (TE or D8~D11) is

held low. Once the transmission enable returns high the encoder output completes its final cycle and then stops as

shown below.

Information Word

If L/M=1 the device is in the latch mode (for use with the latch type of data decoders). When the transmission enable is re-

moved during a transmission, the DOUT pin outputs a complete word and then stops. On the other hand, if L/M=0 the de-

vice is in the momentary mode (for use with the momentary type of data decoders). When the transmission enable is

removed during a transmission, the DOUT outputs a complete word and then adds 7 words all with the ²1²data code.

An information word consists of 4 periods as illustrated below.

HT12A/HT12E

Rev. 1.10 5 January 24, 2003

4 w o r d s 4 w o r d s

Encoder

D O U T

T r a n s m i t t e d

C o n t i n u o u s l y

< 1 w o r d

T E

Transmission timing for the HT12E

Encoder

D O U T

T r a n s m i t t e d

C o n t i n u o u s l y

< 1 w o r d

D 8 ~ D 1 1

K e y - i n

1 w o r d

w i t h 3 8 k H z c a r r i e r

1 w o r d

Transmission timing for the HT12A (L/M=Floating or VDD)

Encoder

D O U T

T r a n s m i t t e d

C o n t i n u o u s l y

D 8 ~ D 1 1

K e y - i n

1 w o r d

< 1 w o r d

7 w o r d s

1 w o r d

7 w o r d s

( a l l d a t a = 1 )

Transmission timing for the HT12A (L/M=VSS)

1 / 3 b i t s y n c . p e r i o d

p i l o t p e r i o d ( 1 2 b i t s )

a d d r e s s c o d e p e r i o d period

d a t a c o d e

Composition of information

Address/Data Waveform

Each programmable address/data pin can be externally set to one of the following two logic states as shown below.

The address/data bits of the HT12A are transmitted with a 38kHz carrier for infrared remote controller flexibility.

Address/Data Programming (Preset)

The status of each address/data pin can be individually pre-set to logic ²high²or ²low². If a transmission-enable signal

is applied, the encoder scans and transmits the status of the 12 bits of address/data serially in the order A0 to AD11 for

the HT12E encoder and A0 to D11 for the HT12A encoder.

During information transmission these bits are transmitted with a preceding synchronization bit. If the trigger signal is

not applied, the chip enters the standby mode and consumes a reduced current of less than 1mA for a supply voltage of

5V.

Usual applications preset the address pins with individual security codes using DIP switches or PCB wiring, while the

data is selected by push buttons or electronic switches.

The following figure shows an application using the HT12E:

HT12A/HT12E

Rev. 1.10 6 January 24, 2003

" O n e "

" Z e r o "

O S C

A d d r e s s /

D a t a B i t

Address/Data bit waveform for the HT12E

" O n e "

" Z e r o "

fO S C

D a t a B i t

" O n e "

" Z e r o "

A d d r e s s B i t

3 8 k H z

c a r r i e r

Address/Data bit waveform for the HT12A

T E

V D D A 0 A 1 A 2 A 3 A 4 A 5 A 6 A 7 V S S A D 8 A D 9 A D 1 0 A D 1 1

O S C 1 O S C 2

D O U T T r a n s m i s s i o n

m e d i u m

VD D

V S S

The transmitted information is as shown:

Pilot

Sync.

AD8

AD9

AD10

AD11

Address/Data Sequence

The following provides the address/data sequence table for various models of the 212 series of encoders.

Part No.

Address/Data Bits

01234567891011

HT12A A0 A1 A2 A3 A4 A5 A6 A7 D8 D9 D10 D11

HT12E A0 A1 A2 A3 A4 A5 A6 A7 AD8 AD9 AD10 AD11

Transmission Enable

For the HT12E encoders, transmission is enabled by applying a low signal to the TE pin. For the HT12A encoders,

transmission is enabled by applying a low signal to one of the data pins D8~D11.

Two Erroneous HT12E Application Circuits

The HT12E must follow closely the application circuits provided by Holtek (see the ²Application circuits²).

·Error: AD8~AD11 pins input voltage > VDD+0.3V

·Error: The IC¢s power source is activated by pins AD8~AD11

HT12A/HT12E

Rev. 1.10 7 January 24, 2003

H T 1 2 E

O S C 2

O S C 1

T E

VSS

V D D

A D 1 1

A D 1 0

A D 9

A D 8

12V

H T 1 2 E

O S C 2

O S C 1

V S S

T E

V D D

12V

A D 1 1

A D 1 0

A D 9

A D 8

Flowchart

·HT12A ·HT12E

Note: D8~D11 are transmission enables of the HT12A.

TE is the transmission enable of the HT12E.

HT12A/HT12E

Rev. 1.10 8 January 24, 2003

S t a n d b y m o d e

D ata enable?

N o

D a t a w i t h c a r r i e r

s e r i a l o u t p u t

D a t a s t i l l e n a b l e d ?

L / M B = G N D ?

S e n d t h e

l a s t c o d e

N o

Y e s

Send ²1² 7 t i m e s f o r

a l l o f t h e d a t a c o d e s

P o w e r o n

S t a n d b y m o d e

T r a n s m i s s i o n

e n a b l e d ?

N o

Y e s

4 d a t a w o r d s

t r a n s m i t t e d

T r a n s m i s s i o n

s t i l l e n a b l e d

4 d a t a w o r d s

t r a n s m i t t e d

c o n t i n u o u s l y

P o w e r o n

Oscillator Frequency vs. Supply Voltage

The recommended oscillator frequency is fOSCD (decoder) @50 fOSCE (HT12E encoder)

3fOSCE (HT12A encoder)

Application Circuits

HT12A/HT12E

Rev. 1.10 9 January 24, 2003

2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3

1 . 0 0

2 . 0 0

( 3 k H z ) 3 . 0 0

4 . 0 0

5 . 0 0

6 . 0 0

7 . 0 0

D D

( V D C )

O S C

( S c a l e )

2 . 0 M

1 . 5 M

1 . 2 M

1 . 0 M

910k

820k

750k

680k

620k

560k

510k

470k

O S C

(

)

455K

H T 1 2 A

1 0 M W

100pF

8 0 5 0

100

A 0

A 4

A 5

A 6

A 7

VSS

A 1

A 2

A 3

V D D

D O U T

X 1

X 2

L / M B

D 1 1

D 1 0

D 9

D 8

1 8

1 7

1 6

1 5

1 4

1 3

1 2

1 1

1 0

1 0 k

D D

T r a n s m i t t e r C i r c u i t

H T 1 2 E

A 0

A 1

A 2

A 3

A 4

A 5

A 6

A 7

V S S

V D D

D O U T

O S C 1

O S C 2

T E

A D 1 1

A D 1 0

A D 9

A D 8

1 8

1 7

1 6

1 5

1 4

1 3

1 2

1 1

1 0

O S C

D D

Package Information

18-pin DIP (300mil) Outline Dimensions

Symbol Dimensions in mil

Min. Nom. Max.

A 895 ¾915

B 240 ¾260

C 125 ¾135

D 125 ¾145

E16

¾20

F50

¾70

G¾100 ¾

H 295 ¾315

I 335 ¾375

a0°¾15°

HT12A/HT12E

Rev. 1.10 10 January 24, 2003

1 8

1 0

20-pin SOP (300mil) Outline Dimensions

Symbol Dimensions in mil

Min. Nom. Max.

A 394 ¾419

B 290 ¾300

C14

¾20

C¢490 ¾510

D92

¾104

E¾50 ¾

¾¾

G32¾38

¾12

a0°¾10°

HT12A/HT12E

Rev. 1.10 11 January 24, 2003

2 0

1 1

1 0

E F

C ' G

Product Tape and Reel Specifications

Reel Dimensions

SOP 20W

Symbol Description Dimensions in mm

A Reel Outer Diameter 330±1.0

B Reel Inner Diameter 62±1.5

C Spindle Hole Diameter 13.0+0.5

-0.2

D Key Slit Width 2.0±0.5

T1 Space Between Flange 24.8+0.3

-0.2

T2 Reel Thickness 30.2±0.2

HT12A/HT12E

Rev. 1.10 12 January 24, 2003

T 1

T 2 D

Carrier Tape Dimensions

SOP 20W

Symbol Description Dimensions in mm

W Carrier Tape Width 24.0+0.3

-0.1

P Cavity Pitch 12.0±0.1

E Perforation Position 1.75±0.1

F Cavity to Perforation (Width Direction) 11.5±0.1

D Perforation Diameter 1.5+0.1

D1 Cavity Hole Diameter 1.5+0.25

P0 Perforation Pitch 4.0±0.1

P1 Cavity to Perforation (Length Direction) 2.0±0.1

A0 Cavity Length 10.8±0.1

B0 Cavity Width 13.3±0.1

K0 Cavity Depth 3.2±0.1

t Carrier Tape Thickness 0.3±0.05

C Cover Tape Width 21.3

HT12A/HT12E

Rev. 1.10 13 January 24, 2003

PD 1

P 1P 0

K 0

B 0

A 0

HT12A/HT12E

Rev. 1.10 14 January 24, 2003

The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek as-

sumes no responsibility arising from the use of the specifications described. The applications mentioned herein are used

solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable

without further modification, nor recommends the use of its products for application that may present a risk to human life

due

malfunction

otherwise.

Holtek¢s

products

are

not

authorized

for

use

critical

components

life

support

devices

systems.

Holtek

reserves

the

right

alter

its

products

without

prior

notification.

For

the

most

up-to-date

information,

please visit our web site at http://www.holtek.com.tw.

Holtek Semiconductor Inc. (Headquarters)

No.3, Creation Rd. II, Science Park, Hsinchu, Taiwan

Tel: 886-3-563-1999

Fax: 886-3-563-1189

http://www.holtek.com.tw

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