Vishay Siliconix
TN2404K/TN2404KL/BS107KL
Document Number: 72225
S12-1767-Rev. C, 23-Jul-12
www.vishay.com
1
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
For technical questions, contact: pmostechsupport@vishay.com
N-Channel 240 V (D-S) MOSFET
FEATURES
• Low On-Resistance: 4
• Secondary Breakdown Free: 260 V
• Low Power/Voltage Driven
• Low Input and Output Leakage
• Excellent Thermal Stability
• Material categorization:
For definitions of compliance please see
www.vishay.com/doc?99912
APPLICATIONS
• High-Voltage Drivers: Relays,
Solenoids, Lamps, Hammers,
Displays, Transistors, etc.
• Telephone Mute Switches,
Ringer Circuits
• Power Supply, Converters
• Motor Control
BENEFITS
• Low Offset Voltage
• Full-Voltage Operation
• Easily Driven Without Buffer
• Low Error Voltage
• No High-Temperature “Run-Away”
Notes:
a. Pulse width limited by maximum junction temperature.
b. Surface mounted on an FR4 board.
PRODUCT SUMMARY
Part
Number
VDS
(V)
RDS(on)
()
VGS(th)
(A)
ID
(A)
Qg
(Typ.)
TN2404K
240 4 at VGS = 10 V 0.8 to 2
0.2
4.87 nC
TN2404K,
BS107KL 0.3
TN2404KL
Device Marking
Front View
“S” TN
2404KL
xxyy
“S” = Siliconix Logo
xxyy = Date Code
BS107KL
Device Marking
Front View
“S” BS
107KL
xxyy
“S” = Siliconix Logo
xxyy = Date Code
TO-226AA
(TO-92)
Top View
S
D
G
1
2
3
TO-92-18RM
(TO-18 Lead Form)
Top View
D
S
G
1
2
3
TN2404K
G
S
D
Top View
2
3
TO-236
(SOT-23)
1
Marking Code: K1ywl
K1 = Part Number Code for TN2404K
y = Year Code
w = Week Code
l = Lot Traceability
ORDRING INFORMATION
Standard Partnumber Ordering Part Number Option
TN2404K TN2404K-T1-E3 Lead (Pb) free
TN2404K-T1-GE3 Lead (Pb) free and Halogen free
TN2404KL TN2404KL-TR1-E3 With Tape and Reel
Spool Option
BS107KL BS107KL-TR1-E3
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)
Parameter Symbol TN2404K TN2404KL/BS107KL Symbol
Drain-Source Voltage VDS 240 V
Gate-Source Voltage VGS ± 20
Continuous Drain Current (TJ = 150 °C) TA = 25 °C ID
0.2 0.3
A
TA = 70 °C 0.16 0.25
Pulsed Drain Current (t = 300 µs) IDM 0.8 1.4
Maximum Power Dissipation TA = 25 °C PD
0.36 0.8 W
TA = 70 °C 0.23 0.51
Thermal Resistance Junction-to-Ambient RthJA 350b156 °C/W
Operating Junction and Storage Temperature Range TJ, Tstg - 55 to 150 °C
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Document Number: 72225
S12-1767-Rev. C, 23-Jul-12
Vishay Siliconix
TN2404K/TN2404KL/BS107KL
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
For technical questions, contact: pmostechsupport@vishay.com
Notes:
a. Pulse test; pulse width 300 µs, duty cycle 2 %
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
SPECIFICATIONS (TA = 25 °C, unless otherwise noted)
Parameter Symbol Test Conditions Limits
Min. Typ.aMax. Unit
Static
Drain-Source Breakdown Voltage VDS VGS = 0 V, ID = 100 µA 240 257 V
Gate-Source Threshold Voltage VGS(th) VDS = VGS, ID = 250 µA 0.8 1.65 2
Gate-Source Leakage IGSS VDS = 0 V, VGS = ± 20 V ± 100 nA
Zero Gate Voltage Drain Current IDSS
VDS = 192 V, VGS = 0 V 1
µA
VDS = 192 V, VGS = 0 V, TJ = 55 °C 10
On-State Drain CurrentaID(on) VDS 10 V, VGS = 10 V 0.8 A
VDS 10 V, VGS = 4.5 V 0.5
Drain-Source On-State ResistanceaRDS(on)
VGS 10 V, ID = 0.3 A 2.2 4
VGS 4.5 V, ID = 0.2 A 2.3 4
VGS 2.5 V, ID = 0.1 A 2.4 6
Forward Transconductanceagfs VDS = 10 V, ID = 0.3 A 1.6 S
Diode Forward Voltage VSD VGS = 0 V, IS = 0.3 A 0.8 1.2 V
Dynamicb
Total Gate Charge Qg
VDS = 192 V, VGS = 10 V, ID = 0.5 A
4.87 8
nCGate-Source Charge Qgs 0.56
Gate-Drain Charge Qgd 1.53
Tur n - O n D e l ay T im e td(on)
VDD = 60 V, RL = 200
ID 0.3 A, VGEN = 10 V, Rg = 25
510
ns
Rise Time tr 12 20
Turn-Off Delay Time td(off) 35 60
Fall Time tf16 25
Document Number: 72225
S12-1767-Rev. C, 23-Jul-12
www.vishay.com
3
Vishay Siliconix
TN2404K/TN2404KL/BS107KL
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
For technical questions, contact: pmostechsupport@vishay.com
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Output Characteristics
On-Resistance vs. Drain Current
Gate Charge
0.0
0.3
0.6
0.9
1.2
1.5
1.8
012345
VGS = 10 thru 3 V
VDS − Drain-to-Source Voltage (V)
−
Drain Current (A)I
D
2 V
2.5 V
− On-Resistance (RDS(on) )
0
1
2
3
4
5
0.0 0.2 0.4 0.6 0.81.0 1.2
ID − Drain Current (A)
VGS = 10 V
VGS = 4.5 V
0
2
4
6
8
10
012345
VDS = 192 V
ID = 0.5 A
− Gate-to-Source Voltage (V)
Qg − Total Gate Charge (nC)
V
GS
Transfer Characteristics
Capacitance
On-Resistance vs. Junction Temperature
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
0123456
TC = −55 C
125 C
25 C
VGS − Gate-to-Source Voltage (V)
− Drain Current (A)ID
0
50
100
150
200
250
300
0 1020304050
VDS − Drain-to-Source Voltage (V)
Crss Coss
Ciss
C − Capacitance (pF)
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
−50 −25 0 25 50 75 100 125 150
VGS = 4.5 V
ID = 0.2 A
TJ − Junction Temperature ( C)
VGS = 10 V
ID = 0.3 A
RDS(on) − On-Resiistance (Normalized)
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Document Number: 72225
S12-1767-Rev. C, 23-Jul-12
Vishay Siliconix
TN2404K/TN2404KL/BS107KL
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
For technical questions, contact: pmostechsupport@vishay.com
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Source-Drain Diode Forward Voltage
0.0 0.2 0.4 0.6 0.81.0 1.2 1.4
TJ = 150 C
10
0.001
VSD −)V( egatloV niarD-ot-ecruoS
− Source Current (A)I
S
TJ = 25 C
1
0.1
0.01
TJ = −55 C
On-Resistance vs. Gate-to-Source Voltage
0
1
2
3
4
5
6
7
8
0246810
− On-Resistance (RDS(on) )
VGS − Gate-to-Source Voltage (V)
ID = 50 mA
ID = 10 mA
ID = 100 mA
Threshold Voltage
−0.5
−0.4
−0.3
−0.2
−0.1
−0.0
0.1
0.2
0.3
−50 −25 0 25 50 75 100 125 150
Variance (V)V
GS(th)
TJ − Temperature (°C)
ID = 250 µA
Document Number: 72225
S12-1767-Rev. C, 23-Jul-12
www.vishay.com
5
Vishay Siliconix
TN2404K/TN2404KL/BS107KL
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
For technical questions, contact: pmostechsupport@vishay.com
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?72225.
Normalized Thermal Transient Impedance, Junction-to-Ambient
(TO-236, TN2404K only)
Normalized Thermal Transient Impedance, Junction-to-Ambient
(TO-226AA, TN2404KL and TO-92-18RM, BS107KL only)
10 K
1
0.01
0.1
00111.0 K 101
Duty Cycle = 0.5
0.2
0.1
0.05
0.02
Single Pulse
0.01
Normalized Effective Transient
Thermal Impedance
t1 − Square Wave Pulse Duration (s)
1. Duty Cycle, D =
2. Per Unit Base = RthJA = 156 C/W
3. TJM − TA = PDMZthJA(t)
t1
t2
t1
Notes:
PDM
t2
Vishay Siliconix
Package Information
Document Number: 71196
09-Jul-01
www.vishay.com
1
SOT-23 (TO-236): 3-LEAD
b
E
E1
1
3
2
Se
e1
D
A2
A
A1C
Seating Plane
0.10 mm
0.004"
CC
L1
L
q
Gauge Plane
Seating Plane
0.25 mm
Dim MILLIMETERS INCHES
Min Max Min Max
A0.89 1.12 0.035 0.044
A10.01 0.10 0.0004 0.004
A20.88 1.02 0.0346 0.040
b0.35 0.50 0.014 0.020
c0.085 0.18 0.0030.007
D2.80 3.04 0.110 0.120
E2.10 2.64 0.0830.104
E11.20 1.40 0.047 0.055
e0.95 BSC 0.0374 Ref
e11.90 BSC 0.0748 Ref
L0.40 0.60 0.016 0.024
L10.64 Ref 0.025 Ref
S0.50 Ref 0.020 Ref
q3°8°3°8°
ECN: S-03946-Rev. K, 09-Jul-01
DWG: 5479
AN807
Vishay Siliconix
Document Number: 70739
26-Nov-03
www.vishay.com
1
Mounting LITTLE FOOTR SOT-23 Power MOSFETs
Wharton McDaniel
Surface-mounted LITTLE FOOT power MOSFETs use integrated
circuit and small-signal packages which have been been modified
to provide the heat transfer capabilities required by power devices.
Leadframe materials and design, molding compounds, and die
attach materials have been changed, while the footprint of the
packages remains the same.
See Application Note 826, Recommended Minimum Pad
Patterns With Outline Drawing Access for Vishay Siliconix
MOSFETs, (http://www.vishay.com/doc?72286), for the basis
of the pad design for a LITTLE FOOT SOT-23 power MOSFET
footprint . In converting this footprint to the pad set for a power
device, designers must make two connections: an electrical
connection and a thermal connection, to draw heat away from the
package.
The electrical connections for the SOT-23 are very simple. Pin 1 is
the gate, pin 2 is the source, and pin 3 is the drain. As in the other
LITTLE FOOT packages, the drain pin serves the additional
function of providing the thermal connection from the package to
the PC board. The total cross section of a copper trace connected
to the drain may be adequate to carry the current required for the
application, but it may be inadequate thermally. Also, heat spreads
in a circular fashion from the heat source. In this case the drain pin
is the heat source when looking at heat spread on the PC board.
Figure 1 shows the footprint with copper spreading for the SOT-23
package. This pattern shows the starting point for utilizing the
board area available for the heat spreading copper. To create this
pattern, a plane of copper overlies the drain pin and provides
planar copper to draw heat from the drain lead and start the
process of spreading the heat so it can be dissipated into the
ambient air. This pattern uses all the available area underneath the
body for this purpose.
FIGURE 1. Footprint With Copper Spreading
0.114
2.9
0.059
1.5
0.0394
1.0
0.037
0.95
0.150
3.8
0.081
2.05
Since surface-mounted packages are small, and reflow soldering
is the most common way in which these are affixed to the PC
board, “thermal” connections from the planar copper to the pads
have not been used. Even if additional planar copper area is used,
there should be no problems in the soldering process. The actual
solder connections are defined by the solder mask openings. By
combining the basic footprint with the copper plane on the drain
pins, the solder mask generation occurs automatically.
A final item to keep in mind is the width of the power traces. The
absolute minimum power trace width must be determined by the
amount of current it has to carry. For thermal reasons, this
minimum width should be at least 0.020 inches. The use of wide
traces connected to the drain plane provides a low-impedance
path for heat to move away from the device.
Application Note 826
Vishay Siliconix
Document Number: 72609 www.vishay.com
Revision: 21-Jan-08 25
APPLICATION NOTE
RECOMMENDED MINIMUM PADS FOR SOT-23
0.106
(2.692)
Recommended Minimum Pads
Dimensions in Inches/(mm)
0.022
(0.559)
0.049
(1.245)
0.029
(0.724)
0.037
(0.950)
0.053
(1.341)
0.097
(2.459)
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Revision: 12-Mar-12 1Document Number: 91000
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