Rev. 1.4 May 2010 www.aosmd.com Page 1 of 12
AOZ1361DI
28V/2A Programmable Current-Limited Load Switch
General Description
The AOZ1361DI is a high-side load switch intended for
applications that require circuit protection. The device
operates from voltages between 4.5V and 28V, and can
handle a continuous current up to 3A. The internal
current limiting circuit protects the input supply voltage
from large load current. The current limit can be set with
an external resistor. The AOZ1361DI provides thermal
protection function that limits excessive power
dissipation. An open-drain fault indicator pulls low when
an over-current or thermal shutdown event occurs. The
device employs internal soft-start circuitry to control
inrush current due to highly capacitive loads associated
with hot-plug events. It features low quiescent current of
220µA and the supply current reduces to less than 1µA in
shutdown.
The AOZ1361DI is available in a 10-pin 4x4 DFN
package and can oper at e ov er -40°C to +85°C
temperature range.
Features
●35mΩ maximum on resistance
●2A minimum continuous current
●Programmable current limit
●4.5V to 28V operating input voltage
●Low quiescent current
●Under-voltage lockout
●Thermal shutdown protection
●Open-drain fault indicator with delay
●Small 4x4 DFN package
●2.5kV ESD rating
Applications
●Notebook PCs
●Hot swap supplies
Typical Application
AOZ1361DI
IN
IN
EN
GND
FLTB
OUT
OUT
SET
SS
TFLT
1
2
6
4
3
10
9
7
5
8
C1
1µF
C3
1nF
C4
1nF
ONOFF
V
OUT
V
IN
C2
0.1µF
R1
74.5kΩ
R2
100kΩ
+5V
AOZ1361DI
Rev. 1.4 May 2010 www.aosmd.com Page 2 of 12
Ordering Information
AOS Green Products use reduced levels of Halogens, and are also RoHS compliant.
Please visit www.aosmd.com/web/quality/rohs_compliant.jsp for additional information.
Pin Configuration
Pin Description
Part Number Feature Package Temperature Range Environmental
AOZ1361DI-01 Auto-restart DFN 4x4 10 -40°C to +85°C RoHS Compliant
Green Product
AOZ1361DI-02 Latch-off
Pin Number Pin Name Pin Function
1, 2 IN P-channel MOSFET source. Connect a 1µF capacitor from IN to GND.
3 FLTB Fault output pin. This is an open drain output that is internally pulled low to indicate a
fault condition. Connect to 5V thru a pull up resistor.
4 GND Ground.
5 SS Soft-Start Pin. Connect a capacitor from SS to GND to set the soft-start time.
6 EN Enable Input.
7 SET Current Limit Set Pin. Connect a resistor from SET to GND to set the switch current
limit.
8 TFLT Fault Delay pin. Connect a capacitor from TFLT to GND to set the Fault delay time.
9, 10 OUT P-channel MOSFET Drain. Connect a 0.1µF capacitor from OUT to GND.
TOP VIEW
DFN 4x4 10
IN
IN
SS EN
OUT
1
2
4
6
9
GND
3
OUT
8
SET
7
5
10
FLTB TFLT
OUT
GND
AOZ1361DI
Rev. 1.4 May 2010 www.aosmd.com Page 3 of 12
Absolute Maximum Ratings
Exceeding the Absolute Maximum ratings may damage the
device.
Recommend Operating Ratings
The device is not guaranteed to operate beyond the Maximum
Operating Ratings.
Parameter Rating
IN to GND -0.3V to +30V
EN, OUT to GND -0.3V to VIN + 0.3V
FLTB, TFLT, SS, SET -0.3V to +6V
Maximum Continuous Current 3A
Maximum Junction Temperature (TJ) +150°C
ESD Rating (HBM) 2.5kV
Parameter Rating
Thermal Resistance (DFN 4x4) 63°C/W
Electrical Characteristics
VIN = 12V, TA = 25°C unless otherwise stated.
Symbol Parameter Conditions Min. Typ. Max Units
VIN Input Supply Voltage 4.5 28 V
VUVLO Undervoltage Lockout
Threshold IN rising 3.9 4.4 V
VUVHYS Undervoltage Lockout
Hysteresis 200 mV
IIN_ON Input Quiescent Current EN = IN, no load 300 500 µA
IIN_OFF Input Shutdown Current EN = GND, no load 1 µA
ILEAK Output Leakage Current EN = GND, no load 1 µA
RDS(ON) Switch On Resistance VIN= 12V 22 35 mΩ
VIN = 4.5V 33 43
ILIM Current Limit RSET = 74.5kΩ22.73.4A
VEN_H Enable In pu t L ow Voltage 0.8 V
VEN_L Enable Input High Voltage 2.0 V
VEN_HYS Enable Input Hysteresis 100 mV
IEN_BIAS Enable Inpu t Bi as C urr en t 1µA
Td_on Turn-On Delay Time
EN_50% to OUT_10% RL=120Ω, CL = 1µF, SS = Floated.
Measure from 50% of EN voltage to
10% of OUT voltage
280 µs
tON Turn-On Rise Time
OUT_10% to 90% RL=120Ω, CL = 1µF, SS = Floated.
Measure from 10% of OUT voltage
to 90% of OUT voltage
220 µs
RL=120Ω, CL = 1µF, CSS = 1nF 360 µs
tOFF Turn-Off Fall Time RL=120Ω, CL = 1µF, SS = Floated 280 µs
RDS(FLTB) On-Resi stance at FLTB Sink current = 4mA 100 Ω
ILEAK_FLT FLT Output Leakage 1µA
TFLT FLT Delay Period CTLT = 1nF 600 µs
TSD Thermal Shutdown Threshold 130 °C
TSD_HYS Thermal Shutdown Hysteresis 30 °C
AOZ1361DI
Rev. 1.4 May 2010 www.aosmd.com Page 4 of 12
Timing Diagram
Figure 1. AOZ1361DI Timing
Functional Block Diagram
Figure 2. AOZ1361DI Functional Block Diagram
TD(ON)
10%
90%
TR
VIH
EN
OUT
VIL
90%
TD(OFF)
Gate Driver &
Slew Rate
Control
EN
IN OUT
SET
AOZ1361DI
5.5V
UVLO
Comparator
R1
74.5kΩ
Thermal
Shutdown
C1
1μF
C4
1nF
SS
Fault Delay &
Latch
Current Limit
FLTB
C3
1nF
R2
100kΩ
5V
FLTG
TFLT
OC
OT
Rev. 1.4 May 2010 www.aosmd.com Page 5 of 12
AOZ1361DI
Functional Characteristics
Turn-On
(V
IN
= 12V, R = 5.6Ω)
1ms/div
40ms/div
V
IN
2V/div
V
OUT
2V/div
EN
1V/div
I
OUT
0.5A/div
Turn-Off
(V
IN
= 12V, R = 5.6Ω)
20μs/div
V
IN
2V/div
V
OUT
2V/div
EN
1V/div
I
OUT
0.5A/div
Current Limit Response Thermal Shutdown
AOZ1361DI-01: Auto-Restart Version
(V
IN
= 12V)
V
OUT
5V/div
FLTB
5V/div
I
OUT
2A/div
2ms/div
V
OUT
5V/div
FLTB
5V/div
I
OUT
2A/div
Current Limit Response Thermal Shutdown
AOZ1361DI-02: Latch-off Version
(V
IN
= 12V)
Rev. 1.4 May 2010 www.aosmd.com Page 6 of 12
AOZ1361DI
Typical Operating Characteristics
Input Quiescent Current
150
200
250
300
350
400
450
51015202530
Vin (V)
Supply Current (μA)
Output Leakage Current (μA)
Input Shutdown Current
Vin (V)
Supply Current (μA)
85°C
25°C
-40°C
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
51015202530
85°C
25°C
-40°C
Output Leakage Current
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
-50 -30 -10 10 30 50 70 90
Temperature (°C) Temperature (°C)
Temperature (°C)
Vin=12V
Vin=5.5V
UVLO Threshold vs Temperature
3.6
3.65
3.7
3.75
3.8
3.85
3.9
3.95
4.0
-60 -40 -20 0 20 40 60 80 100 120
Rising
Falling
Rds(on) vs Supply Voltage
10
12
14
16
18
20
22
24
26
28
30
5 1015202530
Vin (V)
Rds(on) vs Temperature
0
5
10
15
20
25
30
35
40
-60 -40 -20 0 20 40 60 80 100 120
Vin=12V
Vin=5.5V
Threshold (V)
Rds(on) (mΩ)
Rds(on) (mΩ)
AOZ1361DI
Rev. 1.4 May 2010 www.aosmd.com Page 7 of 12
Typical Operating Characteristics (Continued)
Temperature (°C)Temperature (°C)
Enable Input Threshold (Rising) vs Temperature
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
-60 -40 -20 0 20 40 60 80 100 120
Vin=12V
Vin=5.5V
Enable Input Threshold (Falling) vs. Temperature
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
-60 -40 -20 0 20 40 60 80 100 120
Vin=12V
Vin=5.5V
VEN (V)
VEN (V)
AOZ1361DI
Rev. 1.4 May 2010 www.aosmd.com Page 8 of 12
Detailed Description
Introduction
The AOZ1361DI is a 35mΩ P-channel high-side load
switch with adjustable soft-start slew-rate control,
programmable current limit and thermal shutdown.
It operates with an input voltage range from 4.5V to 28V
and can handle a continuous current of 2.7A.
Enable
The EN pin is the ON/OFF control for the output switch. It
is an active-high input. The EN pin is active after VIN is
above the UVLO threshold of 4V. Conversely, the Enable
will be de-activated if the VIN falls below the UVLO of 4V.
The EN pin must be driven to a logic high or logic low
state to guarantee operation. While disabled, the
AOZ1361DI only draws about 1µA supply current. The
EN is a high impedance input with an ESD protection
diode to ground and should not be forced below ground.
This input level is compatible with most microcontroller
outputs and other logic families.
Under-Voltage Lockout (UVLO)
The under-voltage lockout (UVLO) circuit of AOZ1361DI
monitors the input voltage and prevents the output
MOSFET from turning on until VIN exceeds 4V.
Adjustable Soft-Start Slew-Rate Control
When the EN pin is asserted high, the slew rate control
circuitry applies voltage on the gate of the PMOS switch
in a manner such that the output voltage and current is
ramped up linearly until it reaches the steady-state load
current level. The slew rate can be adjusted by an
external capacitor connected to the SS pin to ground.
The slew rate rise time, Ton, can be set using the
following equation:
Programmable Current Limit
The current limit is programmed by an external resistor
connected to the SET pin to ground. This sets a
reference voltage to the current limit error amplifier that
compares it to a sensed voltage that is generated by
passing a small portion of the load current through an
internal amplifier. When the sensed load current exceeds
the set current limit, the load current is then clamped at
the set limit and the Vout drops to whatever voltage
necessary to clamp the load current. The AOZ1361DI will
stay in this condition until the load current no longer
exceeds the current limit or if the thermal shutdown
protection is engaged. To set the current limit use
Figure 3 on the following page.
Thermal Shut-down Protection
The thermal overload protection of AOZ1361DI is
engaged to protect the device from damage should the
die temperature exceeds safe margins due to a short
circuit, extreme loading or heating from external sources.
1. AOZ1361DI-01 (Auto-restart version): During current
limit or short circuit conditions, the PMOS resistance
is increased to clamp the load current. This increases
the power dissipation in the chip causing the die tem-
perature to rise. When the die temperature reaches
130°C the thermal shutdown circuitry will shutdown
the device. There is a 30°C hysterisis after which the
device will turn back on and go thru soft start. The
thermal shutdown will cycle repeatedly until the short
circuit condition disappears or the enable pin is
pulled LOW by an external monitor.
2. AOZ1361DI-02 (Latch-off version): Thermal
shut-down protection sets a fault latch and shuts off
the internal MOSFET and asserts the FLT output if
the junction temperature exceeds +130°C. The
AOZ1361DI can be re-enabled by toggling EN pin or
cycling the input supply after the die temperature
drops below +100°C.
FLTB
The FLTB pin is an open drain output that is asserted low
when either an over-current, short-circuit or thermal
overload condition occurs. To prevent false alarm, the
AOZ1361DI implements a 600µs fault delay time for OT,
over-current and short-circuit fault conditions. The FLTB
pin becomes high impedance when the fault conditions
are removed. A 100kΩ pull-up resistor must be
connected between FLTB to 5V to provide a logic signal.
TFLT
TFLT is a fault delay pin, and its delay time is adjustable
by a capacitor connected from TFLT to GND.
Ton Css VIN
×
30μA
--------------------------
=
AOZ1361DI
Rev. 1.4 May 2010 www.aosmd.com Page 9 of 12
Applications Information
Input Capacitor Selection
The input capacitor prevents large voltage transients
from appearing at the input, and provides the
instantaneous current needed each time the switch turns
on and to limit input voltage drop. Also it is to prevent
high-frequency noise on the power line from passing
through the output of the power side. The choice of the
input capacitor is based on its ripple current and voltage
ratings rather than its capacitor value. The input
capacitor should be located as close to the VIN pin as
possible. A 1µF ceramic cap is recommended. However,
higher capacitor values further reduce the voltage drop at
the input.
Output Capacitor Selection
The output capacitor acts in a similar way. A small 0.1µF
capacitor prevents high-frequency noise from going into
the system. Also, the output capacitor has to supply
enough current for a large load that it may encounter
during system transients. This bulk capacitor must be
large enough to supply fast transient load in order to
prevent the output from dropping.
Current Limit Setting
The current limit is program by using external resistor
connected to the SET pin. To set the current limit, use th e
Figure 3 below.
Figure 3. Current Limit vs. RSET (VIN = 12V)
Slew Rate Setting
Slew rate is set by changing the capacitor value on the
Slew pin of the device. A capacitor connected between
this SS pin and ground will reduce the output slew-rate.
The capacitive range is 0.001µF to 0.1µF. See Figure 4
for Output Slew Rate Adjustment vs. Capacitance.
Figure 4. Output Slew Rate Adjustment vs. Capacitance
Power Dissipation Calculation
Calculate the power dissipation for normal load condition
using the following equation:
PD = RON x (IOUT)2
The worst case power dissipation occurs when the
load current hits the current limit due to over-current or
short circuit faults. The power dissipation under these
conditions can be calculated using the following
equation:
PD = (VIN – VOUT) x ILIMIT
Layout Guidelines
Good PCB layout is important for improving the thermal
and overall performance of AOZ1361. To optimize the
switch response time to output short-circuit conditions
keep all traces as short as possible to reduce the effect
of unwanted parasitic inductance. Place the input and
output bypass capacitors as close as possible to the
IN and OUT pins. The input and output PCB traces
should be as wide as possible for the given PCB space.
Use a ground plane to enhance the power dissipation
capability of the device.
RSET (kΩ)
ILIM (A)
2
2.2
2.4
2.6
2.8
3
3.2
3.4
65 70 75 80 85 90
AOZ1361 RSET VS ILIM
0
5
10
15
20
25
30
35
0 0.02 0.04 0.06 0.08 0.1
Capacitance (μF)
Slew Rate (ms)
AOZ1361DI
Rev. 1.4 May 2010 www.aosmd.com Page 10 of 12
Package Dimensions, DFN 4x4
Seating
Plane
B
A
C
4
6
5
3
2
Notes:
1. All dimensions are in millimeters.
2. The dimensions with * are just for reference.
3. The location of the terminal #1 identifier and terminal numbering convention conforms to JEDEC publication 95 SPP-002.
4. Dimension b applies to metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. If the terminal has the
optional radius on the other end of the terminal, then dimension b should not be measured in that radius area.
5. Coplanarity applies to the terminals and all other bottom surface metallization.
6. Drawings shown are for illustration only.
ddd
eee
b
e
L
E1
D2
A1
A
A3
D1
Pin #1 IDA
L1
L3
10x
INDEX AREA
(D/2xE/2)
Chamfer 0.20
Unit: mm
*
L4
L4
*
0.35 TYP
0.38
*
610
Pin 1
D/2
D/2
D
E
1
5
5
1
10 6
Chamfer 0.20
0.02
Pin #1 IDA
1.78 1.42
0.30
0.30
2.30
0.65 Typ.
0.65 Typ.
1.15
3.55
E1/2
L2
TOP VIEW BOTTOM VIEW
SIDE VIEW
RECOMMENDED LAND PATTERN
Symbols
A
A1
A3
b
D
D1
D2
E
E1
e
L
L1
L2
L3
L4
aaa
bbb
ccc
ddd
eee
Dimensions in millimeters
Min.
0.70
0.00
0.30
3.95
1.58
1.22
3.95
2.20
0.50
—
0.28
Nom.
0.75
0.02
0.203 REF
0.35
4.00
1.68
1.32
4.00
2.30
0.65 BSC
0.55
0.02
0.38
0.85 REF
0.30 REF
0.15
0.10
0.10
0.08
0.05
Max.
0.80
0.05
0.40
4.05
1.78
1.42
4.05
2.40
0.60
0.12
0.48
Symbols
A
A1
A3
b
D
D1
D2
E
E1
e
L
L1
L2
L3
L4
aaa
bbb
ccc
ddd
eee
Dimensions in inches
Min.
0.028
0.000
0.012
0.156
0.062
0.048
0.156
0.087
0.020
—
0.011
Nom.
0.030
0.001
0.008 REF
0.014
0.157
0.066
0.052
0.157
0.091
0.026 BSC
0.022
0.001
0.015
0.033 REF.
0.012 REF
0.006
0.004
0.004
0.003
0.002
Max.
0.031
0.002
0.016
0.159
0.070
0.056
0.159
0.094
0.024
0.005
0.019
Rev. 1.4 May 2010 www.aosmd.com Page 11 of 12
AOZ1361DI
Tape and Reel Dimensions, DFN 4x4
Package
DFN 4x4
(12mm)
A0 B0 K0 E E1 E2D0 D1 P0 P1 P2 T
4.35
0.10 0.10
1.10
Min.
1.50 1.50
+0.1/-0.0 0.3
12.0
0.10
1.75
0.05
5.50
0.10
8.00
0.10
4.00
0.05
2.00
0.05
0.30
R
V
MN
G
S
WNM
ø
79.0
ø
330.0
2.0
12.412 mm
Tape Size VRSK
0.5
2.010.5
G
———
HW1
ø
13.0
0.5
17.0
H
K
W
W1
Reel Size
ø
330
UNIT: MM
UNIT: MM
1.0 +2.0/-0.0 +2.6/-0.0
D1 P1
E1
E2
E
P2
K0
T
A0
P0
B0
D0
C
L
0.2
0.10
4.35
Carrier Tape
Reel
Trailer Tape
300mm min. or
75 empty pockets
Components Tape
Orientation in Pocket
Leader Tape
500mm min. or
125 empty pockets
Leader/Trailer and Orientation
Feeding Direction
AOZ1361DI
Rev. 1.4 May 2010 www.aosmd.com Page 12 of 12
Package Marking
Z1361DIX
ZA8R1B Part Number Code
Assembly Lot Code
Fab & Assembly Location
Year & Week Code
DFN 4x4
Option Code
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body or (b) support or sustain life, and (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of
the user.
2. A critical component in any component of a life
support, device, or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
Alpha & Omega Semiconductor reserves the right to make changes at any time without notice.
LIFE SUPPORT POLICY
ALPHA & OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS.
