IPD50R2K0CE,IPU50R2K0CE MOSFET 500VCoolMOSCEPowerTransistor DPAK CoolMOSTMisarevolutionarytechnologyforhighvoltagepower MOSFETs,designedaccordingtothesuperjunction(SJ)principleand pioneeredbyInfineonTechnologies.CoolMOSTMCEisa price-performanceoptimizedplatformenablingtotargetcostsensitive applicationsinConsumerandLightingmarketsbystillmeetinghighest efficiencystandards.Thenewseriesprovidesallbenefitsofafast switchingSuperjunctionMOSFETwhilenotsacrificingeaseofuseand offeringthebestcostdownperformanceratioavailableonthemarket. Features IPAK tab 1 tab 2 1 3 2 3 Drain Pin 2 Gate Pin 1 *ExtremelylowlossesduetoverylowFOMRdson*QgandEoss *Veryhighcommutationruggedness *Easytouse/drive *Pb-freeplating,Halogenfreemoldcompound *Qualifiedforstandardgradeapplications Source Pin 3 Applications PFCstages,hardswitchingPWMstagesandresonantswitchingstages fore.g.PCSilverbox,Adapter,LCD&PDPTVandindoorlighting. Pleasenote:ForMOSFETparallelingtheuseofferritebeadsonthegate orseparatetotempolesisgenerallyrecommended Table1KeyPerformanceParameters Parameter Value Unit VDS @ Tj,max 550 V RDS(on),max 2 ID 3.6 A Qg.typ 6 nC ID,pulse 6.1 A Eoss@400V 0.62 J Type/OrderingCode Package IPD50R2K0CE PG-TO 252 IPU50R2K0CE PG-TO 251 Final Data Sheet Marking 50S2K0CE 1 RelatedLinks see Appendix A Rev.2.3,2016-06-13 500VCoolMOSCEPowerTransistor IPD50R2K0CE,IPU50R2K0CE TableofContents Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Test Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Appendix A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Final Data Sheet 2 Rev.2.3,2016-06-13 500VCoolMOSCEPowerTransistor IPD50R2K0CE,IPU50R2K0CE 1Maximumratings atTj=25C,unlessotherwisespecified Table2Maximumratings Parameter Symbol Continuous drain current1) Values Unit Note/TestCondition 3.6 2.3 A TC = 25C TC = 100C - 6.1 A TC=25C - - 34 mJ ID =0.8A; VDD = 50V EAR - - 0.05 mJ ID =0.8A; VDD = 50V Avalanche current, repetitive IAR - - 0.8 A - MOSFET dv/dt ruggedness dv/dt - - 50 V/ns VDS=0...400V Gate source voltage VGS -20 -30 - 20 30 V static; AC (f>1 Hz) Power dissipation (non FullPAK) TO-252, TO-251 Ptot - - 33 W TC=25C Operating and storage temperature Tj,Tstg -55 - 150 C - Continuous diode forward current IS - - 2.5 A TC=25C Diode pulse current IS,pulse - - 6.1 A TC = 25C Reverse diode dv/dt3) dv/dt - - 15 V/ns VDS=0...400V,ISD<=IS,Tj=25C, tcond<2s Maximum diode commutation speed3) dif/dt - - 500 A/s VDS=0...400V,ISD<=IS,Tj=25C, tcond<2s Unit Note/TestCondition Min. Typ. Max. ID - - Pulsed drain current2) ID,pulse - Avalanche energy, single pulse EAS Avalanche energy, repetitive 2) 2Thermalcharacteristics Table3ThermalcharacteristicsDPAK,IPAK Parameter Symbol Thermal resistance, junction - case Values Min. Typ. Max. RthJC - - 3.75 C/W - Thermal resistance, junction - ambient RthJA - 35 62 - SMD version, device on PCB, minimal footprint C/W SMD version, device on PCB, 6cm2 cooling area4) Soldering temperature, wave- & reflowsoldering allowed - - 260 C 4) Tsold reflow MSL 1 1) Limited by Tj max. Maximum duty cycle D=0.5 Pulse width tp limited by Tj,max 3) VDClink=400V;VDS,peak<V(BR)DSS;identicallowsideandhighsideswitchwithidenticalRG 4) Device on 40mm*40mm*1.5mm one layer epoxy PCB FR4 with 6cm2 copper area (thickness 70m) for drain connection. PCB is vertical without air stream cooling. 2) Final Data Sheet 3 Rev.2.3,2016-06-13 500VCoolMOSCEPowerTransistor IPD50R2K0CE,IPU50R2K0CE 3Electricalcharacteristics Table4Staticcharacteristics Parameter Symbol Drain-source breakdown voltage Values Unit Note/TestCondition - V VGS=0V,ID=1mA 3 3.50 V VDS=VGS,ID=0.05mA - 10 1 - A VDS=500V,VGS=0V,Tj=25C VDS=500V,VGS=0V,Tj=150C IGSS - - 100 nA VGS=20V,VDS=0V Drain-source on-state resistance RDS(on) - 1.80 4.68 2.00 - VGS=13V,ID=0.6A,Tj=25C VGS=13V,ID=0.6A,Tj=150C Gate resistance RG - 7 - f=1MHz,opendrain Unit Note/TestCondition Min. Typ. Max. V(BR)DSS 500 - Gate threshold voltage V(GS)th 2.50 Zero gate voltage drain current IDSS Gate-source leakage curent Table5Dynamiccharacteristics Parameter Symbol Input capacitance Values Min. Typ. Max. Ciss - 124 - pF VGS=0V,VDS=100V,f=1MHz Output capacitance Coss - 9 - pF VGS=0V,VDS=100V,f=1MHz Effective output capacitance, energy related1) Co(er) - 8 - pF VGS=0V,VDS=0...400V Effective output capacitance, time related2) Co(tr) - 26 - pF ID=constant,VGS=0V,VDS=0...400V Turn-on delay time td(on) - 6 - ns VDD=400V,VGS=13V,ID=0.8A, RG=5.3 Rise time tr - 5 - ns VDD=400V,VGS=13V,ID=0.8A, RG=5.3 Turn-off delay time td(off) - 21 - ns VDD=400V,VGS=13V,ID=0.8A, RG=5.3 Fall time tf - 38 - ns VDD=400V,VGS=13V,ID=0.8A, RG=5.3 Unit Note/TestCondition Table6Gatechargecharacteristics Parameter Symbol Gate to source charge Values Min. Typ. Max. Qgs - 0.7 - nC VDD=400V,ID=0.8A,VGS=0to10V Gate to drain charge Qgd - 3.5 - nC VDD=400V,ID=0.8A,VGS=0to10V Gate charge total Qg - 6 - nC VDD=400V,ID=0.8A,VGS=0to10V Gate plateau voltage Vplateau - 5.4 - V VDD=400V,ID=0.8A,VGS=0to10V 1) Co(er)isafixedcapacitancethatgivesthesamestoredenergyasCosswhileVDSisrisingfrom0to80%V(BR)DSS Co(tr)isafixedcapacitancethatgivesthesamechargingtimeasCosswhileVDSisrisingfrom0to80%V(BR)DSS 2) Final Data Sheet 4 Rev.2.3,2016-06-13 500VCoolMOSCEPowerTransistor IPD50R2K0CE,IPU50R2K0CE Table7Reversediodecharacteristics Parameter Symbol Diode forward voltage Values Unit Note/TestCondition - V VGS=0V,IF=0.8A,Tf=25C 110 - ns VR=400V,IF=0.8A,diF/dt=100A/s - 0.35 - C VR=400V,IF=0.8A,diF/dt=100A/s - 5.2 - A VR=400V,IF=0.8A,diF/dt=100A/s Min. Typ. Max. VSD - 0.83 Reverse recovery time trr - Reverse recovery charge Qrr Peak reverse recovery current Irrm Final Data Sheet 5 Rev.2.3,2016-06-13 500VCoolMOSCEPowerTransistor IPD50R2K0CE,IPU50R2K0CE 4Electricalcharacteristicsdiagrams Diagram1:Powerdissipation Diagram2:Safeoperatingarea 102 30 101 20 ID[A] Ptot[W] 1 s 100 10 s 100 s 10 1 ms 10-1 10 ms DC 0 0 40 80 120 10-2 160 100 101 TC[C] 102 103 VDS[V] Ptot=f(TC) ID=f(VDS);TC=25C;D=0;parameter:tp Diagram3:Safeoperatingarea Diagram4:Max.transientthermalimpedance 2 101 10 101 0.5 ZthJC[K/W] ID[A] 1 s 0 10 10 s 0.2 10 0 0.05 0.02 100 s 10-1 0.1 1 ms 0.01 single pulse 10 ms DC 10-2 100 101 102 103 10-1 10-5 10-4 VDS[V] 10-2 10-1 tp[s] ID=f(VDS);TC=80C;D=0;parameter:tp Final Data Sheet 10-3 ZthJC=f(tP);parameter:D=tp/T 6 Rev.2.3,2016-06-13 500VCoolMOSCEPowerTransistor IPD50R2K0CE,IPU50R2K0CE Diagram5:Typ.outputcharacteristicsTj=25C Diagram6:Typ.outputcharacteristicsTj=125C 8 5.0 4.5 7 20 V 4.0 10 V 3.5 8V 3.0 20 V 10 V 6 8V ID[A] ID[A] 5 4 7V 3 7V 2.5 2.0 6V 1.5 2 5.5 V 6V 1.0 5V 5.5 V 1 5V 4.5 V 0.5 4.5 V 0 0 5 10 15 0.0 20 0 5 10 VDS[V] 15 ID=f(VDS);Tj=25C;parameter:VGS ID=f(VDS);Tj=125C;parameter:VGS Diagram7:Typ.drain-sourceon-stateresistance Diagram8:Drain-sourceon-stateresistance 6.00 6.0 5.80 5.5 6V 5V 5.60 5.40 5.5 V 7V 5.0 6.5 V 4.5 5.20 4.0 4.80 4.60 RDS(on)[] RDS(on)[] 5.00 10 V 4.40 4.20 98% 3.5 typ 3.0 2.5 2.0 4.00 1.5 3.80 1.0 3.60 0.5 3.40 3.20 20 VDS[V] 0 1 2 3 4 0.0 -50 -25 0 25 ID[A] 75 100 125 150 175 Tj[C] RDS(on)=f(ID);Tj=125C;parameter:VGS Final Data Sheet 50 RDS(on)=f(Tj);ID=0.6A;VGS=13V 7 Rev.2.3,2016-06-13 500VCoolMOSCEPowerTransistor IPD50R2K0CE,IPU50R2K0CE Diagram9:Typ.transfercharacteristics Diagram10:Typ.gatecharge 7 10 9 25 C 6 120 V 8 5 400 V 7 6 4 VGS[V] ID[A] 150 C 3 5 4 3 2 2 1 1 0 0 2 4 6 8 0 10 0 2 4 VGS[V] 6 8 Qgate[nC] ID=f(VGS);VDS=20V;parameter:Tj VGS=f(Qgate);ID=0.8Apulsed;parameter:VDD Diagram11:Avalancheenergy Diagram12:Drain-sourcebreakdownvoltage 40 580 560 540 VBR(DSS)[V] EAS[mJ] 30 20 520 500 480 10 460 0 0 25 50 75 100 125 150 175 440 -60 -20 Tj[C] 60 100 140 180 Tj[C] EAS=f(Tj);ID=0.8A;VDD=50V Final Data Sheet 20 VBR(DSS)=f(Tj);ID=1mA 8 Rev.2.3,2016-06-13 500VCoolMOSCEPowerTransistor IPD50R2K0CE,IPU50R2K0CE Diagram13:Typ.capacitances Diagram14:Typ.Cossstoredenergy 4 10 1.00 0.90 0.80 103 0.70 Eoss[J] C[pF] 0.60 Ciss 102 0.50 0.40 0.30 Coss 101 0.20 Crss 0.10 100 0 100 200 300 400 500 0.00 0 VDS[V] 100 200 300 400 500 VDS[V] C=f(VDS);VGS=0V;f=1MHz Eoss=f(VDS) Diagram15:Forwardcharacteristicsofreversediode IF[A] 101 100 125 C 25 C 10-1 0.4 0.6 0.8 1.0 1.2 1.4 VSD[V] IF=f(VSD);parameter:Tj Final Data Sheet 9 Rev.2.3,2016-06-13 500VCoolMOSCEPowerTransistor IPD50R2K0CE,IPU50R2K0CE 5TestCircuits Table8Diodecharacteristics Test circuit for diode characteristics Diode recovery waveform V ,I Rg1 VDS( peak) VDS VDS VDS trr IF Rg 2 tF tS dIF / dt IF QF IF dIrr / dt trr =tF +tS Qrr = QF + QS Irrm Rg1 = Rg 2 t 10 %Irrm QS Table9Switchingtimes Switching times test circuit for inductive load Switching times waveform VDS 90% VDS VGS VGS 10% td(on) ton tr td(off) tf toff Table10Unclampedinductiveload Unclamped inductive load test circuit Unclamped inductive waveform V(BR)DS ID VDS VDS Final Data Sheet 10 ID VDS Rev.2.3,2016-06-13 500VCoolMOSCEPowerTransistor IPD50R2K0CE,IPU50R2K0CE 6PackageOutlines *) mold flash not included DIM A A1 b b2 b3 c c2 D D1 E E1 e e1 N H L L3 L4 F1 F2 F3 F4 F5 F6 MILLIMETERS MIN MAX 2.16 2.41 0.00 0.15 0.64 0.89 0.65 1.15 5.00 5.50 0.46 0.60 0.46 0.98 5.97 6.22 5.02 5.84 6.40 6.73 4.70 5.60 2.29 (BSC) 4.57 (BSC) 3 9.40 10.48 1.18 1.70 0.90 1.25 0.51 1.00 10.60 6.40 2.20 5.80 5.76 1.20 INCHES MIN 0.085 0.000 0.025 0.026 0.197 0.018 0.018 0.235 0.198 0.252 0.185 0.370 0.046 0.035 0.020 MAX 0.095 0.006 0.035 0.045 0.217 0.024 0.039 0.245 0.230 0.265 0.220 0.090 (BSC) 0.180 (BSC) 3 0.413 0.067 0.049 0.039 0.417 0.252 0.087 0.228 0.227 0.047 DOCUMENT NO. Z8B00003328 SCALE 0 2.0 0 2.0 4mm EUROPEAN PROJECTION ISSUE DATE 01-09-2015 REVISION 05 Figure1OutlinePG-TO252,dimensionsinmm/inches Final Data Sheet 11 Rev.2.3,2016-06-13 500VCoolMOSCEPowerTransistor IPD50R2K0CE,IPU50R2K0CE TO251-3-21/-341/-345 DOCUMENT NO. Z8B00003330 DIM A A1 b b2 b4 c c2 D D1 E E1 e e1 N L L1 L2 MILLIMETERS MIN 2.16 0.90 0.64 0.65 4.95 0.46 0.46 5.97 5.04 6.35 4.70 INCHES MAX 2.41 1.14 0.89 1.15 5.50 0.60 0.89 6.22 5.77 6.73 5.21 MIN 0.085 0.035 0.025 0.026 0.195 0.018 0.018 0.235 0.198 0.250 0.185 2.29 4.57 3 8.89 0.85 0.89 MAX 0.095 0.045 0.035 0.045 0.217 0.024 0.035 0.245 0.227 0.265 0.205 0.090 0.180 3 9.65 2.29 1.37 0.350 0.033 0.035 SCALE 0 2.0 0 2.0 4mm EUROPEAN PROJECTION ISSUE DATE 31-08-2015 0.380 0.090 0.054 REVISION 04 Figure2OutlinePG-TO251,dimensionsinmm/inches Final Data Sheet 12 Rev.2.3,2016-06-13 500VCoolMOSCEPowerTransistor IPD50R2K0CE,IPU50R2K0CE 7AppendixA Table11RelatedLinks * IFXCoolMOSWebpage:www.infineon.com * IFXDesigntools:www.infineon.com Final Data Sheet 13 Rev.2.3,2016-06-13 500VCoolMOSCEPowerTransistor IPD50R2K0CE,IPU50R2K0CE RevisionHistory IPD50R2K0CE, IPU50R2K0CE Revision:2016-06-13,Rev.2.3 Previous Revision Revision Date Subjects (major changes since last revision) 2.0 2012-12-05 Release of final version 2.1 2013-07-16 update to Halogen free mold compound 2.2 2015-11-17 Updated to qualified for standard grade & updated package drawing 2.3 2016-06-13 Updated ID ratings, Zth, SOA and Pd curves TrademarksofInfineonTechnologiesAG AURIXTM,C166TM,CanPAKTM,CIPOSTM,CoolGaNTM,CoolMOSTM,CoolSETTM,CoolSiCTM,CORECONTROLTM,CROSSAVETM,DAVETM,DI-POLTM,DrBladeTM, EasyPIMTM,EconoBRIDGETM,EconoDUALTM,EconoPACKTM,EconoPIMTM,EiceDRIVERTM,eupecTM,FCOSTM,HITFETTM,HybridPACKTM,InfineonTM, ISOFACETM,IsoPACKTM,i-WaferTM,MIPAQTM,ModSTACKTM,my-dTM,NovalithICTM,OmniTuneTM,OPTIGATM,OptiMOSTM,ORIGATM,POWERCODETM, PRIMARIONTM,PrimePACKTM,PrimeSTACKTM,PROFETTM,PRO-SILTM,RASICTM,REAL3TM,ReverSaveTM,SatRICTM,SIEGETTM,SIPMOSTM,SmartLEWISTM, SOLIDFLASHTM,SPOCTM,TEMPFETTM,thinQTM,TRENCHSTOPTM,TriCoreTM. TrademarksupdatedAugust2015 OtherTrademarks Allreferencedproductorservicenamesandtrademarksarethepropertyoftheirrespectiveowners. WeListentoYourComments Anyinformationwithinthisdocumentthatyoufeeliswrong,unclearormissingatall?Yourfeedbackwillhelpustocontinuously improvethequalityofthisdocument.Pleasesendyourproposal(includingareferencetothisdocument)to: erratum@infineon.com Publishedby InfineonTechnologiesAG 81726Munchen,Germany (c)2016InfineonTechnologiesAG AllRightsReserved. LegalDisclaimer Theinformationgiveninthisdocumentshallinnoeventberegardedasaguaranteeofconditionsorcharacteristics.With respecttoanyexamplesorhintsgivenherein,anytypicalvaluesstatedhereinand/oranyinformationregardingtheapplication ofthedevice,InfineonTechnologiesherebydisclaimsanyandallwarrantiesandliabilitiesofanykind,includingwithout limitation,warrantiesofnon-infringementofintellectualpropertyrightsofanythirdparty. Information Forfurtherinformationontechnology,deliverytermsandconditionsandpricespleasecontactyournearestInfineon TechnologiesOffice(www.infineon.com). Warnings Duetotechnicalrequirements,componentsmaycontaindangeroussubstances.Forinformationonthetypesinquestion, pleasecontactthenearestInfineonTechnologiesOffice. TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofInfineonTechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.Lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.Iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered. Final Data Sheet 14 Rev.2.3,2016-06-13