PHR
Vishay Sfernice
Document Number: 53037 For technical questions, contact: sfer@vishay.com www.vishay.com
Revision: 06-Oct-08 63
ESCC ( ) 4001/023 Qualified High Precision (5 ppm, 0.01 %),
High Stability (0.02 %) Thin Film Chip Resistors
SPACE APPLICATIONS ONLY
These HiRel components are ideal for low noise and
precision applications, superior stability, low temperature
coefficient of resistance, and low voltage coefficient,
VISHAY SFERNICE’s precision thin film wraparound
resistors exceed requirements of MIL-PRF-55342G
characteristics Y (± 10 ppm/°C).
FEATURES
Load life stability at ± 70 °C for 2000 h:
0.15 % under Pn
Low temperature coefficient down to ± 10 ppm/°C
Very low noise (< 35 dB) and voltage coefficient
(< 0.01 ppm/V)
Resistance range: 50 Ω to 1 MΩ (depending on size)
Laser trimmed tolerances to ± 0.01 %
TCR in lot tracking 5 ppm/°C
Termination: Thin film technology
SnPb terminations over nickel barrier
ESCC 4001 issue 1 (generic spec)
ESCC 4001/023 issue 3 (detailed spec)
DIMENSIONS
Notes:
(1) Level C is our standard level. Serialization, which is compulsory on Level B, is very difficult to implement. For Level B, 13 extra pieces shall
be ordered for destructive TCR measurements.
(2) Tape and reel not available for level B
* Please see document “Vishay Green and Halogen-Free Definitions (5-2008)” http://www.vishay.com/doc?99902
CASE SIZE
DIMENSIONS in millimeters
A
MAX. TOL. + 0.64
MIN. TOL. - 0.13
B
MAX. TOL. + 0.26
MIN. TOL. - 0.13
C
MAX. TOL. + 0.64
MIN. TOL. - 0.13
D/E
MAX. TOL. + 0.13
MIN. TOL. - 0.13
0603 1.52 0.75 0.38 0.38
0805 1.91 1.27 0.38 0.38
1206 3.0 1.60 0.38 0.38
GLOBAL PART NUMBER INFORMATION
New Global Part Numbering: PHR0603Y1003BBTC0 (preferred part number format)
TYPE TCR OHMIC
VALUE TOLERANCE TERMINATION PACKAGING LEVEL (1)
PHR0603
PHR0805
PHR1206
Y = ± 10 ppm/°C
(Digit 1)
Z = ± 5 ppm/°C
(Digit 0)
E = ± 25 ppm/°C
(Digit 2)
The first three digits (2
digits are enough for
tolerance G and J) are
significant figures and
the last digit specifies the
number of zero to follow.
R designates decimal
point.
Example:
10R0 = 10 Ω
3901 = 3900 Ω
1004 = 1 MΩ
L = ± 0.01 %
P = ± 0.02 %
W = ± 0.05 %
B = ± 0.10 %
B: SnPb over
nickel barrier
G: Gold
(not qualified)
T: For tape
and reel (3)
(leave blank
for waffle
pack)
C
B
Historical Part Number example: PHR 06 03 Y 1003 BB T (will continue to be accepted)
A
D
D
C
E
E
B
PHR0603Y1003BBTC
PHR
Vishay Sfernice ESCC ( ) 4001/023 Qualified High Precision (5 ppm, 0.01 %),
High Stability (0.02 %) Thin Film Chip Resistors
www.vishay.com For technical questions, contact: sfer@vishay.com Document Number: 53037
64 Revision: 06-Oct-08
SPACE APPLICATIONS ONLY
Note:
(1) Variants 04, 05, 06, 07 and 08 are not qualified but can be produced “In accordance to ESCC 4001/023”
OPTIONS
LAT (Lot Acceptence Test):
To be ordered separately: LAT charges + LAT samples (refer to ESCC 4001 generic specification for details of testing)
LAT 1: 31 samples needed
LAT 2: 25 samples needed
LAT 3: 10 samples needed
Final inspection: To be ordered separately
Notes:
• Tape and reel not available for Level B
GLOBAL PART NUMBER INFORMATION
ESCC Code (1)
ESCC SPEC VARIANT LEVEL OHMIC
VALUE TOLERANCE TCR
4001023 0603 = 01 or 05
0805 = 02 or 06
1206 = 03 or 07
2010 = 04 or 08
Level C
Level B
The first three digits
are significant
figures and the last
digit specifies the
number of zero to
follow. R designates
decimal point.
Example:
10R0 = 10 Ω
3901 = 3900 Ω
1004 = 1 MΩ
L = ± 0.01 %
P = ± 0.02 %
W = ± 0.05 %
B = ± 0.10 %
Y = ± 10 ppm/°C
(Digit 1)
Z = ± 5 ppm/°C
(Digit 0)
E = ± 25 ppm/°C
(Digit 2)
STANDARD ELECTRICAL SPECIFICATIONS
VISHAY SFERNICE DESIGNATION PHR 0603 PHR 0805 PHR 1206
ESA specification applied ESCC 4001/023
Variant number 01 - 05 02 - 06 03 - 07
Power rating at + 70 °C (Pn) 0.1 W 0.125 W 0.25 W
Limiting element voltage (UL) 35 V 75 V 100 V
Ohmic value range Min. 50 Ω
Max. 200 kΩ
Min. 50 Ω
Max. 250 kΩ
Min. 50 Ω
Max. 1 MΩ
Insulation voltage (Ui) 70 V 150 V 200 V
Temperature coefficient ± 10 ppm/°C; ± 25 ppm/°C
± 5 ppm/°C (20 to 70 °C)
Tolerance ± 0.01 % (R > 250 Ω), ± 0.02 % (R > 100 Ω), ± 0.05 %, ± 0.1 %
Temperature range - 55 °C/+ 155 °C
Soldering temperature (Tsol) 260 °C, immersion 10 s
MECHANICAL SPECIFICATIONS
Substrate material Alumina
Technology Thin Film
Film Nickel Chromium with mineral passivation
Protection Epoxy and Silicon
Terminations
B type: SnPb over nickel barrier
for solder reflow
G type: Gold: not qualified
PACKAGING
Two types of packaging are available: waffle-pack and tape
and reel.
SIZE
NUMBER OF PIECES PER PACKAGE
TAPE
WIDTH
WAFFLE
PACK
2" × 2"
TAPE AND REEL
MIN. MAX.
0603 100 100 4000 8 mm0805
1206 140
400102301C1003B1
PHR
ESCC ( ) 4001/023 Qualified High Precision (5 ppm, 0.01 %),
High Stability (0.02 %) Thin Film Chip Resistors Vishay Sfernice
Document Number: 53037 For technical questions, contact: sfer@vishay.com www.vishay.com
Revision: 06-Oct-08 65
SPACE APPLICATIONS ONLY
POWER DERATING CURVE EXTENDED FEATURES
You may consult VISHAY SFERNICE for chip sizes, ohmic
values and tolerances outside of the qualified range.
0 70 155
0
100
125
250
500
1206
0603
0805
AMBIENT TEMPERATURE IN °C
REWOP DETAR %
PERFORMANCE
TEST CONDITIONS
REQUIREMENTS
TYPICAL
ESA/SCC 4001/023 MIL-PRF-55342G
Short time overload Umax. < 2 UL ± 0.05 % Rn + 0.05 Ω0.10 % ± 0.01 %
Rapid temperature
change
- 55 °C/+ 155 °C 5 cycles
CEI 66-2-14 Test Na ± 0.05 % Rn + 0.05 Ω0.1 % (for 100 cycles) ± 0.01 %
± 0.015 % (for 500 cycles)
Soldering
(thermal shock)
260 °C/10 s
CEI 68-2-20 A Test T6 (met. 1A) ± 0.05 % Rn + 0.05 Ω- ± 0.005 %
Terminal strength:
adhesion
bend strength of end
plated facing
CEI 115-1 Clause 4.32
CEI 115-1 Clause 4.33 ± 0.05 % Rn + 0.05 Ω- ± 0.01 %
Climatic sequence CEI 67-2-1/CEI 68-2-2
CEI 67-2-13/CEI 68-2-30 ± 0.10 % Rn + 0.05 Ω-± 0.02 %
Insulation resistance > 1 GΩ
Load life 2000 h Pn at + 70 °C
90’/30’ cycle ± 0.15 % Rn + 0.05 Ω0.5 % ± 0.02 %
Insulation resistance > 1 GΩ
High temperature
exposure
2000 h Pn at + 155 °C
CEI 68-2-20A Test B ± 0.15 % Rn + 0.05 Ω± 0.10 %
(duration 100 h)
± 0.05 %
Insulation resistance > 1 GΩ
U = 6.25 x Pn x Rn/2s
Document Number: 91000 www.vishay.com
Revision: 18-Jul-08 1
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