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August 2014
FDA16N50LDTU — N-Channel UniFETTM MOSFET
©2011 Fairchild Semiconductor Corporation
FDA16N50LDTU Rev. C0
www.fairchildsemi.com
1
FDA16N50LDTU
N-Channel UniFETTM MOSFET
500 V, 16.5 A, 380 mΩ
Features
•R
DS(on) = 310 mΩ (Typ.) @ VGS = 10 V, ID = 8.3 A
Low Gate Charge (Typ. 32 nC)
Low Crss (Typ. 20 pF)
100% Avalanche Tested
RoHS Compliant
Applications
•PDP TV
Uninterruptible Power Supply
Description
UniFETTM MOSFET is Fairchild Semiconductor’s high voltage
MOSFET family based on planar stripe and DMOS technology.
This MOSFET is tailored to reduce on-state resistance, and to
provide better switching performance and higher avalanche
energy strength. This device family is suitable for switching
power converter applications such as power factor correction
(PFC), flat panel display (FPD) TV power, ATX and electronic
lamp ballasts.
TO-3PN
GDS
G
S
D
MOSFET Maximum Ratings TC = 25oC unless otherwise noted.
Thermal Characteristics
Symbol Parameter FDA16N50LDTU Unit
VDSS Drain to Source Voltage 500 V
VGSS Gate to Source Voltage ±30 V
IDDrain Current - Continuous (TC = 25oC) 16.5 A
- Continuous (TC = 100oC) 9.9
IDM Drain Current - Pulsed (Note 1) 66 A
EAS Single Pulsed Avalanche Energy (Note 2) 780 mJ
IAR Avalanche Current (Note 1) 16.5 A
EAR Repetitive Avalanche Energy (Note 1) 20.5 mJ
dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns
PDPower Dissipation (TC = 25oC) 205 W
- Derate Above 25oC2.1W/
oC
TJ, TSTG Operating and Storage Temperature Range -55 to +150 oC
TLMaximum Lead Temperature for Soldering, 1/8” from Case for 5 Seconds 300 oC
Symbol Parameter FDA16N50LDTU Unit
RθJC Thermal Resistance, Junction to Case, Max. 0.6 oC/W
RθJA Thermal Resistance, Junction to Ambient, Max. 40
(L-forming)
FDA16N50LDTU — N-Channel UniFETTM MOSFET
©2011 Fairchild Semiconductor Corporation
FDA16N50LDTU Rev. C0
www.fairchildsemi.com
2
Package Marking and Ordering Information
Electrical Characteristics TC = 25oC unless otherwise noted.
Off Characteristics
On Characteristics
Dynamic Characteristics
Switching Characteristics
Drain-Source Diode Characteristics
Part Number Top Mark Package Packing Method Reel Size Tape Width Quantity
FDA16N50LDTU FDA16N50 TO-3PN
(L-forming) Tube N/A N/A 30 units
Symbol Parameter Test Conditions Min. Typ. Max. Unit
BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V, TJ = 25oC 500 - - V
ΔBVDSS
/ ΔTJ
Breakdown Voltage Temperature
Coefficient ID = 250 μA, Referenced to 25oC - 0.50 - V/oC
IDSS Zero Gate Voltage Drain Current VDS = 500 V, VGS = 0 V - - 20 μA
VDS = 500 V, TC = 125oC - - 200
IGSS Gate to Body Leakage Current VGS = ±30 V, VDS = 0 V - - ±100 nA
VGS(th) Gate Threshold Voltage VGS = VDS, ID = 250 μA3.0-5.0V
RDS(on) Static Drain to Source On Resistance VGS = 10 V, ID = 8.3 A - 0.31 0.38 Ω
gFS Forward Transconductance VDS = 40 V, ID = 8.3 A - 23 - S
Ciss Input Capacitance VDS = 25 V, VGS = 0 V,
f = 1 MHz
- 1495 1945 pF
Coss Output Capacitance - 235 310 pF
Crss Reverse Transfer Capacitance - 20 30 pF
Qg(tot) Total Gate Charge at 10V VDS = 400 V, ID = 16 A,
VGS = 10 V
(Note 4)
-3245nC
Qgs Gate to Source Gate Charge - 8.5 - nC
Qgd Gate to Drain “Miller” Charge - 14 - nC
td(on) Turn-On Delay Time
VDD = 250 V, ID = 16 A,
VGS = 10 V, RG = 25 Ω
(Note 4)
-4090ns
trTurn-On Rise Time - 150 310 ns
td(off) Turn-Off Delay Time - 65 140 ns
tfTurn-Off Fall Time - 80 170 ns
ISMaximum Continuous Drain to Source Diode Forward Current - - 16.5 A
ISM Maximum Pulsed Drain to Source Diode Forward Current - - 66 A
VSD Drain to Source Diode Forward Voltage VGS = 0 V, ISD = 16.5 A - - 1.4 V
trr Reverse Recovery Time VGS = 0 V, ISD = 16 A,
dIF/dt = 100 A/μs
- 490 - ns
Qrr Reverse Recovery Charge - 5.0 - μC
Notes:
1. Repetitive rating: pulse-width limited by maximum junction temperature.
2. L = 5.1 mH, IAS = 16.5 A, VDD = 50 V, RG = 25 Ω, starting TJ = 25°C.
3. ISD 16.5 A, di/dt 200 A/μs, VDD BVDSS, starting TJ = 25°C.
4. Essentially independent of operating temperature typical Characteristics
FDA16N50LDTU — N-Channel UniFETTM MOSFET
©2011 Fairchild Semiconductor Corporation
FDA16N50LDTU Rev. C0
www.fairchildsemi.com
3
Typical Performance Characteristics
Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics
Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage
Drain Current and Gate Voltage Variation vs. Source Current
and Temperatue
Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics
10-1 100101
10-1
100
101
102 VGS
Top : 15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
Bottom : 5.5 V
* Notes :
1. 250μs Pulse Test
2. TC = 25oC
ID, Drain Current [A]
VDS, Drain-Source Voltage [V]
24681012
100
101150oC
25oC
-55oC
* Notes :
1. VDS = 40V
2. 250μs Pulse Test
ID, Drain Current [A]
VGS, Gate-Source Voltage [V]
0 5 10 15 20 25 30 35 40
0.2
0.3
0.4
0.5
0.6
VGS = 20V
VGS = 10V
* Note : TJ = 25oC
RDS(ON) [Ω], Drain-Source On-Resistance
ID, Drain Current [A]
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
100
101
150oC
* Notes :
1. VGS = 0V
2. 250μs Pulse Test
25oC
IDR, Reverse Drain Current [A]
VSD, Source-Drain voltage [V]
10-1 100101
0
1000
2000
3000
4000
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
* Note ;
1. VGS = 0 V
2. f = 1 MHz
Crss
Coss
Ciss
Capacitances [pF]
VDS, Drain-Source Voltage [V]
0 10203040
0
2
4
6
8
10
12
VDS = 250V
VDS = 100V
VDS = 400V
* Note : ID = 16A
VGS, Gate-Source Voltage [V]
QG, Total Gate Charge [nC]
FDA16N50LDTU — N-Channel UniFETTM MOSFET
©2011 Fairchild Semiconductor Corporation
FDA16N50LDTU Rev. C0
www.fairchildsemi.com
4
Typical Performance Characteristics (Continued)
Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation
vs. Temperature vs. Temperature
Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs. Case Temperature
Figure 11. Transient Thermal Response Curve
-100 -50 0 50 100 150 200
0.0
0.5
1.0
1.5
2.0
2.5
3.0
* Notes :
1. VGS = 10 V
2. ID = 8.3 A
RDS(ON), (Normalized)
Drain-Source On-Resistance
TJ, Junction Temperature [oC]
-100 -50 0 50 100 150 200
0.8
0.9
1.0
1.1
1.2
* Notes :
1. VGS = 0 V
2. ID
= 250 μA
BVDSS, (Normalized)
Drain-Source Breakdown Voltage
TJ, Junction Temperature [oC]
25 50 75 100 125 150
0
5
10
15
20
ID, Drain Current [A]
TC, Case Temperature [oC]
10-5 10-4 10-3 10-2 10-1 100101
10-2
10-1
100
* Notes :
1. ZθJC(t) = 0.6 oC/W Max.
2. Duty F a ctor, D =t1/t2
3. TJM - TC = PDM * ZθJC(t)
single pulse
D=0.5
0.02
0.2
0.05
0.1
0.01
ZθJC(t), Thermal Response
t1, Square W ave Pulse Duration [sec]
t
1
P
DM
t
2
t1, Rectangular Pulse Duration [sec]
ZθJC(t), Thermal Response [oC/W]
FDA16N50LDTU — N-Channel UniFETTM MOSFET
©2011 Fairchild Semiconductor Corporation
FDA16N50LDTU Rev. C0
www.fairchildsemi.com
5
EAS =LI
AS2
----
2
1--------------------
BVDSS -V
DD
BVDSS
VDD
VDS
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
10V DUT
RG
L
ID
t p
EAS =LI
AS2
----
2
1
EAS =LI
AS2
----
2
1
----
2
1--------------------
BVDSS -V
DD
BVDSS
VDD
VDS
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
10V DUT
RG
LL
ID
ID
t p
VGS
VGS
Figure 12. Gate Charge Test Circuit & Waveform
Figure 13. Resistive Switching Test Circuit & Waveforms
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms
VGS
VDS
10%
90%
td(on) tr
ton toff
td(off) tf
VDD
10V
VDS
RL
DUT
RG
VGS
VGS
VDS
10%
90%
td(on) tr
ton toff
td(off) tf
VDD
10V
VDS
RL
DUT
RG
VGS
VGS
IG = const.
FDA16N50LDTU — N-Channel UniFETTM MOSFET
©2011 Fairchild Semiconductor Corporation
FDA16N50LDTU Rev. C0
www.fairchildsemi.com
6
Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
VDS
+
_
Driver
RGSame Type
as DUT
VGS dv/dt controlled by RG
•I
SD controlled by pulse period
VDD
L
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pulse Period
--------------------------
DUT
VDS
+
_
Driver
RGSame Type
as DUT
VGS dv/dt controlled by RG
•I
SD controlled by pulse period
VDD
LL
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pulse Period
--------------------------
D = Gate Pulse Width
Gate Pulse Period
--------------------------
R
0.50
16.20
15.40
2.20
1.80 3.20
2.80
1.20
0.80
5.45 5.45
1.85
5.20
4.80
20.10
19.70 18.90
18.50
3.70
3.30
0.55
M
1.65
1.45
0.75
0.55
5.00
4.60
R
0.60
E
9.25
8.75
E
4.45
3.95
E
5.25
4.75
13.80
13.40
16.96
16.56
3.30
3.10
7.20
6.80
NOTES: UNLESS OTHERWISE SPECIFIED
A) PACKAGE REFERENCE EIAJ SC-65
PACKAGING STANDARD.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSION AND TOLERANCING PER
ASME14.5-2009.
D) DIMENSIONS ARE EXCLUSSIVE OF BURRS,
MOLD FLASH, AND TIE BAR EXTRUSSIONS.
E
DOES NOT COMPLY EIAJ SC-65.
F) DRAWING FILE NAME: TO3PN03CREV1.
G) FAIRCHILD SEMICONDUCTOR.
1 3
www.onsemi.com
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ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
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