P-Channel JFET Switch
J174 – J177 / SST174 – SST177
FEATURES
••Low I nsertion Lo ss
••No Of fset or Error Gener at ed By Cl ose d Sw itch
-Purely R e s is ti v e
-High Isolation Res istance From Driver
••Sho rt Sam ple an d Hol d Ape rtur e T ime
••Fast Switching
APPLICATIONS
••An a lo g Sw it ch e s
••Choppers
••Commutators
ABSOLUTE M AXIM UM R A T INGS
(TA = 25oC unless o th erw ise specified)
Gate- Dr ain or Gate -So urce Voltage . . . . . . . . . . . . . . . . . 30V
Gate Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA
Stor age Temper at ure R a nge. . . . . . . . . . . . . -55oC t o +150oC
Oper at ing Temper atur e Ra nge . . . . . . . . . . . -55oC to +135oC
Lead Tem peratu re (So ld er ing, 10se c). . . . . . . . . . . . . . 300oC
Power Dissipat ion . . . . . . . . . . . . . . . . . . . . . . . . . . . . 350mW
Derate above 25oC . . . . . . . . . . . . . . . . . . . . . . . 3.3mW/oC
NOTE: Str esses above those listed under "Absolute Maximum
Ratings " may cause permanent damage to the device. These are
stress ratings only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of the specifications is not implied. Exposure to absolute maximum
rating con ditions for extended per i ods may affect device reliability.
ORDERING INFORMATION
Part Package Temperat ure Range
J174- J177 Plastic TO-92 -55oC to +135oC
SST174-SST177 Plastic SOT-23 -55oC to +135oC
For Sor ted Chips in Car rie rs see 2N511 4 series.
LLC
PIN CONFIGUR ATI O N
TO-92
S
G
D
SOT-23
G
S
D
PRODUCT MARKING (SOT-23)
SST174 P04
SST175 P05
SST176 P06
SST177 P07
5508
CALOGIC LLC,237 WHITNEY PLACE, FREMONT, CA 94539, 510-656-2900 PHONE, 510-651-1076 FAX DS040 REV A
LLC
ELECTRICA L CHARACTERI STIC S (TA = 2 5oC unle ss otherwise sp ecif ie d)
SYMBOL PARAMETER J174 J175 J176 J177 UNITS TEST CONDITIONS
MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX
IGSS Gate Reverse
Cu rrent
(Note 1) 1111nA
VDS = 0, VGS = 20V
VGS(off) Gate Source
Cutoff Voltage 5 10 3 6 1 4 0.8 2.25
V
VDS = -15V, ID = -10nA
BVGSS Ga te Sour ce
Breakdown
Voltage 30 30 30 30 VDS = 0, IG = 1µA
IDSS
Drain
Saturation
Current
(Note 2)
-20 -135 -7 -70 -2 -35 -1.5 -20 mA VDS = -15V, VGS = 0
ID(off) Drai n Cutof f
Current
(Note 1) -1 -1 -1 -1 nA VDS = -15V, VGS = 10V
rDS(on) Drain-Source
ON Resistance 85 125 250 300 ΩVGS = 0 , VDS = -0.1V
Cdg(off) Drain-Gate
OFF
Capacitance 5.5 5.5 5.5 5.5
pF
VDS = 0,
VGS = 10V f = 1MHz (Note 3)
Csg(off) Source-Gate
OFF
Capacitance 5.5 5.5 5.5 5.5
Cdg(on)
+ Csg(on)
Drai n-Gate
Plus Source
Ga te ON
Capacitance
32 32 32 32 VDS = VGS = 0
td(on) Turn On Delay
Time 2 5 15 20
ns
Switc hing Time Test Cond itions
(Note 3) J174 J175 J176 J177
VDD -10V -6V -6V -6V
VGS(off) 12V8V3V3V
RL560Ω12kΩ5.6kΩ10kΩ
VGS(on) 0V 0V 0V 0V
trRise Time 5 102025
td(off) Turn Off Delay
Time 5 101520
tfFall Time 10 20 20 25
NOTES: 1. A pproxi mately doubles for every 10oC increas e i n T A.
2. Pulse test duration -300µs ; duty cycle ≤3%.
3. For design reference only, not 100% tested.
CALOGIC LLC, 237 WHITNEY PLACE, FREMONT, CA 94539, 510-656-2900 PHONE, 510-651-1076 FAX DS040 REV A
