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General Description
The AAT2513 is a high efficiency dual synchronous
step-down converter for applications where power
efficiency, thermal performance and solution size
are critical. Input voltage ranges from 2.7V to 5.5V,
making it ideal for systems powered by single-cell
lithium-ion/polymer batteries.
Each converter is capable of 600mA output current
and has its own enable pin. Efficiency of the con-
verters is optimized over full load range. Total no
load quiescent current is 60µA, allowing high effi-
ciency even under light load conditions.
The integrated power switches are controlled by
pulse width modulation (PWM) with a 1.7MHz typi-
cal switching frequency at full load, which minimizes
the size of external components. Fixed frequency,
low noise operation can be forced by a logic signal
on the MODE pin. Furthermore, an external clock
can be used to synchronize the switching frequency
of both converters.
A phase shift pin (PS) is available to operate the
two converters 180° out of phase at heavy load to
achieve low input ripple.
The AAT2513 is available in a Pb-free, thermally
enhanced 16-pin QFN33 package and is specified
for operation over the -40°C to +85°C temperature
range.
Features
•V
IN Range: 2.7V to 5.5V
• Output Current:
— Channel 1: 600mA
— Channel 2: 600mA
• 96% Efficient Step-Down Converter
• Low No Load Quiescent Current
— 60µA Total for Both Converters
• Integrated Power Switches
• 100% Duty Cycle
• 1.7MHz Switching Frequency
• Optional Fixed Frequency or External SYNC
• Logic Selectable 180° Phase Shift Between
the Two Converters
• Current Limit Protection
• Automatic Soft-Start
• Over-Temperature Protection
• QFN33-16 Package
• -40°C to +85°C Temperature Range
Applications
• Cellular Phones / Smart Phones
• Digital Cameras
• Handheld Instruments
• Micro Hard Disc Drives
• Microprocessor / DSP Core / IO Power
• PDAs and Handheld Computers
AAT2513
Dual 600mA Step-Down
Converter with Synchronization
Typical Application
Input:
2.7V to 5.5V VIN2 LX1
CIN
1μF
C2
4.7μF
AAT2513
2μH
L1
R1
R2
R3
R4
L2
LX2
FB1
FB2
VOUT2
2μH
C1
4.7μF
PGND1AGND
VCC
EN1
EN2
MODE/SYNC
PS
PGND2
VIN1 VOUT1
2513.2007.04.1.1 1
SystemPower™
Pin Descriptions
Pin Configuration
QFN33-16
(Top View)
MODE/SYNC
VCC
EN1
VIN2
PS
A
GND
FB2
1
2
3
4
N/C
VIN1
LX1
16
15
14
13
5
6
7
8
12
11
10
9
PGND1
EN2
PGND2
LX2
N/C
FB1
Pin # Symbol Function
1 PS Phase shift pin. Logic high enables the PS feature which forces the two converters
to operate 180° out of phase when both are in forced PWM mode.
2 AGND Analog ground. Return the feedback resistive divider to this ground. See section on
PCB layout guidelines and evaluation board layout diagram.
4, 3 FB1, FB2 Feedback input pins. An external resistive divider ties to each and programs the
respective output voltage to the desired value.
5, 16 VIN1, VIN2 Input supply voltage pins. Must be closely decoupled to the respective PGND.
6, 15 N/C Not connected
7, 14 LX1, LX2 Output switching nodes that connect to the respective output inductor.
8, 13 PGND1, PGND2 Main power ground return. Connect to the input and output capacitor return. See
section on PCB layout guidelines and evaluation board layout diagram.
10, 9 EN1, EN2 Converter enable input pins. A logic high enables the converter channel. A logic low
forces the channel into shutdown mode, reducing the channel supply current to less
than 1µA. This pin should not be left floating. When not actively controlled, this pin
can be tied directly to VIN and/or VCC.
11 VCC Control circuit power supply. Connect to the higher voltage of VIN1 or VIN2.
12 MODE/SYNC Logic low enables automatic light load mode for optimized efficiency throughout the
entire load range. Logic high forces low noise PWM operation under all operating
conditions. Connect to an external clock for synchronization (PWM only).
EP Exposed paddle (bottom). Use properly sized vias for thermal coupling to the
ground plane. See section on PCB layout guidelines.
AAT2513
Dual 600mA Step-Down
Converter with Synchronization
22513.2007.04.1.1
Absolute Maximum Ratings1
TA= 25°C unless otherwise noted.
Thermal Information
Symbol Description Value Units
θJA Thermal Resistance 50 °C/W
PDMaximum Power Dissipation 2 W
Symbol Description Value Units
VIN1/2 Input Voltage -0.3 to 6.0 V
GND, PGND1/2 Ground Pins -0.3 to +0.3 V
EN1/2, SYNC, Maximum Rating -0.3 to VCC + 0.3 V
LX1/2, FB1/2, PS
TJOperating Temperature Range -40 to 150 °C
TSStorage Temperature Range -65 to 150 °C
TLEAD Maximum Soldering Temperature (at leads, 10 sec) 300 °C
AAT2513
Dual 600mA Step-Down
Converter with Synchronization
2513.2007.04.1.1 3
1. Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. Functional operation at condi-
tions other than the operating conditions specified is not implied. Only one Absolute Maximum rating should be applied at any one time.
Electrical Characteristics1
VIN = VCC = 3.6V, TA= -40°C to +85°C, unless noted otherwise. Typical values are at TA= 25°C.
Symbol Description Conditions Min Typ Max Units
Power Supply
VCC, Input Voltage 2.7 5.5 V
VIN1, VIN2
UVLO Under-Voltage Lockout VCC Rising 2.7 V
VCC Falling 2.35
IQQuiescent Current VEN1 = VEN2 = VCC, No Load 60 120 µA
ISHDN Shutdown Current EN1 = EN2 = GND 1.0 µA
Each Converter
VFB Feedback Voltage Tolerance IOUT = 0 to 600mA, VIN = 2.9 to 5.5V -3.0 -3.0 %
IOUT = 0 to 450mA, VIN = 2.7 to 5.5V
VOUT Output Voltage Range 0.6 VIN V
ILX_LEAK
LX Reverse Leakage Current VIN Open, VLX = 5.5V, EN = GND 1.0 µA
(Fixed)
ILX_LEAK LX Leakage Current VIN = 5.5V, VLX = 0 to VIN 1.0 µA
IFB Feedback Leakage VFB = 1.0V 0.2 µA
ILIM P-Channel Current Limit Each Converter 1.0 A
RDS(ON)H High Side Switch On Resistance 0.45 Ω
RDS(ON)L Low Side Switch On Resistance 0.40 Ω
ΔVOUT/Load Regulation ILOAD = 0 to 600 mA 0.002 %/mA
VOUT/ΔIOUT
ΔVOUT/Line Regulation VIN = 2.7 to 5.5V, ILOAD = 100 mA 0.125 %/V
VOUT/ΔVIN
VFB
Feedback Threshold Voltage No Load, TA= 25°C 0.591 0.600 0.609 V
Accuracy
FOSC Oscillator Frequency 1.7 MHz
TSStart-Up Time From Enable to Output Regulation; 150 µs
Both Channels
Logic
TSD Over-Temperature Shutdown 140 °C
Threshold
THYS Over-Temperature Shutdown 15 °C
Hysteresis
VIL EN, MODE/SYNC, PS Logic 0.6 V
Low Threshold
VIH EN, MODE/SYNC, PS Logic 1.4 V
High Threshold
IEN,
IMODE/SYNC, Logic Input Current VIN = VFB = 5.5V -1.0 1.0 µA
IPS
AAT2513
Dual 600mA Step-Down
Converter with Synchronization
42513.2007.04.1.1
1. The AAT2513 guaranteed to meet performance specifications over the -40°C to +85°C operating temperature range and is assured
by design, characterization and correlation with statistical process controls.
Electrical Characteristics
Efficiency vs. Load
(V
OUT
= 1.8V; L = 2.2µH; LL Mode)
Output Current (mA)
Efficiency (%)
20
30
40
50
60
70
80
90
100
0.1 1 10 100 1000
V
IN
= 2.7V
V
IN
= 4.2V
V
IN
= 3.6V
V
IN
= 5.0V
DC Regulation
(V
OUT
= 1.8V; L = 2.2µH; LL Mode)
Output Current (mA)
Output Error (%)
-0.8
-1.0
-0.6
-0.4
-0.2
0.2
0.0
0.4
0.6
0.8
1.0
0.1 1 10 100 1000
V
IN
= 5.0V
V
IN
= 4.2V
V
IN
= 3.3V
Efficiency vs. Load
(V
OUT
= 2.5V; L = 3.3µH; LL Mode)
Output Current (mA)
Efficiency (%)
30
40
50
60
70
80
90
100
0.1 1 10 100 1000
V
IN
= 2.7V
V
IN
= 4.2V
V
IN
= 3.6V
V
IN
= 5.0V
DC Regulation
(V
IN
= 3.3V to 5.5V; V
OUT
= 2.5V; L = 3.3µH; LL Mode)
Output Current (mA)
Output Error (%)
-2.0
-1.5
-1.0
-0.5
0.0
0.5
1.0
1.5
2.0
0.1 1 10 100 1000
Efficiency vs. Load
(V
OUT
= 3.3V; L = 4.7µH; LL Mode)
Output Current (mA)
Efficiency (%)
30
40
50
60
70
80
90
100
0.1 1 10 100 100
0
V
IN
= 3.6V
V
IN
= 4.2V
V
IN
= 5.0V
DC Regulation
(V
IN
= 5.0V; V
OUT
= 3.3V; L = 4.7µH; LL Mode)
Output Current (mA)
Output Error (%)
-1.00
-0.75
-0.50
-0.25
0.00
0.25
0.50
0.75
1.00
0.1 1 10 100 1000
AAT2513
Dual 600mA Step-Down
Converter with Synchronization
2513.2007.04.1.1 5
Electrical Characteristics
Switching Frequency vs. Temperature
Temperature (°
°
C)
Switching Frequency (MHz)
1.55
1.60
1.65
1.70
1.75
1.80
1.85
1.90
-40 -20 0 20 40 60 80 100 120
V
IN
= 4.2V
V
IN
= 3.6V
Switching Frequency vs. Input Voltage
(I
OUT
= 600mA; 25°C)
Input Voltage (V)
Frequency Variation (%)
-4
-3
-2
-1
0
1
2
3
4
2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5
V
IN
= 2.5V
V
OUT
= 1.8V
V
OUT
= 1.5V
V
IN
= 3.3V
Efficiency vs. Load
(V
OUT
= 1.5V; L = 2.2µH; LL Mode)
Output Current (mA)
Efficiency (%)
20
30
40
50
60
70
80
90
100
0.1 1 10 100 1000
V
IN
= 2.7V
V
IN
= 4.2V
V
IN
= 3.6V
DC Regulation
(V
OUT
= 1.5V; L = 2.2µH; LL Mode)
Output Current (mA)
Output Error (%)
-1.0
-0.8
-0.6
-0.4
-0.2
0.0
0.2
0.4
0.6
0.8
1.0
0.1 1 10 100 1000
V
IN
= 3.3V
V
IN
= 4.2V
V
IN
= 5.0V
AAT2513
Dual 600mA Step-Down
Converter with Synchronization
62513.2007.04.1.1
Electrical Characteristics
Load Transient
(1mA to 450mA; V
IN
= 3.6V; V
OUT
= 1.8V; C
OUT
= 4.7µF)
Time (20µs/div)
Output Voltage (top) (V)
Load Current (middle) (A)
Inductor Current (bottom) (A)
1.8
2.0
0
0.5
450mA
1mA
0
Soft Start
(V
IN
= 3.6V; V
OUT
= 1.8V; I
OUT
= 600mA)
Time (50µs/div)
Enable Voltage (top) (V)
Output Voltage (middle) (V)
Inductor Current (bottom) (A)
0
1
2
3
4
-0.2
0.0
0.2
0.4
0.6
Ω
V
IH
vs. Input Voltage
Input Voltage (V)
V
IH
(V)
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.
0
25°C
85°C
-40°C
AAT2513
Dual 600mA Step-Down
Converter with Synchronization
2513.2007.04.1.1 7
Electrical Characteristics
AAT2513
Dual 600mA Step-Down
Converter with Synchronization
82513.2007.04.1.1
Electrical Characteristics
Input Ripple
(C
IN
= 2 x 10µF; V
IN
= 3.6V; V
OUT1
= 1.8V; V
OUT2
= 2.5V;
I
OUT1,2
= 600mA; 0°
°
Phase Shift; PS = Low)
Time (0.2µs/div)
Input Voltage (top) (V)
Switching Voltage
LX1,LX2 (V)
3.59
3.60
3.61
3.62
-2
0
2
4
LX1
LX2
°
Output Voltage Ripple
(V
OUT
= 1.8V; V
IN
= 3.6V; Load = 1mA)
Time (10µs/div)
Output Voltage (top) (V)
Inductor Current (bottom) (A)
1.75
1.80
1.85
-0.1
0.0
0.1
0.2
Line Regulation
(V
OUT
= 1.5V; L = 2.2µH)
Input Voltage (V)
Accuracy (%)
-2.0
-1.5
-1.0
-0.5
0.0
0.5
1.0
1.5
2.0
2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
I
OUT
= 400mA
I
OUT
= 0.1mA to 100mA
AAT2513
Dual 600mA Step-Down
Converter with Synchronization
2513.2007.04.1.1 9
AAT2513
Dual 600mA Step-Down
Converter with Synchronization
10 2513.2007.04.1.1
Functional Description
The AAT2513 is a peak current mode pulse width
modulated (PWM) converter with internal compen-
sation. Each channel has independent input,
enable, feedback, and ground pins with a 1.7MHz
clock. Both converters operate in either a fixed fre-
quency (PWM) mode or a more efficient light load
(LL) mode. A phase shift pin programs the convert-
ers to operate in phase or 180° out of phase. The
converter can also be synchronized to an external
clock during PWM operation.
The input voltage range is 2.7V to 5.5V. An exter-
nal resistive divider as shown in Figure 1 programs
the output voltage up to the input voltage. The con-
verter MOSFET power stage is sized for 600mA
load capability with up to 96% efficiency. Light load
efficiency is up to 90% at a 1mA load.
Soft Start / Enable
The AAT2513 soft start control prevents output volt-
age overshoot and limits inrush current when either
the input power or the enable input is applied.
When pulled low, the enable input forces the con-
verter into a low power non-switching state with a
bias current of less than 1µA.
Low Dropout Operation
For conditions where the input voltage drops to the
output voltage level, the converter duty cycle
increases to 100%. As the converter approaches
the 100% duty cycle, the minimum off time initially
forces the high side on time to exceed the 1.7MHz
clock cycle and reduce the effective switching fre-
quency. Once the input drops below the level
where the converter can regulate the output, the
high side P-channel MOSFET is enabled continu-
ously for 100% duty cycle. At 100% duty cycle the
output voltage tracks the input voltage minus the
I*R drop of the high side P-channel MOSFET.
Functional Block Diagram
EN1
LX1
DH
DL
PGND1
VIN1FB1
EN2
LX2
DH
DL
PGND2
Comp.
Control
Logic
Control
Logic
VIN2
FB
AGND
Voltage
Reference
Voltage
Reference
Comp
Oscillator
PS
MODE/SYNC
VCC
Logic
Logic
Err.
Amp.
Err.
Amp.
AAT2513
Dual 600mA Step-Down
Converter with Synchronization
2513.2007.04.1.1 11
Figure 1: AAT2513 Typical Schematic.
2.2uH
L1
4.7μF
C1
1.8V
118k
R1
2.2μH
L2
2.5V
R4
59.0k
R2
59.0k
10μF
C3
V
IN
187k
R3
FB1
4
EN1
10
LX1
7
PGND2
13
LX2
14
PGND1
8
AGND
2
VIN1
5
VIN2
16
PS
1
FB2
3
EN2
9
VCC
11
MODE/SYNC
12
N/C
6
N/C
15
AAT2513
U1
C2
4.7μF
Low Supply UVLO
Under-voltage lockout (UVLO) guarantees suffi-
cient VIN bias and proper operation of all internal
circuitry prior to activation.
Fault Protection
For overload conditions, the peak inductor current
is limited. Thermal protection disables the convert-
er when the internal dissipation or ambient temper-
ature becomes excessive. The over-temperature
threshold for the junction temperature is 140°C with
15°C of hysteresis.
PWM/LL Operation
For fixed frequency, with minimum ripple under
light load conditions, the MODE/SYNC pin should
be tied to a logic high. For more efficient operation
under light load conditions the MODE/SYNC pin
should be tied to a logic low level.
Clock Phase and Frequency
A logic high on the PS pin while in PWM mode
forces both converters to operate 180° out of phase
thus reducing the input ripple by roughly half. A
logic low on the PS pin synchronizes both convert-
ers in phase.
Applications Information
Inductor Selection
The step down converter uses peak current mode
control with slope compensation to maintain stability
for duty cycles greater than 50%. The output induc-
tor value must be selected so the inductor current
down slope meets the internal slope compensation
requirements. The internal slope compensation for
the adjustable and low voltage fixed versions of the
AAT2513 is 0.6A/µsec. This equates to a slope com-
pensation that is 75% of the inductor current down
slope for a 1.8V output and 2.2µH inductor.
In this case a standard 3.3µH value is selected.
0.75 ⋅ V
O
L = =
≈
1.2 ⋅ V
O
= 1.2 2.5V = 3.1µH
m
0.75V ⋅ V
O
0.6
µs
A
µs
A
µs
A
0.75 ⋅ V
O
m = = = 0.6
L
0.75 ⋅ 1.8V
2.2µH
A
µsec
AAT2513
Dual 600mA Step-Down
Converter with Synchronization
12 2513.2007.04.1.1
Table 1 displays the suggested inductor values for
the AAT2513.
Manufacturer's specifications list both the inductor
DC current rating, which is a thermal limitation, and
the peak current rating, which is determined by the
inductor's saturation characteristics. The inductor
should not show any appreciable saturation under
all normal load conditions. Some inductors may
meet the peak and average current ratings yet
result in excessive losses due to a high DCR.
Always consider the losses associated with the
DCR and its effect on the total converter efficiency
when selecting an inductor.
The 2.2uH CDRH2D11 series inductor selected
from Sumida has a 98mΩDCR and a 1.27A DC
current rating. At full load the inductor DC loss is
35mW which corresponds to a 3.2% loss in effi-
ciency for a 600mA, 1.8V output.
Input Capacitor
A key feature of the AAT2513 is that the funda-
mental switching frequency ripple at the input can
be reduced by operating the two converters 180°
out of phase. This reduces the input ripple by
roughly half, reducing the required input capaci-
tance. An X5R ceramic input capacitor as small as
1µF is often sufficient. To estimate the required
input capacitor size, determine the acceptable
input ripple level (VPP) and solve for C. The calcu-
lated value varies with input voltage and is a maxi-
mum when VIN is double the output voltage.
This equation provides an estimate for the input
capacitor required for a single channel.
The equation below solves for the input capacitor
size for both channels. It makes the worst case
assumption that both converters are operating at
50% duty cycle with in phase synchronization.
Because the AAT2513 channels will generally
operate at different duty cycles the actual ripple will
vary and be less than the ripple (VPP) used to solve
for the input capacitor in the above equation.
Always examine the ceramic capacitor DC voltage
coefficient characteristics when selecting the prop-
er value. For example, the capacitance of a 10µF
6.3V X5R ceramic capacitor with 5V DC applied is
actually about 6µF.
The maximum input capacitor RMS current is:
The input capacitor RMS ripple current varies with
the input and output voltage and will always be less
than or equal to half of the total DC load current of
both converters combined.
I
O1(MAX)
+ I
O2(MAX)
RMS(MAX)
I2
=
⎛⎞
I
RMS
= I
O1
· · 1
-
+ I
O2
·
· 1 -
⎝⎠
V
O1
V
IN
V
O1
V
IN
⎛⎞
⎝⎠
V
O2
V
IN
V
O2
V
IN
⎛⎞
⎝⎠
⎛⎞
⎝⎠
C
IN
= 1
⎛⎞
- ESR
·
4
·
F
S
⎝⎠
V
PP
I
O1
+
I
O2
⎛⎞
⋅
1
-
⎝⎠
V
O
V
IN
C
IN
=
V
O
V
IN
⎛⎞
- ESR
⋅
F
S
⎝⎠
V
PP
I
O
Table 1: Inductor Values.
Configuration Output Voltage Inductor Slope Compensation
0.6V adjustable 0.6V-2.0V 2.2µH
with external 2.5V 3.3µH 0.6A/µs
resistive divider 3.3V 4.7µH
This equation also makes the worst-case assump-
tion that both converters are operating at 50% duty
cycle synchronized.
The term appears in both the input
voltage ripple and input capacitor RMS current
equations. It is at maximum when VOis twice VIN.
This is why the input voltage ripple and the input
capacitor RMS current ripple are a maximum at
50% duty cycle.
The input capacitor provides a low impedance loop
for the edges of pulsed current drawn by the
AAT2513. Low ESR/ESL X7R and X5R ceramic
capacitors are ideal for this function. To minimize
the stray inductance, the capacitor should be
placed as close as possible to the IC. This keeps
the high frequency content of the input current
localized, minimizing EMI and input voltage ripple.
The proper placement of the input capacitor (C3 and
C9) can be seen in the evaluation board layout in
Figures 3 and 4. Since decoupling must be as close
to the input pins as possible it is necessary to use
two decoupling capacitors, one for each converter.
A Laboratory test set-up typically consists of two
long wires running from the bench power supply to
the evaluation board input voltage pins. The induc-
tance of these wires along with the low ESR ceram-
ic input capacitor can create a high Q network that
may effect the converter performance.
This problem often becomes apparent in the form
of excessive ringing in the output voltage during
load transients. Errors in the loop phase and gain
measurements can also result.
Since the inductance of a short printed circuit board
trace feeding the input voltage is significantly lower
than the power leads from the bench power supply,
most applications do not exhibit this problem.
In applications where the input power source lead
inductance cannot be reduced to a level that does
not effect the converter performance, a high ESR
tantalum or aluminum electrolytic (C10 of Figure 2)
should be placed in parallel with the low ESR, ESL
bypass ceramic. This dampens the high Q network
and stabilizes the system.
Output Capacitor
The output capacitor limits the output ripple and
provides holdup during large load transitions. A
4.7µF to 10µF X5R or X7R ceramic capacitor typi-
cally provides sufficient bulk capacitance to stabi-
lize the output during large load transitions and has
the ESR and ESL characteristics necessary for low
output ripple.
The output voltage droop due to a load transient is
dominated by the capacitance of the ceramic out-
put capacitor. During a step increase in load cur-
rent the ceramic output capacitor alone supplies
the load current until the loop responds. As the loop
responds the inductor current increases to match
the load current demand. This typically takes two
to three switching cycles and can be estimated by:
Once the average inductor current increases to the
DC load level, the output voltage recovers. The
above equation establishes a limit on the minimum
value for the output capacitor with respect to load
transients.
The internal voltage loop compensation also limits
the minimum output capacitor value to 4.7µF. This
is due to its effect on the loop crossover frequency
(bandwidth), phase margin, and gain margin.
Increased output capacitance will reduce the
crossover frequency with greater phase margin.
The maximum output capacitor RMS ripple current
is given by:
Dissipation due to the RMS current in the ceramic
output capacitor ESR is typically minimal, resulting in
less than a few degrees rise in hot spot temperature.
⎛⎞
· 1
-
⎝⎠
V
O
V
IN
V
O
V
IN
1
23
V
OUT
· (V
IN(MAX)
- V
OUT
)
RMS(MAX)
IL
·
F
·
V
IN(MAX)
=·
·
C
OUT
=
3
·
ΔI
LOAD
V
DROOP
·
F
S
⎛⎞
· 1
-
= D
⋅
(1 - D) = 0.5
2
= 0.2
5
⎝⎠
V
O
V
IN
V
O
V
IN
AAT2513
Dual 600mA Step-Down
Converter with Synchronization
2513.2007.04.1.1 13
AAT2513
Dual 600mA Step-Down
Converter with Synchronization
14 2513.2007.04.1.1
Adjustable Output Resistor Selection
Resistors R1 through R4 of Figure 1 program the out-
put to regulate at a voltage higher than 0.6V. To limit
the bias current required for the external feedback
resistor string, the minimum suggested value for R2
and R4 is 59kΩ. Although a larger value will reduce
the quiescent current, it will also increase the imped-
ance of the feedback node, making it more sensitive
to external noise and interference. Table 2 summa-
rizes the resistor values for various output voltages
with R2 and R4 set to either 59kΩfor good noise
immunity or 221kΩfor reduced no load input current.
With an external feedforward capacitor (C4 and C5 of
Figure 2) the AAT2513 delivers enhanced transient
response for extreme pulsed load applications. The
addition of the feedforward capacitor typically requires
a larger output capacitor (C1 and C2) for stability.
Table 2: Feedback Resistor Values.
Thermal Calculations
There are three types of losses associated with the
AAT2513 converter: switching losses, conduction
losses, and quiescent current losses. The conduction
losses are associated with the RDS(ON) characteristics
of the power output switching devices. The switching
losses are dominated by the gate charge of the
power output switching devices. At full load, assum-
ing continuous conduction mode (CCM), a simplified
form of the dual converter losses is given by:
IQis the AAT2513 quiescent current for one chan-
nel and tSW is used to estimate the full load switch-
ing losses.
For the condition where channel one is in dropout
at 100% duty cycle the total device dissipation
reduces to:
Since RDS(ON), quiescent current, and switching
losses all vary with input voltage, the total losses
should be investigated over the complete input
voltage range.
Given the total losses, the maximum junction tem-
perature can be derived from the θJA for the
QFN33-12 package which is 28°C/W to 50°C/W
minimum.
T
J(MAX)
=
P
TOTAL
·
Θ
JA
+ T
AMB
P
TOTAL
= I
O1
2
· R
DSON(HS)
+
+ (t
sw
· F · I
O2
+ 2 · I
Q
) · V
IN
I
O2
2
· (R
DSON(HS)
· V
O2
+ R
DSON(LS)
· [V
IN
-V
O2
])
V
IN
P
TOTAL
I
O1
2
· (R
DSON(HS)
· V
O1
+ R
DSON(LS)
· [V
IN
-V
O1
])
V
IN
=
+
+ (t
sw
· F · [I
O1
+ I
O2
] + 2 · I
Q
) · V
IN
I
O2
2
· (R
DSON(HS)
· V
O2
+ R
DSON(LS)
· [V
IN
-V
O2
])
V
IN
R2, R4 = 59kΩR2, R4 = 221kΩ
VOUT (V) R1, R3 (kΩ) R1, R3 (kΩ)
0.8 19.6 75
0.9 29.4 113
1.0 39.2 150
1.1 49.9 187
1.2 59.0 221
1.3 68.1 261
1.4 78.7 301
1.5 88.7 332
1.8 118 442
1.85 124 464
2.0 137 523
2.5 187 715
3.3 265 1000
⎛⎞
⎝⎠
R1 = -1
·
R2 = - 1
·
59kΩ = 88.5kΩ
V
OUT
V
REF
⎛⎞
⎝⎠
1.5V
0.6V
PCB Layout
Use the following guidelines to insure a proper layout:
1. Due to the pin placement of VIN for both convert-
ers, proper decoupling is not possible with just
one input capacitor. The input capacitors C3 and
C9 should connect as closely as possible to the
respective VIN and GND as shown in Figure 3.
2. Connect the output capacitor and inductor as
closely as possible. The connection of the inductor
to the LX pin should also be as short as possible.
3. The feedback trace should be separate from any
power trace and connect as close as possible to
the load point. Sensing along a high-current load
trace will degrade DC load regulation. Place the
external feedback resistors as close as possible
to the FB pin. This prevents noise from being
coupled into the high impedance feedback node.
4. Keep the resistance of the trace from the load
return to GND to a minimum. This minimizes any
error in DC regulation due to potential differ-
ences of the internal signal ground and the
power ground.
5. For good thermal coupling, PCB vias are
required from the pad for the QFN paddle to the
ground plane. The via diameter should be 0.3mm
to 0.33mm and positioned on a 1.2 mm grid.
AAT2513
Dual 600mA Step-Down
Converter with Synchronization
2513.2007.04.1.1 15
Design Example
Specifications
VO1 2.5V @ 600mA (adjustable using 0.6V version), pulsed load ΔILOAD = 300mA
VO2 1.8V @ 600mA (adjustable using 0.6V version), pulsed load ΔILOAD = 300mA
VIN 2.7V to 4.2V (3.6V nominal)
FS1.7 MHz
TAMB 85°C
1.8V VO1 Output Inductor
(see table 1).
For Sumida CDRH2D11 2.2µH DCR = 98mΩ.
2.5V VO2 Output Inductor
(see table 1).
For Sumida inductor CDRH2D11 3.3µH DCR = 123mΩ.
V
O2
V
O2
2.5
V
2.5V
ΔI2 =
⋅ 1 - = ⋅ 1 - = 230m
A
L ⋅ F
V
IN
3.3µH ⋅ 1.7MHz
4.2V
I
PK2
= I
O2
+ ΔI2 = 0.4A + 0.115A = 0.515A
2
P
L2
= I
O2
2
⋅ DCR = 0.6A
2
⋅ 123mΩ = 44mW
⎛
⎝⎞
⎠
⎛
⎝⎞
⎠
L1 = 1.2 ⋅ V
O1
= 1.2 ⋅ 2.5V = 3.3µH
µs
A
µs
A
V
O1
V
O1
2.5
V
2.5V
ΔI1 =
⋅ 1 - = ⋅ 1 - = 230m
A
L ⋅ F
V
IN
3.3µH ⋅ 1.7MHz
4.2V
I
PK1
= I
O1
+ ΔI1 = 0.4A + 0.115A = 0.515A
2
P
L1
= I
O1
2
⋅ DCR = 0.6A
2
⋅ 123mΩ = 44mW
⎛
⎝⎞
⎠
⎛
⎝⎞
⎠
L1 = 1.2 ⋅ V
O1
= 1.2 ⋅ 1.8V = 2.2µH
µs
A
µs
A
AAT2513
Dual 600mA Step-Down
Converter with Synchronization
16 2513.2007.04.1.1
1.8V Output Capacitor
2.5V Output Capacitor
Input Capacitor
Input Ripple VPP = 25mV.
I
O1
+ I
O2
RMS(MAX)
I
P = esr
·
I
RMS
2
= 5mΩ
·
(0.6A)
2
= 0.8mW
2
= = 0.6Arms
C
IN
= = = 10µF
1
⎛⎞
- ESR
·
4
·
F
S
⎝⎠
V
PP
I
O1
+
I
O2
1
⎛⎞
- 5mΩ
·
4
·
1.7MHz
⎝⎠
25mV
1.2A
1
23
1 2.5V · (4.2V - 2.5V)
3.3µH · 1.7MHz · 4.2V
23
RMS(MAX)
IL · F · V
IN(MAX)
=·
·
3 · ΔI
LOAD
V
DROOP
· F
S
3 · 0.3A
0.2V · 1.7MHz
C
OUT
= = = 4.8µF
· = 67mArm
s
·
(V
OUT
) · (V
IN(MAX)
- V
OUT
)
=
P
esr
= esr · I
RMS2
= 5mΩ · (67mA)
2
= 22µW
1
23
1 1.8V · (4.2V - 1.8V)
2.2µH · 1.7MHz · 4.2V
23
RMS(MAX)
IL · F · V
IN(MAX)
=·
·
3 · ΔI
LOAD
V
DROOP
· F
S
3 · 0.3A
0.2V · 1.7MHz
C
OUT
= = = 4.8µF
· = 31mArm
s
·
(V
OUT
) · (V
IN(MAX)
- V
OUT
)
=
P
esr
= esr · I
RMS2
= 5mΩ · (31mA)
2
= 4.8µW
AAT2513
Dual 600mA Step-Down
Converter with Synchronization
2513.2007.04.1.1 17
AAT2513 Losses
The maximum dissipation occurs at dropout where VIN = 2.7V. All values assume an 85°C ambient and a 120°C
junction temperature.
Figure 2: AAT2513 Evaluation Board Schematic1.
L2
C2
V
O1
187k
R1
L1
V
O2
GND
LX2
R3
88.7k
R4
59.0k
R2
59.0k
C5
100pF
C4
100pF
C1
LX1
V
IN
C7
1μF
C6
1μF
C8
0.1μF
PS
1
VIN2
16
LX2
14
EN2
9
EN1
10
PGND2
13
AGND
2
MODE/SYNC
12
VCC
11
VIN1
5
FB1
4
FB2
3
LX1
7
PGND1
8
N/C
15
N/C
6
AAT2513
U1
C9
10μF
C3
10μF
R5
10
V
IN
V
IN
V
CC
V
CC
V
IN
GND
GND
GND
GND
L1, L2 CDRH2D11
C1, C2 4.7μF 10V 0805 X5R
1
2
3
Phase Shift
1
2
3
Sync
123
Enable 1
123
Enable 2
C10
120μF
T
J(MAX)
= T
AMB
+ Θ
JA
· P
LOSS
= 85°C + (28°C/W) · 533mW = 100°
C
T
J(MAX)
= T
AMB
+ Θ
JA
· P
LOSS
= 85°C + (50°C/W) · 533mW = 111°
C
P
TOTAL
+ (t
sw
· F · I
O2
+ 2 · I
Q
) · V
IN
I
O1
2
· (R
DSON(HS)
· V
O1
+ R
DSON(LS)
· (V
IN
-V
O1
)) + I
O2
2
· (R
DSON(HS)
· V
O2
+ R
DSON(LS)
· (V
IN
-V
O2
))
V
IN
=
=
+ (5ns · 1.7MHz · 0.6A + 60µA) · 2.7V = 533mW
0.6
2
· (0.725
Ω
·
2.5V + 0.7Ω
·
(2.7V - 2.5V)) +
0.6
2
· (0.725
Ω
·
1.8V + 0.7Ω
·
(2.7V - 1.8V))
2.7V
AAT2513
Dual 600mA Step-Down
Converter with Synchronization
18 2513.2007.04.1.1
1. For enhanced transient configuration C5, C4 = 100pF and C1, C2 = 10µF.
Table 5: Evaluation Board Component Values.
Figure 3: AAT2513 Evaluation Board Figure 4: AAT2513 Evaluation Board
Top Side. Bottom Side.
Adjustable Version
(0.6V device) R2, R4 = 59kΩR2, R4 = 221kΩ1
VOUT (V) R1, R3 (kΩ) R1, R3 (kΩ) L1, L2 (µH)
0.8 19.6 75.0 1.0 - 1.5
0.9 29.4 113 1.0 - 1.5
1.0 39.2 150 1.0 - 1.5
1.1 49.9 187 1.0 - 1.5
1.2 59.0 221 1.0 - 1.5
1.3 68.1 261 1.0 - 1.5
1.4 78.7 301 2.2
1.5 88.7 332 2.2
1.8 118 442 2.2
1.85 124 464 2.2
2.0 137 523 3.3
2.5 187 715 3.3
3.3 265 1000 4.7
Fixed Version R2, R4 not used
VOUT (V) R1, R3 (kΩ) L1, L2 (µH)
0.6-3.3V zero 2.2
AAT2513
Dual 600mA Step-Down
Converter with Synchronization
2513.2007.04.1.1 19
1. For reduced quiescent current, R2 and R4 = 221kΩ.
Table 3: Typical Surface Mount Inductors.
Table 4: Surface Mount Capacitors.
Manufacturer Part Number Value Voltage Temp. Co. Case
Murata GRM219R61A475KE19 4.7µF 10V X5R 0805
Murata GRM21BR60J106KE19 10µF 6.3V X5R 0805
Murata GRM21BR60J226ME39 22µF 6.3V X5R 0805
Part Inductance Max DC DCR Size (mm)
Manufacturer Number (µH) Current (A) (Ω) LxWxH Type
Sumida CDRH2D11 1.5 1.48 0.068 3.2x3.2x1.2 Shielded
Sumida CDRH2D11 2.2 1.27 0.098 3.2x3.2x1.2 Shielded
Sumida CDRH2D11 3.3 1.02 0.123 3.2x3.2x1.2 Shielded
Sumida CDRH2D11 4.7 0.88 0.170 3.2x3.2x1.2 Shielded
Taiyo Yuden CBC2518T 1.0 1.2 0.08 2.5x1.8x1.8 Wire Wound Chip
Taiyo Yuden CBC2518T 2.2 1.1 0.13 2.5x1.8x1.8 Wire Wound Chip
Taiyo Yuden CBC2518T 4.7 0.92 0.2 2.5x1.8x1.8 Wire Wound Chip
Taiyo Yuden CBC2016T 2.2 0.83 0.2 2.0x1.6x1.6 Wire Wound Chip
AAT2513
Dual 600mA Step-Down
Converter with Synchronization
20 2513.2007.04.1.1
Ordering Information
All AnalogicTech products are offered in Pb-free packaging. The term “Pb-free” means
semiconductor products that are in compliance with current RoHS standards, including
the requirement that lead not exceed 0.1% by weight in homogeneous materials. For more
information, please visit our website at http://www.analogictech.com/pbfree.
Voltage
Package Channel 1 Channel 2 Marking1Part Number (Tape and Reel)2
QFN33-16 0.6V 0.6V UFXYY AAT2513IVN-AA-T1
AAT2513
Dual 600mA Step-Down
Converter with Synchronization
2513.2007.04.1.1 21
1. XYY = assembly and date code.
2. Sample stock is generally held on part numbers listed in BOLD.
Legend
Voltage Code
Adjustable A
(0.6V)
1.5 G
1.8 I
1.9 Y
2.5 N
2.6 O
2.7 P
2.8 Q
2.85 R
2.9 S
3.0 T
3.3 W
Package Information1
QFN33-16
All dimensions in millimeters.
3.000
±
0.05
Pin 1 Dot By Marking
1.70
±
0.05
0.400
±
0.100
3.000
±
0.05 0.500
±
0.05
0.900
±
0.100
Pin 1 Identification
C0.3
0.025
±
0.025
0.214
±
0.036
0.230
±
0.05
Top View Bottom View
Side View
1
13
5
9
AAT2513
Dual 600mA Step-Down
Converter with Synchronization
22 2513.2007.04.1.1
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830 E. Arques Avenue, Sunnyvale, CA 94085
Phone (408) 737- 4600
Fax (408) 737- 4611
© Advanced Analogic Technologies, Inc.
AnalogicTech cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in an AnalogicTech product. No circuit patent licenses, copyrights, mask work
rights, or other intellectual property rights are implied. AnalogicTech reserves the right to make changes to their products or specifications or to discontinue any product or service with-
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1. The leadless package family, which includes QFN, TQFN, DFN, TDFN and STDFN, has exposed copper (unplated) at the end of the
lead terminals due to the manufacturing process. A solder fillet at the exposed copper edge cannot be guaranteed and is not required
to ensure a proper bottom solder connection.