HEF40106BT-T - NXP - Datasheet.Live

1. General description

The HEF40106B provides six inverting buffers. Each input has a Schmitt trigger circuit.

The inverting buffer switches at different points for positive-going and negative-going

signals. The difference between the positive voltage (VT+) and the negative voltage (VT)

is defined as hysteresis voltage (VH).

The HEF40106B may be used for enhanced noise immunity or to “squa re up” slowly

changing waveforms.

It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS

(usually ground). Unused inputs must be connected to VDD, VSS, or another input.

It is also suitable for use over both the industrial (40 C to +85 C) and automotive

(40 C to +125 C) temperature ranges.

2. Features and benefits

Schmitt trigger input discrimination

Fully static operation

5 V, 10 V, and 15 V parametric ratings

Standardized symmetrical output characteristics

Operates across the automotive temperature range from 40 C to +125 C

Complies with JEDEC standard JESD 13-B

3. Applications

Wave and pulse shapers

Astable multivibrators

Monostable multivibrators

4. Ordering information

HEF40106B

Hex inverting Schmitt trigger

Rev. 6 — 23 August 2011 Product data sheet

Table 1. Ordering information

All types operate from 40 C to +125 C

Type number Package

Name Description Version

HEF40106BP DIP14 plastic dual in-line package; 14 leads (300 mil) SOT27-1

HEF40106BT SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1

HEF40106BTT TSSOP14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1

Product data sheet Rev. 6 — 23 August 2011 2 of 16

NXP Semiconductors HEF40106B

Hex inverting Schmitt trigger

5. Functional diagram

6. Pinning information

6.1 Pinning

Fig 1. Functional diagram Fig 2. Logic diagram (one inverting buffer)

mna204

1A 1Y

2A 2Y

3A 3Y

4A 4Y

5A 5Y

11 10

6A 6Y

13 12

mna025

Fig 3. Pin configuration

HEF40106B

1A VDD

1Y 6A

2A 6Y

2Y 5A

3A 5Y

3Y 4A

VSS 4Y

001aal174

Product data sheet Rev. 6 — 23 August 2011 3 of 16

NXP Semiconductors HEF40106B

Hex inverting Schmitt trigger

6.2 Pin description

7. Functional description

[1] H = HIGH voltage level; L = LOW voltage level.

8. Limiting values

[1] For DIP14 packages: above Tamb = 70 C, Ptot derates linearly with 12 mW/K.

[2] For SO14 packages: above Tamb = 70 C, Ptot derates linearly with 8 mW/K.

[3] For TSSOP14 packages: above Tamb = 60 C, Ptot derates linearly with 5.5 mW/K.

Table 2. Pin description

Symbol Pin Description

1A to 6A 1, 3, 5, 9, 11, 13 input

1Y to 6Y 2, 4, 6, 8, 10, 12 output

VDD 14 supply voltage

VSS 7 ground (0 V)

Table 3. Function table[1]

Input Output

nA nY

Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS = 0 V (ground).

Symbol Parameter Conditions Min Max Unit

VDD supply voltage 0.5 +18 V

IIK input clamping current VI<0.5 V or VI>V

DD + 0.5 V - 10 mA

VIinput voltage 0.5 VDD + 0.5 V

IOK output clamping curre nt VO<0.5 V or VO>V

DD + 0.5 V - 10 mA

II/O input/output current - 10 mA

IDD supply current - 50 mA

Tstg storage temperature 65 +150 C

Tamb ambient temperature 40 +125 C

Ptot total power dissipation Tamb = 40 C to +125 C

DIP14 [1] -750mW

SO14 [2] -500mW

TSSOP14 [3] -500mW

P power dissipation per output - 100 mW

Product data sheet Rev. 6 — 23 August 2011 4 of 16

NXP Semiconductors HEF40106B

Hex inverting Schmitt trigger

9. Recommended operating conditions

10. Static characteristics

Table 5. Re commended operating cond ition s

Symbol Parameter Conditions Min Max Unit

VDD supply voltage 3 15 V

VIinput voltage 0 VDD V

Tamb ambient temperature in free air 40 +125 C

Table 6. Static characteristics

VSS = 0 V; VI=V

SS or VDD; unless otherwise specified.

Symbol Parameter Conditions VDD Tamb = 40 C Tamb = +25 C Tamb = +85 C Tamb = +125 CUnit

Min Max Min Max Min Max Min Max

VOH HIGH-level

output voltage IO < 1 A 5 V 4.95 - 4.95 - 4.95 - 4.95 - V

10 V 9.95 - 9.95 - 9.95 - 9.95 - V

15 V 14.95 - 14.95 - 14.95 - 14.95 - V

VOL LOW-level

output voltage IO < 1 A 5 V - 0.05 - 0.05 - 0.05 - 0.05 V

10 V - 0.05 - 0.05 - 0.05 - 0.05 V

15 V - 0.05 - 0.05 - 0.05 - 0.05 V

IOH HIGH-level

output cur r en t VO = 2.5 V 5 V - 1.7 - 1.4 - 1.1 - 1.1 mA

VO = 4.6 V 5 V - 0.64 - 0.5 - 0.36 - 0.36 mA

VO = 9.5 V 10 V - 1.6 - 1.3 - 0.9 - 0.9 mA

VO = 13.5 V 15 V - 4.2 - 3.4 - 2.4 - 2.4 mA

IOL LOW-level

output cur r en t VO = 0.4 V 5 V 0.64 - 0.5 - 0.36 - 0 .3 6 - mA

VO = 0.5 V 10 V 1.6 - 1.3 - 0.9 - 0.9 - mA

VO = 1.5 V 15 V 4.2 - 3.4 - 2.4 - 2.4 - mA

IIinput leakage

current 15 V - 0.1 - 0.1 - 1.0 - 1.0 A

IDD supply current all valid input

combinations;

IO=0A

5 V - 0.25 - 0.25 - 7.5 - 7.5 A

10 V - 0.5 - 0.5 - 15.0 - 15.0 A

15 V - 1.0 - 1.0 - 30.0 - 30.0 A

CIinput

capacitance ---7.5-- - -pF

Product data sheet Rev. 6 — 23 August 2011 5 of 16

NXP Semiconductors HEF40106B

Hex inverting Schmitt trigger

11. Dynamic characteristics

[1] Typical value of the propagation delay and output transition time can be calculated with the extrapolation formula (CL in pF).

Table 7. Dynamic characteristics

Tamb = 25 C; CL = 50 pF; tr = tf  20 ns; wave forms see Figure 4; test circuit see Figure 5; unless otherwise specified.

Symbol Parameter Conditions VDD Extrapolation formula[1] Min Typ Max Unit

tPHL HIGH to LOW

propagation delay nA or nB to nY 5 V 63 ns + (0.55 ns/pF)CL- 90 180 ns

10 V 29 ns + (0.23 ns/pF)CL-3570ns

15 V 22 ns + (0.16 ns/pF)CL-3060ns

tPLH LOW to HIGH

propagation delay nA or nB to nY 5 V 58 ns + (0.55 ns/pF)CL- 75 150 ns

10 V 29 ns + (0.23 ns/pF)CL-3570ns

15 V 22 ns + (0.16 ns/pF)CL-3060ns

tTHL HIGH to LOW output

transition time nY to LOW 5 V 10 ns + (1.00 ns/pF)CL- 60 120 ns

10 V 9 ns + (0.42 ns/pF)C L-3060ns

15 V 6 ns + (0.28 ns/pF)C L-2040ns

tTLH LOW to HIGH output

transition time nA or nB to

HIGH 5 V 10 ns + (1.00 ns/pF)CL- 60 120 ns

10 V 9 ns + (0.42 ns/pF)C L-3060ns

15 V 6 ns + (0.28 ns/pF)C L-2040ns

Table 8. Dynamic po wer dissipation

VSS = 0 V; tr = tf  20 ns; Tamb = 25 C.

Symbol Parameter VDD Typical formula where:

PDdynamic power

dissipation 5V P

D = 2300  fi + (fo  CL)  VDD2 (W) fi = input frequency in MHz;

fo = output frequency in MHz;

CL = output load capacitance in pF;

(fo  CL) = sum of the outputs;

VDD = supply voltage in V.

10 V PD = 9000  fi + (fo  CL)  VDD2 (W)

15 V PD = 20000  fi + (fo  CL)  VDD2 (W)

Product data sheet Rev. 6 — 23 August 2011 6 of 16

NXP Semiconductors HEF40106B

Hex inverting Schmitt trigger

12. Waveforms

Measurement points are given in Table 9.

Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.

tr, tf = input rise and fall times.

Fig 4. Propa ga tion delay and output transition time

001aag197

input

output

tPLH

tPHL

0 V

VOH

VOL tTLH

tTHL

90 %

10 %

90 %

trtf

Table 9. Measur ement points

Supply voltage Input Output

VDD VMVM

5 V to 15 V 0.5VDD 0.5VDD

Test data given in Table 10.

Definitions for test circuit:

DUT = Device Under Test.

CL= load capacitance including jig and probe capacitance.

RT= termination resistance should be equal to the output impedance Zo of the pulse generator.

Fig 5. Test circuit

VDD

VIVO

001aag182

DUT

Table 10. Test data

Supply voltage Input Load

VDD VItr, tfCL

5 V to 15 V VSS or VDD 20 ns 50 pF

Product data sheet Rev. 6 — 23 August 2011 7 of 16

NXP Semiconductors HEF40106B

Hex inverting Schmitt trigger

13. Transfer characteristics

[1] All typical values are at Tamb =25C.

Table 11. Transfer chara cteristics

VSS =0V; see Figure 6 and Figure 7.

Symbol Parameter Conditions VDD Tamb = 40 C to +85 C Tamb = 40 C

to +125 CUnit

Min Typ[1] Max Min Max

VT+ positive-going threshold voltage 5 V 2.0 3.0 3.5 2.0 3.5 V

10 V 3.7 5.8 7.0 3.7 7.0 V

15 V 4.9 8.3 11.0 4.9 11.0 V

VTnegative-going threshold voltage 5 V 1.5 2.2 3.0 1.5 3.0 V

10 V 3.0 4.5 6.3 3.0 6.3 V

15 V 4.0 6.5 10.1 4.0 10.1 V

VHhysteresis voltage 5 V 0.5 0.8 - 0.5 - V

10 V 0.7 1.3 - 0.7 - V

15 V 0.9 1.8 - 0.9 - V

Fig 6. Transfer characteristic Fig 7. Waveforms showing definition of VT+ and VT

(between limits at 30 % and 70 %) and VH

001aag107

VHVT+

VT−

001aag108

VIVH

VT+

VT−

Product data sheet Rev. 6 — 23 August 2011 8 of 16

NXP Semiconductors HEF40106B

Hex inverting Schmitt trigger

a. VDD = 5 V; Tamb = 25 Cb.V

DD = 10 V; Tamb = 25 C

c. VDD = 15 V; Tamb = 25 C

Fig 8. Typical drain current as a function of input

VI (V)

054231

001aal181

100

(μA)

VI (V)

0108462

001aal182

400

600

200

800

1000

(μA)

VI (V)

020168124

001aal183

800

1200

400

1600

2000

(μA)

Product data sheet Rev. 6 — 23 August 2011 9 of 16

NXP Semiconductors HEF40106B

Hex inverting Schmitt trigger

14. Application information

Some examples of applications for the HEF40106B are:

•Wave and pulse shapers

•Astable multivibrators

•Monostable multivibrators

If a Schmitt trigger is driven via a high-impedance (R > 1 k), then it is necessary to

incorporate a capacitor C with a value of ; otherwise oscillation can occur

on the edges of a pulse.

Cp is the external parasitic capacitance between input s and output; th e value dep end s on

the circuit board layout.

Tamb = 25 C.

Fig 9. Typical swit ch ing levels as a function of supply voltage

001aal184

VDD (V)

2.5 17.512.57.5

(V)

Fig 10. Ast able multivibrator Fig 11. Schmitt trigg e r dr iv en via a

high-impedance input

mna035

001aal185

------ VDD VSS

–

------------------------->

Product data sheet Rev. 6 — 23 August 2011 10 of 16

NXP Semiconductors HEF40106B

Hex inverting Schmitt trigger

15. Package outline

Fig 12. Package outline SOT27-1 (DIP14)

UNIT A

max. 1 2 (1) (1)

b1cD (1)

Ee M

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

inches

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

SOT27-1 99-12-27

03-02-13

min. A

max. bmax.

1.73

1.13 0.53

0.38 0.36

0.23 19.50

18.55 6.48

6.20 3.60

3.05 0.2542.54 7.62 8.25

7.80 10.0

8.3 2.24.2 0.51 3.2

0.068

0.044 0.021

0.015 0.77

0.73

0.014

0.009 0.26

0.24 0.14

0.12 0.010.1 0.3 0.32

0.31 0.39

0.33 0.0870.17 0.02 0.13

050G04 MO-001 SC-501-14

(e )

seating plane

pin 1 index

0 5 10 mm

scale

Note

1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.

DIP14: plastic dual in-line package; 14 leads (300 mil) SOT27-1

Product data sheet Rev. 6 — 23 August 2011 11 of 16

NXP Semiconductors HEF40106B

Hex inverting Schmitt trigger

Fig 13. Package outline SOT108-1 (SO14)

UNIT A

max. A1A2A3bpcD

(1) E(1) (1)

ELL

pQZywv θ

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

inches

1.75 0.25

0.10 1.45

1.25 0.25 0.49

0.36 0.25

0.19 8.75

8.55 4.0

3.8 1.27 6.2

5.8 0.7

0.6 0.7

0.3 8

0.25 0.1

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

Note

1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

1.0

0.4

SOT108-1

detail X

vMA

(A )

076E06 MS-012

pin 1 index

0.069 0.010

0.004 0.057

0.049 0.01 0.019

0.014 0.0100

0.0075 0.35

0.34 0.16

0.15 0.05

1.05

0.041

0.244

0.228 0.028

0.024 0.028

0.012

0.01

0.25

0.01 0.004

0.039

0.016

99-12-27

03-02-19

0 2.5 5 mm

scale

SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1

Product data sheet Rev. 6 — 23 August 2011 12 of 16

NXP Semiconductors HEF40106B

Hex inverting Schmitt trigger

Fig 14. Package outline SOT402-1 (TSSOP14)

UNIT A1A2A3bpcD

(1) E(2) (1)

ELL

pQZywv θ

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

mm 0.15

0.05 0.95

0.80 0.30

0.19 0.2

0.1 5.1

4.9 4.5

4.3 0.65 6.6

6.2 0.4

0.3 0.72

0.38 8

0.13 0.10.21

DIMENSIONS (mm are the original dimensions)

Notes

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.

0.75

0.50

SOT402-1 MO-153 99-12-27

03-02-18

0.25

14 8

detail X

(A )

vMA

0 2.5 5 mm

scale

TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1

max.

1.1

pin 1 index

Product data sheet Rev. 6 — 23 August 2011 13 of 16

NXP Semiconductors HEF40106B

Hex inverting Schmitt trigger

16. Revision history

Table 12. Revision history

Document ID Release date Data sheet status Change notice Supersedes

HEF40106B v.6 20110823 Product data sheet - HEF40106B v.5

Modifications: •Errata in pin configuration table corrected.

HEF40106B v.5 20110511 Product data sheet - HEF40106B v.4

Modifications: •HEF40106BTT (TSSOP14 ) added.

HEF40106B v.4 20101115 Product data sheet - HEF40 106B_CNV v.3

HEF40106B_CNV v.3 19950101 Product specification - HEF40106B_CNV v.2

HEF40106B_CNV v.2 19950101 Product specification - -

Product data sheet Rev. 6 — 23 August 2011 14 of 16

NXP Semiconductors HEF40106B

Hex inverting Schmitt trigger

17. Legal information

17.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design.

[2] The term ‘short data sheet’ is explained in section “Definitions”.

[3] The product status of de vice(s) descr ibed in th is docume nt may have cha nged since this docume nt was publis hed and ma y dif fer in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

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for quick reference only and shou ld not be rel ied u pon to cont ain det ailed and

full information. For detailed and full information see the relevant full data

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Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those given in

the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanent ly and irreversibly affect

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Document status[1][2] Product status[3] Definition

Objective [short] data sheet Development This document contains data from the objective specification for product development.

Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.

Product [short] dat a sheet Production This document contains the product specification.

Product data sheet Rev. 6 — 23 August 2011 15 of 16

NXP Semiconductors HEF40106B

Hex inverting Schmitt trigger

Export control — This document as well as the item(s) described herein

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17.4 Trademarks

Notice: All referenced b rands, produc t names, service names and trademarks

are the property of their respect i ve ow ners.

18. Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

NXP Semiconductors HEF40106B

Hex inverting Schmitt trigger

For more information, please visit: http://www.nxp.co m

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 23 August 2011

Document identifier : HEF40106B

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

19. Contents

1 General description. . . . . . . . . . . . . . . . . . . . . . 1

2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1

3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

4 Ordering information. . . . . . . . . . . . . . . . . . . . . 1

5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2

6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2

6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3

7 Functional description . . . . . . . . . . . . . . . . . . . 3

8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3

9 Recommended operating conditions. . . . . . . . 4

10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4

11 Dynamic characteristics . . . . . . . . . . . . . . . . . . 5

12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

13 Transfer characteristics . . . . . . . . . . . . . . . . . . 7

14 Application information. . . . . . . . . . . . . . . . . . . 9

15 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10

16 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 13

17 Legal information. . . . . . . . . . . . . . . . . . . . . . . 14

17.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 14

17.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

17.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 14

17.4 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

18 Contact information. . . . . . . . . . . . . . . . . . . . . 15

19 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16