PWM Control & PWM/PFM Control Step-Down Switching Regulator-Controllers
S-8520/8521 Series Rev.7.4_10
Seiko Instruments Inc.
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Therefore, select an inductor in which the peak current Ipk will not surpass its allowable current at any
moment. The peak current Ipk is represented by the following equation in continuous operation mode:
(VOUT + VF)× (VIN − VOUT)
IPK = IOUT +2× fosc × L × (VIN + VF)
Where fosc is the oscillation frequency, L the inductance value of the coil, and VF the forward voltage of
the diode.
3. Diode
The diode to be externally coupled to the IC should be a type that meets the following conditions:
Its forward voltage is low (Schottky barrier diode recommended).
Its switching speed is high (50 ns max.).
Its reverse direction voltage is higher than VIN.
Its current rating is higher than Ipk.
4. Capacitors (CIN, COUT)
The capacitor inserted on the input side (CIN) serves to lower the power impedance and to average the
input current for better efficiency. Select the CIN-value according to the impedance of the power supplied.
As a rough rule of thumb, you should use a value of 47µF to 100 µF, although the actual value will
depend on the impedance of the power in use and the load current value.
For the output side capacitor (COUT), select one of large capacitance with low ESR (Equivalent Series
Resistance) for smoothing the ripple voltage. However, notice that a capacitor with extremely low ESR
(say, below 0.3 Ω), such as a ceramic capacitor, could make the output voltage unstable, depending on
the input voltage and load current conditions. Instead, a tantalum electrolytic capacitor is recommended.
A capacitance value from 47µF to 100 µF can serve as a rough yardstick for this selection.
5. External Switching Transistor
The S-8520/21 Series can be operated with an external switching transistor of the enhancement (Pch)
MOS FET type or bipolar (PNP) typ.
5.1 Enhancement MOS FET type
The EXT pin of the S-8520/21 Series is capable of directly driving a Pch power MOS FET with a gate
capacity of some 1000 pF.
When a Pch power MOS FET is chosen, because it has a higher switching speed than a PNP type
bipolar transistor and because power losses due to the presence of a base current are avoided,
efficiency will be 2 % to 3 % higher than when other types of transistor are employed.
The important parameters to be kept in mind in selecting a Pch power MOS FET include the threshold
voltage, breakdown voltage between gate and source, breakdown voltage between drain and source,
total gate capacity, on-resistance, and the current rating.
The EXT pin swings from voltage VIN over to voltage VSS. If the input voltage is low, a MOS FET with a
low threshold voltage has to be used so that the MOS FET will come on as required. If, conversely, the
input voltage is high, select a MOS FET whose gate-source breakdown voltage is higher than the input
voltage by at least several volts.
Immediately after the power is turned on, or when the power is turned off (that is, when the step-down
operation is terminated), the input voltage will be imposed across the drain and the source of the MOS
FET. Therefore, the transistor needs to have a drain-source breakdown voltage that is also several volts
higher than the input voltage.
The total gate capacity and the on-resistance affect the efficiency.
The power loss for charging and discharging the gate capacity by switching operation will increase, when
the total gate capacity becomes larger and the input voltage rises higher. Therefore the gate capacity
affects the efficiency of power in a low load current region. If the efficiency under light loads is a matter
of particular concern, select a MOS FET with a small total gate capacity.
In regions where the load current is high, the efficiency is affected by power losses caused due to the on-
resistance of the MOS FET. Therefore, if the efficiency under heavy loads is particularly important for