International PD-9.655A Rectifier IRFR9024 HEXFET Power MOSFET IRFU9024 Dynamic dv/dt Rating Repetitive Avalanche Rated _ Surface Mount (IRFR9024) Voss = 60V Straight Lead (IRFU9024) Available in Tape & Reel P-Channel Fast Switching 5 Ip = -8.8A Rpsvon) = 0.280 Description Third Generation HEXFETs from International Rectifier provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. ~~ The D-Pak is designed for surface mounting using vapor phase, infrared, or wave soldering techniques. The straight lead version (IRFU series) is for through-hole mounting applications. Power dissipation levels up to 1.5 watts are possible in typical surface mount applications. D-PAK PAK TO-252AA TO-251AA Absolute Maximum Ratings Parameter Max. Units Ip @ To = 25C Continuous Drain Current, Vas @ -10 V -8.8 Ip @ Tc = 100C | Continuous Drain Current, Ves @ -10 V 5.6 A Ibm Pulsed Drain Current -35 Pp @ Tc =25C | Power Dissipation 42 W Pp @ Ta= 25C __| Power Dissipation (PCB Mount)** 25 Linear Derating Factor 0.33 WeC Linear Derating Factor (PCB Mount}** 0.020 Ves Gate-to-Source Voltage +20 Vv Eas Single Pulse Avalanche Energy 300 mJ lar Avalanche Current -8.8 A Ear Repetitive Avalanche Energy 5.0 mJ dv/dt Peak Diode Recovery dv/dt 45 Vins Ty, Tste Junction and Storage Temperature Range -65 to +150 C Soldering Temperature, for 10 seconds 260 (1.6mm from case) Thermal Resistance Parameter Min. Typ. Max. Units Rec Junction-to-Case = 3.0 Rea Junction-to-Ambient (PCB mount)** _ 50 C Roa Junction-to-Ambient _ _ 110 ** When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994. 1193IRFR9024, IRFU9024 Electrical Characteristics @ Ty = 25C (unless otherwise specified) Parameter Min. | Typ. | Max. | Units Test Conditions Vieayoss Drain-to-Source Breakdown Voltage -60 V__ | Ves=0V, lp=-250nA AVierjoss/ATy| Breakdown Voltage Temp. Coefficient |-0.063} | V/C | Reference to 25C, Ip=-1mA Rosvon) Static Drain-to-Source On-Resistance | 0.28 Q | Vas=-10V, ip=-5.3A Vasc) Gate Threshold Voltage -2.0 | | -4.0 V__ | Vos=Ves, Ip=-250uA Dis Forward Transconductance 2.9 _ _ S| Vos=-25V, Ip=-5.3A @ loss Drain-to-Source Leakage Current ~_| = | 100 BA Vos=-60V, Vas-OV -500 Vps=-48V, Vas=0V, Ty=125C ccs "| Gate-to-Source Forward Leakage | [| | -100 na [Vas=-20V Gate-to-Source Reverse Leakage _ _ 100 Vaes=20V (Q5___|TotalGateCharge iiwYC dE:C s Ip=-11A Qgs Gate-to-Source Charge _ | 54 | nC | Vpg=-48V Qga Gate-to-Drain ("Miller") Charge 14 Ves=-10V ityon ___| Turn-On Delay Time {#7 =| Vop=-30V tr Rise Time. , | 68 | | QS 114 tacoin) Turn-Off Delay Time 15 Re=18Q ft FallTime 29 = Rp=2.5Q Lo Internal Drain Inductance _ 45 ao Samoan) | . : Lu nH_ | from package (i= ) Ls Internal Source Inductance |} 75) and center of ed ne ft die contact 8 Ciss Input Capacitance 570 _ Vaes=0V Coss Output Capacitance | 30] PF | Vog=-25V [Cus __ [Reverse Transfer Capacitance | | 65 | ft Mz Source-Drain Ratings and Characteristics Po Parameter _ Min. | Typ. | Max. | Units Test Conditions Is Continuous Source Current _ | 88 MOSFET symbol D (Body Diode} , A showing the Ism Pulsed Source Current _ _ 35 integral reverse & [ ____ | (Body Diode) | p-n junction diode. 8 Vsp Diode Forward Voltage _ 6.3 V || Ty=25C, lg=-8.8A, Vass0V @ tire Reverse Recovery Time | 100 | 200 | ns_ | Ty=25C, Ip=-11A Qr Reverse Recovery Charge | | 0.32 | 0.64 | uC [di/dt=100A/is | ton Forward Turn-On Time Intrinsic tum-on time is neglegible (turn-on is dominated by Ls+Lp) | Notes: @ Repetitive rating; pulse width limited by Isps-11A, di/dts140A/s, Vop required las 800 Ip TOP = -3.9A -5.6A BOTTOM -B.8A 600 409 Fig 12a. Unclamped Inductive Test Circuit lags Eas, Single Pulse Energy (mJ) \ ; 200 Sy Vos \ i \ \ , \ Vpp 25 50 75 100 4126 150 l+ ty Starting Ty, Junction Temperature(C) ViBR)OSS Fig 12c. Maximum Avalanche Energy Fig 12b. Unclamped Inductive Waveforms Vs. Drain Current Current Regulator Same Type as D.U.T. 4 Ee) Ves Charge + la = pb Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit Appendix A: Figure 14, Peak Diode Recovery dv/dt Test Circuit - See page 1506 Appendix B: Package Outline Mechanical Drawing See pages 1512, 1513 International Rectifier Appendix C: Part Marking Information - See page 1518 Appendix D: Tape & Reel Information See page 1523 1198