MAX6316LUK29CY-T - Maxim Integrated

19-0496; Rev 14; 11/18

General Description

The MAX6316–MAX6322 family of microprocessor (μP)

supervisory circuits monitors power supplies and micro-

processor activity in digital systems. It offers several com-

binations of push/pull, open-drain, and bidirectional (such

as Motorola 68HC11) reset outputs, along with watchdog

and manual reset features. The Selector Guide below lists

the specific functions available from each device.

These devices are available in 26 factory-trimmed reset

threshold voltages (from 2.5V to 5V, in 100mV increments),

featuring four minimum power-on reset timeout periods

(from 1ms to 1.12s), and four watchdog timeout periods

(from 6.3ms to 25.6s). Thirteen standard versions are

available with an order increment requirement of 2500

pieces (see Standard Versions table); contact the factory

for availability of other versions, which have an order

increment requirement of 10,000 pieces.

The MAX6316–MAX6322 are offered in a miniature 5-pin

SOT23 package.

Applications

● Portable Computers

●Computers

●Controllers

●Intelligent Instruments

● Portable/Battery-Powered Equipment

● Embedded Control Systems

Benets and Features

● Integrated Configuration Enables Flexible Designs

• Available in 26 Reset-Threshold Voltages

- 2.5V to 5V, in 100mV Increments

• Four Reset Timeout Periods

- 1ms, 20ms, 140ms, or 1.12s (min)

• Four Watchdog Timeout Periods

- 6.3ms, 102ms, 1.6s, or 25.6s (typ)

• Four Reset Output Stages

- Active-High, Push/Pull

- Active-Low, Push/Pull

- Active-Low, Open-Drain

- Active-Low, Bidirectional

● Integrated Features Increase Robustness

• Guaranteed Reset Valid to VCC = 1V

• Immune to Short-Negative VCC Transients

● Saves Board Space

• No External Components

• Small 5-Pin SOT23 Package

• AEC-Q100 Qualied

Ordering Information appears at end of data sheet.

Click here for production status of specic part numbers.

*The MAX6318/MAX6319/MAX6321/MAX6322 feature two types of reset output on each device.

PART WATCHDOG

INPUT

MANUAL

RESET

INPUT

RESET

OUTPUTS*

ACTIVE-LOW

PUSH/PULL

ACTIVE-HIGH

PUSH/PULL

ACTIVE-LOW

BIDIRECTIONAL

ACTIVE-LOW

OPEN-DRAIN

MAX6316L

✔ ✔ ✔

— — —

MAX6316M

✔ ✔

— —

✔

—

MAX6317H

✔ ✔

—

✔

— —

MAX6318LH

✔

—

✔ ✔

— —

MAX6318MH

✔

— —

✔ ✔

—

MAX6319LH

—

✔ ✔ ✔

— —

MAX6319MH —

✔

—

✔ ✔

—

MAX6320P

✔ ✔

— — —

✔

MAX6321HP

✔

— —

✔

—

✔

MAX6322HP

—

✔

—

✔

—

✔

Selector Guide

Typical Operating Circuit and Pin Configurations appears at

end of data sheet.

MAX6316–MAX6322 5-Pin μP Supervisory Circuits with

Watchdog and Manual Reset

Voltage (with respect to GND)

VCC ...................................................................... -0.3V to +6V

RESET (MAX6320/MAX6321/MAX6322 only) ....-0.3V to +6V

All Other Pins........................................ -0.3V to (VCC + 0.3V)

Input/Output Current, All Pins .............................................20mA

Continuous Power Dissipation (TA = +70°C)

SOT23 (derate 3.9mW/°C above +70°C) .................312.6mW

Operating Temperature Range ......................... -40°C to +125°C

Junction Temperature ...................................................... +150°C

Storage Temperature Range ............................ -65°C to +160°C

Lead Temperature (soldering, 10s) .................................+300°C

Soldering Temperature (reflow)

Leaded Package .......................................................... +240°C

Lead-Free Package ..................................................... +260°C

SOT23-5

PACKAGE CODE U5+2/U5+2A

Outline Number 21-0057

Land Pattern Number 90-0174

Thermal Resistance, Single-Layer Board:

Junction to Ambient (θJA) 324.3°C/W

Junction to Case (θJC) 82°C/W

Thermal Resistance, Multi-Layer Board:

Junction to Ambient (θJA) 255.9°C/W

Junction to Case (θJC) 81°C/W

Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board.

For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.

For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”,

“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing

pertains to the package regardless of RoHS status.

Package Information

Absolute Maximum Ratings

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these

or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect

device reliability.

MAX6316–MAX6322 5-Pin μP Supervisory Circuits with

Watchdog and Manual Reset

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(VCC = 2.5V to 5.5V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)

Note 1: Overtemperature limits are guaranteed by design, not production tested.

Note 2: A factory-trimmed voltage divider programs the nominal reset threshold (VTH). Factory-trimmed reset thresholds are avail-

able in 100mV increments from 2.5V to 5V (see Table 1 at end of data sheet).

Note 3: Guaranteed by design.

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Operating Voltage Range VCC TA = -40°C to +125°C 1.0 5.5 V

Supply Current ICC

MAX6316/MAX6317/MAX

6318/MAX6320/MAX6321

VCC = 5.5V 10 20

µA

VCC = 3.6V 5 12

MAX6319/MAX6322:

MR unconnected

VCC = 5.5V 3 12

VCC = 3.6V 3 8

Reset Threshold Temperature

Coe󰀩cient DVTH/°C 40 ppm/°C

Reset Threshold (Note 2) VRST

TA = +25°C VTH - 1.5% VTH VTH + 1.5% V

TA = -40°C to +125°C VTH - 2.5% VTH VTH + 2.5%

Reset Threshold Hysteresis 3 mV

Reset Active Timeout Period tRP

MAX63_ _ A_-T 1 1.4 2

MAX63__B_-T 20 28 40

MAX63_ _ C_-T 140 200 280

MAX63__D_-T 1120 1600 2240

VCC to RESET Delay tRD VCC falling at 1mV/µs 40 µs

PUSH/PULL RESET OUTPUT (MAX6316L/MAX6317H/MAX6318_H/MAX6319_H/MAX6321HP/MAX6322HP)

RESET Output Voltage

VOL

VCC ≥ 1.0V, ISINK = 50µA 0.3

VCC ≥ 1.2V, ISINK = 100µA 0.3

VCC ≥ 2.7V, ISINK = 1.2mA 0.3

VCC ≥ 4.5V, ISINK = 3.2mA 0.4

VOH

VCC ≥ 2.7V, ISOURCE = 500µA 0.8 x VCC

VCC ≥ 4.5V, ISOURCE = 800µA VCC - 1.5

RESET Rise Time (MAX6316L,

MAX6318LH, MAX6319LH) tRRise time is measured from 10% to 90%

of VCC; CL = 5pF, VCC = 3.3V (Note 3) 5 25 ns

RESET Output Voltage

VOL

VCC ≥ 2.7V, ISINK = 1.2mA 0.3

VCC ≥ 4.5V, ISINK = 3.2mA 0.4

VOH

VCC ≥ 1.8V, ISOURCE = 150µA 0.8 x VCC

VCC ≥ 2.7V, ISOURCE = 500µA 0.8 x VCC

VCC ≥ 4.5V, ISOURCE = 800µA VCC - 1.5

Electrical Characteristics

MAX6316–MAX6322 5-Pin μP Supervisory Circuits with

Watchdog and Manual Reset

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(VCC = 2.5V to 5.5V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)

Note 4: This is the minimum time RESET must be held low by an external pulldown source to set the active pullup flip-flop.

Note 5: Measured from RESET VOL to (0.8 x VCC), RLOAD = ∞.

Note 6: WDI is internally serviced within the watchdog period if WDI is left unconnected.

Note 7: The WDI input current is specified as the average input current when the WDI input is driven high or low. The WDI input is

designed for a three-stated-output device with a 10μA maximum leakage current and capable of driving a maximum capaci-

tive load of 200pF. The three-state device must be able to source and sink at least 200μA when active.

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

BIDIRECTIONAL RESET OUTPUT (MAX6316M/MAX6318MH/MAX6319MH)

Transitional Flip-Flop Setup Time tS(Note 4) 400 ns

RESET Output Rise Time

(Note 5) tR

VCC = 3.0V, CL = 120pF 333

VCC = 5.0V, CL = 200pF 333

VCC = 3.0V, CL = 250pF 666

VCC = 5.0V, CL = 400pF 666

Active Pullup Enable Threshold VPTH VCC = 5.0V 0.4 0.65 V

RESET Active Pullup Current VCC = 5.0V 20 mA

RESET Pullup Resistance TA = -40°C to +85°C 4.2 4.7 5.2 kΩ

TA = -40°C to +125°C 3.6 4.7 5.8

OPEN-DRAIN RESET OUTPUT (MAX6320P/MAX6321HP/MAX6322HP)

RESET Output Voltage VOL

VCC > 1.0V, ISINK = 50µA 0.3

VCC > 1.2V, ISINK = 100µA 0.3

VCC > 2.7V, ISINK = 1.2mA 0.3

VCC > 4.5V, ISINK = 3.2mA 0.4

Open-Drain Reset Output

Leakage Current ILKG 1.0 µA

WATCHDOG INPUT (MAX6316/MAX6317H/MAX6318_H/MAX6320P/MAX6321HP)

Watchdog Timeout Period tWD

MAX63_ _ _W-T 4.3 6.3 9.3 ms

MAX63_ _ _X-T 71 102 153

MAX63_ _ _Y-T 1.12 1.6 2.4 s

MAX63_ _ _Z-T 17.9 25.6 38.4

WDI Pulse Width tWDI VIL = 0.3 x VCC, VIH = 0.7 x VCC 50 ns

WDI Input Threshold VIL (Note 6) 0.3 x VCC V

VIH 0.7 x VCC

WDI Input Current

(Note 7) IWDI WDI = VCC, time average 120 160 µA

VWDI = 0V, time average -20 -15

MANUAL RESET INPUT (MAX6316_/MAX6317H/MAX6319_H/MAX6320P/MAX6322HP)

MR Input Threshold

VIL VTH > 4.0V 0.8

VIH 2.0

VIL VTH < 4.0V 0.3 x VCC

VIH 0.7 x VCC

MR Input Pulse Width TA = -40°C to +85°C 1µs

TA = -40°C to +125°C 1.5

MR Glitch Rejection 100 ns

MR Pullup Resistance 35 52 75 kΩ

MR to Reset Delay VCC = 5V 230 ns

Electrical Characteristics (continued)

MAX6316–MAX6322 5-Pin μP Supervisory Circuits with

Watchdog and Manual Reset

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TA = +25°C, unless otherwise noted.)

Typical Operating Characteristics

0.95

0.98

0.97

0.96

1.00

0.99

1.04

1.03

1.02

1.01

1.05

-40 -20 0 20 40 60 80 100

NORMALIZED RESET TIMEOUT

PERIOD vs. TEMPERATURE

MAX6316toc04

TEMPERATURE (°C)

NORMALIZED RESET TIMEOUT PERIOD

10 100 1000

MAXIMUM VCC TRANSIENT DURATION

vs. RESET THRESHOLD OVERDRIVE

MAX6316toc06

RESET THRESHOLD OVERDRIVE (mV) VRST - VCC

TRANSIENT DURATION (µs)

VRST = 3.3V

VRST = 4.63V

VRST = 2.63V

RESET OCCURS ABOVE LINES

0.95

0.98

0.97

0.96

1.00

0.99

1.04

1.03

1.02

1.01

1.05

-40 -20 0 20 40 60 80 100

MAX6316/MAX6317/MAX6318/MAX6320/MAX6321

NORMALIZED WATCHDOG TIMEOUT

PERIOD vs. TEMPERATURE

MAX6316toc05

TEMPERATURE (°C)

NORMALIZED WATCHDOG TIMEOUT PERIOD

PASSIVE

4.7kΩ

PULLUP

2V/div

RESET, ACTIVE

PULLUP

2V/div

RESET

INPUT

5V/div

200ns/div

MAX6316M/6318MH/6319MH

BIDIRECTIONAL

PULLUP CHARACTERISTICS

MAX6316toc07

100pF

4.7kΩ

+5V

74HC05

74HC05 VCC

GND

100pF

INPUT

+5V

RESET

-40 0 20-20 40 60 80 100

MAX6316/MAX6317/MAX6318/MAX6320/MAX6321

SUPPLY CURRENT vs. TEMPERATURE

MAX6316toc01

TEMPERATURE (°C)

SUPPLY CURRENT (µA)

VCC = 5V

VCC = 3V

VCC = 1V

100

-40 -20 0 20 40 60 80 100

VCC FALLING TO RESET PROPAGATION

DELAY vs. TEMPERATURE

MAX6316toc02

TEMPERATURE (°C)

RESET PROPAGATION DELAY (µs)

VCC FALLING AT 1mV/µs

VRST - VCC = 100mV

140

180

160

240

220

200

300

280

260

320

-40 0 20-20 40 60 80 100

MAX6316/MAX6317/MAX6319/MAX6320/MAX6322

MANUAL RESET TO RESET

PROPAGATION DELAY vs. TEMPERATURE

MAX6316toc03

TEMPERATURE (°C)

PROPAGATION DELAY (ns)

VCC = 5V

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MAX6316–MAX6322 5-Pin μP Supervisory Circuits with

Watchdog and Manual Reset

NAME

FUNCTION

MAX6316L

MAX6316M

MAX6320P

MAX6317H

MAX6318LH

MAX6318MH

MAX6321HP

MAX6319LH

MAX6319MH

MAX6322HP

1 — 1 1

RESET

MAX6316L/MAX6318LH/MAX6319LH:

Active-

Low, Reset Output.

CMOS

push/pull

output

(sources and sinks current).

MAX6316M/MAX6318MH/MAX6319MH:

Bidirectional,

Active-Low, Reset

Output.

Intended to interface directly to

microprocessors

with bidirectional resets such as the Motorola

68HC11.

MAX6320P/MAX6321HP/MAX6322HP:

Open-Drain, Active-Low,

Reset

Output.

NMOS

out-

put (sinks current only). Connect a pullup resistor

from

RESET

to any supply voltage up to 6V.

— 1 3 3

RESET Active-High,

Reset

Output.

CMOS

push/pull output

(sources and sinks current). Inverse of RESET.

2222

GND Ground

3 3 — 4

Active-Low, Manual

Reset

Input.

Pull

low to force

a reset. Reset remains asserted for the duration

of the

Reset Timeout Period after MR transitions

from

low to high. Leave unconnected or connected

to VCC if not

used.

4 4 4 —

WDI

Watchdog Input. Triggers a reset if it remains either

high or low for the duration of the watchdog

timeout

period. The internal

watchdog

timer

clears

whenever

a reset asserts or

whenever WDI

sees a

rising or falling edge. To disable the

watchdog

fea-

ture, leave

WDI

unconnected or

three-state

the

dri-

ver

connected

WDI.

5 5 5 5

VCC

Supply Voltage. Reset is asserted when VCC

drops below the Reset Threshold Voltage (VRST).

Reset remains asserted until VCC rises above

RST

and for the duration of the Reset Timeout

Period (tRP) once VCC rises above VRST.

Pin Description

MAX6316–MAX6322 5-Pin μP Supervisory Circuits with

Watchdog and Manual Reset

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Detailed Description

A microprocessor’s (μP) reset input starts or restarts the

μP in a known state. The reset output of the MAX6316–

MAX6322 μP supervisory circuits interfaces with the

reset input of the μP, preventing code-execution errors

during power-up, power-down, and brownout condi-

tions (see the Typical Operating Circuit). The MAX6316/

MAX6317/MAX6318/MAX6320/MAX6321 are also capa-

ble of asserting a reset should the μP become stuck in

an infinite loop.

Reset Output

The MAX6316L/MAX6318LH/MAX6319LH fea-

ture an active-low reset output, while the MAX6317H

MAX6318_H/MAX6319_H/MAX6321HP/MAX6322HP

feature an active-high reset output. RESET is guaranteed

to be a logic low and RESET is guaranteed to be a logic

high for VCC down to 1V.

The MAX6316–MAX6322 assert reset when VCC is

below the reset threshold (VRST), when MR is pulled

low (MAX6316_/MAX6317H/MAX6319_H/MAX6320P/

MAX6322HP only), or if the WDI pin is not serviced

within the watchdog timeout period (tWD). Reset remains

asserted for the specified reset active timeout period (tRP)

after VCC rises above the reset threshold, after MR transi-

tions low to high, or after the watchdog timer asserts the

reset (MAX6316_/MAX6317H/MAX6318_H/MAX6320P/

MAX6321HP). After the reset active timeout period (tRP)

expires, the reset output deasserts, and the watchdog

timer restarts from zero (Figure 2).

Figure 2. Reset Timing Diagram

Figure 1. Functional Diagram

MAX6316–MAX6322

VCC

WDI

(ALL EXCEPT

MAX6319/MAX6322)

1.23V

52kΩ

GND

RESET

(ALL EXCEPT

MAX6316/MAX6320P)

RESET

(ALL EXCEPT MAX6317)

(ALL EXCEPT

MAX6318/MAX6321)

RESET

GENERATOR

WATCHDOG

TIMER

WATCHDOG

TRANSITION

DETECTOR

VCC

tRD

VRST VRST

tRD

RESET

GND

RESET

tRP

GND

MAX6316–MAX6322 5-Pin μP Supervisory Circuits with

Watchdog and Manual Reset

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Bidirectional RESET Output

The MAX6316M/MAX6318MH/MAX6319MH are

designed to interface with μPs that have bidirectional

reset pins, such as the Motorola 68HC11. Like an open-

drain output, these devices allow the μP or other devices

to pull the bidirectional reset (RESET) low and assert a

reset condition. However, unlike a standard open-drain

output, it includes the commonly specified 4.7kΩ pullup

resistor with a P-channel active pullup in parallel.

This configuration allows the MAX6316M/MAX6318MH/

MAX6319MH to solve a problem associated with μPs that

have bidirectional reset pins in systems where several

devices connect to RESET (Figure 3). These μPs can

often determine if a reset was asserted by an external

device (i.e., the supervisor IC) or by the μP itself (due to

a watchdog fault, clock error, or other source), and then

jump to a vector appropriate for the source of the reset.

However, if the μP does assert reset, it does not retain the

information, but must determine the cause after the reset

has occurred.

The following procedure describes how this is done in

the Motorola 68HC11. In all cases of reset, the μP pulls

RESET low for about four external-clock cycles. It then

releases RESET, waits for two external-clock cycles, then

checks RESET’s state. If RESET is still low, the μP con-

cludes that the source of the reset was external and, when

RESET eventually reaches the high state, it jumps to the

normal reset vector. In this case, stored-state information

is erased and processing begins from scratch. If, on the

other hand, RESET is high after a delay of two external-

clock cycles, the processor knows that it caused the reset

itself and can jump to a different vector and use stored-

state information to determine what caused the reset.

A problem occurs with faster μPs; two external-clock

cycles are only 500ns at 4MHz. When there are several

devices on the reset line, and only a passive pullup resis-

tor is used, the input capacitance and stray capacitance

can prevent RESET from reaching the logic high state

(0.85 x VCC) in the time allowed. If this happens, all resets

will be interpreted as external. The μP output stage is

guaranteed to sink 1.6mA, so the rise time can not be

reduced considerably by decreasing the 4.7kΩ internal

pullup resistance. See Bidirectional Pullup Characteristics

in the Typical Operating Characteristics.

The MAX6316M/MAX6318MH/MAX6319MH overcome

this problem with an active pullup FET in parallel with the

4.7kΩ resistor (Figures 4 and 5). The pullup transistor

holds RESET high until the μP reset I/O or the supervi-

sory circuit itself forces the line low. Once RESET goes

below VPTH, a comparator sets the transition edge flip-

flop, indicating that the next transition for RESET will be

low to high. When RESET is released, the 4.7kΩ resistor

pulls RESET up toward VCC. Once RESET rises above

VPTH but is below (0.85 x VCC), the active P-channel

pullup turns on. Once RESET rises above (0.85 x VCC)

or the 2μs one-shot times out, the active pullup turns

off. The parallel combination of the 4.7kΩ pullup and the

Figure 3. MAX6316M/MAX6318MH/MAX6319MH Supports Additional Devices on the Reset Bus

4.7kΩ

MR**

CIN

RESET

CIRCUITRY

RESET***

WDI*

VCC

MAX6316M

MAX6318MH

MAX6319MH

CSTRAY

68HC11

RESET

CIRCUITRY

CIN

RESET

VCC

OTHER DEVICES

CIN

MAX6316M/MAX6318MH

MAX6316M/MAX6319MH

ACTIVE-HIGH PUSH/PULL MAX6318MH/MAX6319MH

***

MAX6316–MAX6322 5-Pin μP Supervisory Circuits with

Watchdog and Manual Reset

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Figure 4. MAX6316/MAX6318MH/MAX6319MH Bidirectional Reset Output Functional Diagram

VCC

MAX6316M

MAX6318MH

MAX6319MH

LASER-

TRIMMED

RESISTORS

VREF

VCC

52kΩ

WDI

(MAX6316M/

MAX6318MH)

(MAX6316M/

MAX6319MH)

RESET

GENERATOR

2µs ONE SHOT

2s ONE SHOT

WATCHDOG ON

CIRCUITRY

TRANSITION

FLIP-FLOP

R Q

VCC

4.7kΩ

RESET

ACTIVE PULLUP

ENABLE COMPARATOR

0.65V 0.85VCC

GND

MAX6316–MAX6322 5-Pin μP Supervisory Circuits with

Watchdog and Manual Reset

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P-channel transistor on-resistance quickly charges stray

capacitance on the reset line, allowing RESET to transi-

tion from low to high within the required two electronic-

clock cycles, even with several devices on the reset line.

This process occurs regardless of whether the reset was

caused by VCC dipping below the reset threshold, the

watchdog timing out, MR being asserted, or the μP or

other device asserting RESET. The parts do not require

an external pullup. To minimize supply current con-

sumption, the internal 4.7kΩ pullup resistor disconnects

from the supply whenever the MAX6316M/MAX6318MH/

MAX6319MH assert reset.

Open-Drain RESET Output

The MAX6320P/MAX6321HP/MAX6322HP have an

active-low, open-drain reset output. This output structure

will sink current when RESET is asserted. Connect a pul-

lup resistor from RESET to any supply voltage up to 6V

(Figure 6). Select a resistor value large enough to regis-

ter a logic low (see Electrical Characteristics), and small

enough to register a logic high while supplying all input

current and leakage paths connected to the RESET line.

A 10kΩ pullup is sufficient in most applications.

Manual-Reset Input

The MAX6316_/MAX6317H/MAX6319_H/MAX6320P/

MAX6322HP feature a manual reset input. A logic low on

MR asserts a reset. After MR transitions low to high, reset

remains asserted for the duration of the reset timeout

period (tRP). The MR input is connected to VCC through

an internal 52kΩ pullup resistor and therefore can be left

unconnected when not in use. MR can be driven with

TTL-logic levels in 5V systems, with CMOS-logic levels in

3V systems, or with open-drain or open-collector output

devices. A normally-open momentary switch from MR to

ground can also be used; it requires no external debounc-

ing circuitry. MR is designed to reject fast, negative-going

transients (typically 100ns pulses). A 0.1μF capacitor from

MR to ground provides additional noise immunity.

The MR input pin is equipped with internal ESD-protection

circuitry that may become forward biased. Should MR

be driven by voltages higher than VCC, excessive cur-

rent would be drawn, which would damage the part. For

example, assume that MR is driven by a +5V supply other

than VCC. If VCC drops lower than +4.7V, MR’s absolute

maximum rating is violated [-0.3V to (VCC + 0.3V)], and

undesirable current flows through the ESD structure from

MR to VCC. To avoid this, use the same supply for MR as

the supply monitored by VCC. This guarantees that the

voltage at MR will never exceed VCC.

Watchdog Input

The MAX6316_/MAX6317H/MAX6318_H/MAX6320P/

MAX6321HP feature a watchdog circuit that monitors the

μP’s activity. If the μP does not toggle the watchdog input

(WDI) within the watchdog timeout period (tWD), reset

asserts. The internal watchdog timer is cleared by reset

or by a transition at WDI (which can detect pulses as

short as 50ns). The watchdog timer remains cleared while

reset is asserted. Once reset is released, the timer begins

counting again (Figure 7).

The WDI input is designed for a three-stated output

device with a 10μA maximum leakage current and the

capability of driving a maximum capacitive load of 200pF.

The three-state device must be able to source and sink at

least 200μA when active. Disable the watchdog function

by leaving WDI unconnected or by three-stating the driver

connected to WDI. When the watchdog timer is left open

circuited, the timer is cleared internally at intervals equal

to 7/8 of the watchdog period.

Figure 5. Bidirectional RESET Timing Diagram

Figure 6. MAX6320P/MAX6321HP/MAX6322HP Open-Drain

RESET Output Allows Use with Multiple Supplies

RESET

RESET PULLED LOW

BY µC OR

RESET GENERATOR

ACTIVE

PULLUP

TURNS ON

VCC

0.7V

0.8 x VCC

tRP

µC RESET DELAY

MAX6320

MAX6321

MAX6322

VCC

GND

RESET

WDI**

MR*

RESET***

MAX6320/MAX6322

MAX6320/MAX6321

MAX6321/MAX6322

***

5V SYSTEM

+5.0V+3.3V

10kΩ

MAX6316–MAX6322 5-Pin μP Supervisory Circuits with

Watchdog and Manual Reset

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Applications Information

Watchdog Input Current

The WDI input is internally driven through a buffer and

series resistor from the watchdog counter. For minimum

watchdog input current (minimum overall power con-

sumption), leave WDI low for the majority of the watchdog

timeout period. When high, WDI can draw as much as

160μA. Pulsing WDI high at a low duty cycle will reduce

the effect of the large input current. When WDI is left

unconnected, the watchdog timer is serviced within the

watchdog timeout period by a low-high-low pulse from the

counter chain.

Negative-Going VCC Transients

These supervisors are immune to short-duration, negative-

going VCC transients (glitches), which usually do not require

the entire system to shut down. Typically, 200ns large-

amplitude pulses (from ground to VCC) on the supply will

not cause a reset. Lower amplitude pulses result in greater

immunity. Typically, a VCC transient that goes 100mV under

the reset threshold and lasts less than 4μs will not trigger a

reset. An optional 0.1μF bypass capacitor mounted close to

VCC provides additional transient immunity.

Ensuring Valid Reset Outputs

Down to VCC = 0V

The MAX6316_/MAX6317H/MAX6318_H/MAX6319_H/

MAX6321HP/MAX6322HP are guaranteed to operate

properly down to VCC = 1V. In applications that require

valid reset levels down to VCC = 0V, a pulldown resistor to

active-low outputs (push/pull and bidirectional only, Figure

8) and a pullup resistor to active-high outputs (push/pull

only, Figure 9) will ensure that the reset line is valid while

the reset output can no longer sink or source current. This

scheme does not work with the open-drain outputs of the

MAX6320/MAX6321/MAX6322. The resistor value used

is not critical, but it must be large enough not to load the

reset output when VCC is above the reset threshold. For

most applications, 100kΩ is adequate.

Watchdog Software Considerations

(MAX6316/MAX6317/MAX6318/

MAX6320/MAX6321)

One way to help the watchdog timer monitor software

execution more closely is to set and reset the watchdog

input at different points in the program, rather than puls-

ing the watchdog input high-low-high or low-high-low. This

technique avoids a stuck loop, in which the watchdog

timer would continue to be reset inside the loop, keeping

the watchdog from timing out.

Figure 7. Watchdog Timing Relationship Figure 8. Ensuring RESET Valid to VCC = 0V on Active-Low

Push/Pull and Bidirectional Outputs

Figure 9. Ensuring RESET Valid to VCC = 0V on Active-High

Push/Pull Outputs

VCC

tWD tRP

tRP

tRST

WDI

RESET

MAX6316/MAX6317

MAX6318/MAX6320

MAX6321

GND

100kΩ

VCC

RESET

MAX6316

MAX6318

MAX6319

GND

*THIS SCHEMATIC DOES NOT WORK ON THE OPEN-DRAIN

OUTPUTS OF THE MAX6321/MAX6322.

100kΩ

VCC

RESET

MAX6317

MAX6318

MAX6319

MAX6321*

MAX6322*

MAX6316–MAX6322 5-Pin μP Supervisory Circuits with

Watchdog and Manual Reset

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Figure 10 shows an example of a flow diagram where the

I/O driving the watchdog input is set high at the beginning

of the program, set low at the end of every subroutine or

loop, then set high again when the program returns to the

beginning. If the program should hang in any subroutine,

the problem would be quickly corrected, since the I/O is

continually set low and the watchdog timer is allowed to

time out, causing a reset or interrupt to be issued. As

described in the Watchdog Input Current section, this

scheme results in higher time average WDI current than

does leaving WDI low for the majority of the timeout

period and periodically pulsing it low-high-low.

Figure 10. Watchdog Flow Diagram

Pin Congurations Typical Operating Circuit

START

SET WDI

HIGH

PROGRAM

CODE

SUBROUTINE OR

PROGRAM LOOP

SET WDI LOW

RETURN

POSSIBLE

INFINITE LOOP PATH

GND

WDIMR

1 5 VCC

RESET

MAX6316

MAX6320

SOT23

TOP VIEW

3 4

GND

WDIMR

1 5 VCC

RESET

MAX6317

SOT23

3 4

GND

WDIRESET

1 5 VCC

RESET

MAX6318

MAX6321

SOT23

3 4

GND

MRRESET

1 5 VCC

RESET

MAX6319

MAX6322

SOT23

3 4

MAX6316

GND

MANUAL

RESET

I/O

WDIMR

GND

µP

VCC

VIN

VCC

RESET RESET

MAX6316–MAX6322 5-Pin μP Supervisory Circuits with

Watchdog and Manual Reset

www.maximintegrated.com Maxim Integrated

│

Table 1. Factory-Trimmed Reset Thresholds

Table 2. Standard Versions

PART

TA =

+25°C

TA = -40°C to

+125°C

MIN TYP MAX MIN MAX

MAX63___50_ _-T 4.925 5.000

5.075

4.875

5.125

MAX63___49_ _-T 7.827 4.900

4.974

4.778

5.023

MAX63___48_ _-T 4.728 4.800

4.872

4.680

4.920

MAX63___47_ _-T 4.630 4.700 4.771 4.583 4.818

MAX63___46_ _-T 4.561 4.630 4.699 4.514 4.746

MAX63___45_ _-T 4.433 4.500 4.568 4.388 4.613

MAX63___44_ _-T 4.314 4.390

4.446

4.270

4.490

MAX63___43_ _-T 4.236 4.300

4.365

4.193

4.408

MAX63___42_ _-T 4.137 4.200

4.263

4.095

4.305

MAX63___41_ _-T 4.039 4.100

4.162

3.998

4.203

MAX63___40_ _-T 3.940 4.000 4.060 3.900 4.100

MAX63___39_ _-T 3.842 3.900

3.959

3.803

3.998

MAX63___38_ _-T 3.743 3.800

3.857

3.705

3.895

MAX63___37_ _-T 3.645 3.700 3.756 3.608 3.793

MAX63___36_ _-T 3.546 3.600 3.654 3.510 3.690

MAX63___35_ _-T 3.448 3.500

3.553

3.413

3.588

MAX63___34_ _-T 3.349 3.400

3.451

3.315

3.485

MAX63___33_ _-T 3.251 3.300 3.350 3.218 3.383

MAX63___32_ _-T 3.152 3.200 3.248 3.120 3.280

MAX63___31_ _-T 3.034 3.080

3.126

3.003

3.157

MAX63___30_ _-T 2.955 3.000

3.045

2.925

3.075

MAX63___29_ _-T 2.886 2.930

2.974

2.857

3.000

MAX63___28_ _-T 2.758 2.800

2.842

2.730

2.870

MAX63___27_ _-T 2.660 2.700 2.741 2.633 2.768

MAX63___26_ _-T 2.591 2.630 2.669 2.564 2.696

MAX63___25_ _-T 2.463 2.500 2.538 2.438 2.563

PART RESET

THRESHOLD (V)

MINIMUM

RESET

TIMEOUT (ms)

TYPICAL

WATCHDOG

TIMEOUTS (s)

SOT

TOP

MARK

MAX6316LUK29CY-T 2.93 140 1.6 ACDE

MAX6316LUK46CY-T 4.63 140 1.6 ACDD

MAX6316MUK29CY-T 2.93 140 1.6 ACDG

MAX6316MUK46CY-T 4.63 140 1.6 ACDF

MAX6317HUK46CY-T 4.63 140 1.6 ACDQ

MAX6318LHUK46CY-T 4.63 140 1.6 ACDH

MAX6318MHUK46CY-T 4.63 140 1.6 ACDJ

MAX6319LHUK46C-T 4.63 140 — ACDK

MAX6319MHUK46C-T 4.63 140 — ACDM

MAX6316–MAX6322 5-Pin μP Supervisory Circuits with

Watchdog and Manual Reset

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│

Table 2. Standard Versions (continued)

Note: Thirteen standard versions are available, with a required order increment of 2500 pieces. Sample stock is generally held on

standard versions only. The required order increment for nonstandard versions is 10,000 pieces. Contact factory for availability.

Devices are available in both leaded and lead(Pb)-free packaging.

Specify lead-free by replacing “-T” with “+T” when ordering.

/V Denotes an automotive-qualified part.

Note: These devices are available with factory-set VCC reset

thresholds from 2.5V to 5V, in 0.1V increments. Insert the

desired nominal reset threshold (25 to 50, from Table 1) into

the blanks following the letters UK. All devices offer factory-pro-

grammed reset timeout periods. Insert the letter corresponding

to the desired reset timeout period (A, B, C, or D from Table 3)

into the blank following the reset threshold suffix. Parts that offer

a watchdog feature (see Selector Guide) are factory-trimmed

to one of four watchdog timeout periods. Insert the letter corre-

sponding to the desired watchdog timeout period (W, X, Y, or Z

from Table 3) into the blank following the reset timeout suffix.

Table 3. Reset/Watchdog Timeout Periods

PART RESET

THRESHOLD (V)

MINIMUM

RESET

TIMEOUT (ms)

TYPICAL

WATCHDOG

TIMEOUTS (s)

SOT

TOP

MARK

MAX6320PUK29CY-T 2.93 140 1.6 ACDO

MAX6320PUK46CY-T 4.63 140 1.6 ACDN

MAX6321HPUK46CY-T 4.63 140 1.6 ACGL

MAX6322HPUK46C-T 4.63 140 1.6 ACGN

RESET TIMEOUT PERIODS

SUFFIX MIN TYP MAX UNITS

A 1 1.6 2

B20 30 40

C 140 200 280

D1.12 1.60 2.24 s

WATCHDOG TIMEOUT

W4.3 6.3 9.3 ms

X 71 102 153

Y 1.12 1.6 2.4 s

Z 17.9 25.6 38.4

PART TEMP RANGE PIN-PACKAGE

MAX6316LUK____-T -40°C to +125°C 5 SOT23

MAX6316LUK____/V+T -40°C to +125°C 5 SOT23

MAX6316MUK____-T -40°C to +125°C 5 SOT23

MAX6317HUK____-T -40°C to +125°C 5 SOT23

MAX6318HUK____-T -40°C to +125°C 5 SOT23

MAX6318MHUK____-T -40°C to +125°C 5 SOT23

MAX6319LHUK___-T -40°C to +125°C 5 SOT23

MAX6319MHUK___-T -40°C to +125°C 5 SOT23

MAX6320PUK____-T -40°C to +125°C 5 SOT23

MAX6320PUK____/V+T -40°C to +125°C 5 SOT23

MAX6321HPUK___-T -40°C to +125°C 5 SOT23

MAX6322HPUK___-T -40°C to +125°C 5 SOT23

Ordering Information

Chip Information

SUBSTRATE IS INTERNALLY CONNECTED TO V+

MAX6316–MAX6322 5-Pin μP Supervisory Circuits with

Watchdog and Manual Reset

www.maximintegrated.com Maxim Integrated

│

REVISION

NUMBER

REVISION

DATE DESCRIPTION PAGES

CHANGED

0 1/98 Initial release. —

1 4/98 Update to show MAX6319 as an existing part. 1, 2, 12

2 7/98 Update specications, Selector Guide, and Table 2. 1, 12, 14

3 1/99 Include extended temperature range in EC table globals, Table 1, Ordering

Information.1, 2, 3, 12, 13, 14

4 11/99 Update available products and versions in Table 2 and Ordering Information. 1, 12, 14

5 9/02 Addition of RESET rise time specication to Electrical Characteristics table. 1, 2

6 12/05 Add lead-free option to Ordering Information. 1, 13, 14

7 11/07 Add automotive temperature to Ordering Information, Electrical Characteristics

table, Table 1, and updated Package Information.1, 2, 3, 12, 13, 14

8 8/09 Updated Ordering Information. 13

9 6/10 Added automotive part and soldering temperatures. 2, 13

10 10/11 Added automotive-qualied part ordering option for MAX6316 family 1

11 2/13 Changed /V-T su󰀩x to /V+T in Ordering Information 1

12 4/15 Updated the General Description and Benets and Features sections 1

13 5/17 Added AEC-Q100 qualication 1

13.1 Corrected typo 1

14 11/18 Updated Package Information 2

Revision History

Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses

are implied. Maxim Integrated reserves the right to change the circuitry and specications without notice at any time. The parametric values (min and max limits)

shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.

│

MAX6316–MAX6322 5-Pin μP Supervisory Circuits with

Watchdog and Manual Reset

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