CS5340-CZ - Cirrus Logic, Inc.

Advance Product Information This document contains information for a new product.

Cirr us Logic reserves the right to modify this product wi thout notice.



Cirrus Logi c, Inc. 2003

www.cirrus.com

CS5340

101 dB, 192 kHz, Multi-Bit Audio A/D Converter

Features



Advanced multi-bit Delta-Sigma architecture



24-bit conversion



Supports all audio sample rates including

192 kHz



101 dB Dynamic Range at 5 V



-94 dB THD+N



High pass filter to remove DC offsets



Analog/dig i tal cor e sup plies fr om 3 .3 V to 5 V



Supports logic levels between 1.8 V and 5 V



Low latency digital filter



Auto-mode selection



Pin compatible with the CS5341

General Description

The CS5340 is a complete analog-to-digital converter for

digital audio systems. It performs sampling, analog-to-

digital conversion and anti-alias filtering, generating

24-bit values for both left and right inputs in serial form at

sample rates up to 200 kHz per c hannel.

The CS5340 uses a 5th-order, multi-bit Delta-Sigma

modulator followed by digital filtering and decimation,

which removes the need for an external anti-alias filter.

The CS5340 is ideal for audio systems requiring wide dy-

namic range, negligible distortion and low noise, such as

set-top boxes, DVD-karaoke players, DVD recorders,

A/V receivers, and automotive applications.

ORDERING INFORMATION

CS5340-CZ -10° to 70° C 16-pin TSSOP

CS5340-DZ -40° to 85° C 16-pin TSSOP

CDB53 40 Evaluation Board

Voltage Reference Serial Outpu t Interface

Digital

Filter

High

Pass

Filter

High

Pass

Filter

Decimation

Digital

Filter

Decimation

DAC

S/H

DAC

S/H

AINR

SCLK SDOUT MCLK

RST

VQ LRCK

AINL

FILT+ M0

REFGND V

LP F ilt er

LP Filter

GND

3.3V - 5 .0 V 3.3V - 5.0V

1.8V - 5.0V

JUL ‘03

DS601A2

CS5340

TABLE OF CONTENTS

1 CHARACTERISTICS AND SPECIFICATIONS .........................................................................4

SPECIFIED OPERAT ING CONDITIONS...... ..... .... ..... ..... ..... .... ..... ..... ..... .... ..... ..... .... ..... ..... ....4

ABSOLUTE MAXIMUM RATINGS ...........................................................................................4

ANALOG CHARA CTERI STICS (CS5340-CZ)..........................................................................5

ANALOG CHARA CTERI STICS (CS5340-IZ). .............................................................. ............7

DIGITAL FILTER CHARACTE RI STICS....... .... ..... ..... ..... .... ..... ..... .... ..... ..... ..... .... ............ ..... ....9

DC ELECTRI CAL CHARACTERISTICS... ..... ..... .... ..... ..... ..... .... ..... ..... ..... .... ..... ..... .... ..... ..... ..12

DIGITAL CHARACTERIST ICS..... ..... ..... ..... .... ..... ..... ..... .... ..... ..... .... ..... ..... ..... .... ..... ............ ..12

THERMAL CHARACTERISTICS.. ..... ..... ..... .... ..... ..... ..... .... ..... ..... .... ..... ..... ..... .... ..... ..... ..... ....12

SWITCHING CHARACTERISTICS - SERIAL AUDIO PORT.................................................13

2 PIN DESCRIPTION .................................................................................................................15

3 TYPICAL CONNECTION DIAGRAM .......................................................................................16

4 APPLICATIO NS . ..... .... ..... ..... ..... .... ..... ..... ..... .... ..... ............ ..... .... ..... ..... ..... .... ............ ..... . ........17

4.1 Single, Double, and Quad Speed Modes ......... ............ ............ .............. ....... ............ .......17

4.2 Operation as Either a Clock Master or Slave ...................................................................17

4.2.1 Oper a tion as a Clock Maste r . ..... ..... .... ..... ..... ..... .... ..... ..... ..... ........... ..... ..... ..... ....17

4.2.2 Ope ra tion as a Clock Slav e . ..... .... ..... ..... ..... .... ..... ..... ............ .... ..... ..... ............ ....18

4.2.3 Maste r Clock .... ..... .... ..... ..... ..... .... ..... ..... ..... ........... ..... ..... ..... ........... ..... ..... ..... ....19

4.3 Se r i a l Au dio In te rface ...... ..... ..... ............ .... ..... ..... ............ .... ..... ..... ............ .... ..... ..... .........19

4.4 Power-up Sequence .............. ....... ..... ....... ....... ............ ....... ..... ....... ....... ....... ....... .......... ..20

4.5 Analog Connections . ....... .............. ................... ................. ......... ................... ...................20

4.6 Grounding and Power Supply Decoupling .......................... ............ ....... ....... ............ .......21

4.7 Syn ch r o n i za tion of Mul ti p le Dev ices ......... ..... ..... ............ .... ..... ..... ..... .... ..... ............ ..... ....21

5 PARAMETER DEFI NITIONS ..... .... .......... ..... .... ..... ..... ..... .... ..... ..... .... ..... ..... ..... .... ..... ..... ..... ....22

6 PACKAGE DIMENSIONS .......................................................................................................23

Contacting Cirrus Logic Support

For all pr oduct quest ions and inquiries cont act a Cir rus Logic Sale s Represe nta tiv e.

To find one nearest you go to www.cirrus.com/

IMP ORTANT NOTICE

"Advanced" product information describes products that are in development and subject to development changes. Cirrus Logic, Inc. and its subsidia ries

("Cirrus") believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice

and is provided "AS IS" withou t w arrant y of any k in d (expr ess or impli ed). Cust omers are advised to obta i n th e l atest v e rsion of relevant information to

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assumed by Cirrus for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringeme n

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THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES.

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be trademarks or service marks of their respective owner s.

CS5340
3
LIST OF FIGURES
Figure 1. Single Speed Mode Stopb and Reject ion.. ..................................................................... 10
Figure 2. Single Speed Mode Stopb and Reject ion.. ..................................................................... 10
Figure 3. Single Speed Mode Transition  Band (Detail)............... .......................... ........................ 10
Figure 4. Single Speed Mode Pa ssba nd Ripple ................................................... ........................ 10
Figure 5. Double Speed Mode Stopband Rejection................ ....... ......... .......... ....... ....... ............ .. 10
Figure 6. Double Speed Mode Stopband Rejection................ ....... ......... .......... ....... ....... ............ .. 10
Figure 7. Double Speed Mode Transition Band (Detail) .............................. ....... ....... ....... ............ 11
Figure 8. Double Speed Mode Passband Ripple........ ....... ....... ....... ....... .......... ....... ....... ....... ....... 11
Figure 9. Quad Speed Mode Stopband Rejection ...... .............. ....... ............ .............. ....... ............ 11
Figure 10. Quad Speed Mode Stopband Rejection ...... ............ .............. ............ ............ .............. 11
Figure 11. Quad Speed Mode Transition Band (Detail)................... ....... ............ ....... ............ ....... 11
Figure 12. Quad Speed Mode Passband Ripple......... ............ ....... ......... ............ ....... ....... ............ 11
Figure 13. Master Mode, Left Justified SAI...................................................................................14
Figure 14. Slave Mode, Left Justified SAI..................................................................................... 14
Figure 15. Master Mode, I2S SAI...... ..... .... ............ ..... ..... ............ .... ............ ..... ..... ........... ..... ..... .. 14
Figure 16. Slave Mode, I2S SAI... ..... ..... .... ..... ..... ..... .... ............ ..... ..... ............ .... ............ ..... ..... .... 14
Figure 17. Typical Connection Diagram..... ..... ....... ..... .. .......... .. ....... ..... .. .......... .. ....... ..... ....... ..... .. 16
Figure 18. CS5340 Master Mode Clock ing.. ................................................................................. 18
Figure 19. Left-Justified Serial Audio Interface............................................................................. 20
F igure 20 . I2S Se r ial Audio In te r face. ..... .... ..... ..... ..... ............ .... ..... ............ ..... ........... ..... ..... ......... 20
Figure 21. CS5340 Recomme nded A nalog Input  Buffer............. ................... ............................... 21
LIST OF TABLES
Table 1. Speed Modes and the Associated Output Sample Rates (Fs)................................. ....... 17
Table 2. CS5340 Mode Contro l..................................................................................................... 17
Tabl e  3.  Maste r  Clock (MCL K) Rat ios........... ..... .... ..... ..... ............ .... ..... ..... ..... .... ..... ..... .... ..... ..... .. 1 9
Table 4. Master Clock (MCLK ) Frequenci es for Standard Audio Sam ple Rates ..................... ..... 19

CS5340
4
1 CHARACTERISTICS AND SPECIFICATIONS
(All Min/Max char acteristics and specifications are guaranteed over the Specified Operating Conditions. Typical 
performance characteristics and specifications ar e derived from measurements taken at typic al supply voltages 
and TA = 25°C.)
SPECIFIED OPERATING CONDITIONS 
(GND = 0 V, all voltages with respect to 0 V.)
Notes: 1. This par t is specified at  typical anal og voltages  of 3.3 V and 5.0 V. See Analog Char acterist ics (CS 5340-
CZ) and Analog Char act eri stics (CS53 40-DZ ), below, for details.
ABSOLUTE MAXIMUM  RATINGS 
(GND = 0V, All vo ltages with respect to ground.) (Note 4 )
Notes: 2. Any pin except supplies. Transient currents of up to ±100 mA on the analog input pins will not cause SRC 
latch-up.
3. The maximum over/under voltage is limited by the input current.
4. Operation beyo nd these limits may result in permanent dam age to the device. 
Normal operation is not guaranteed at these extremes.
Parameter Symbol Min  Typ Max Unit
Power Supplies Analog
Digital
Logic
VA
VD
VL
3.1
3.1
1.7
(Note 1)
3.3
3.3
5.25
5.25
5.25
V
V
V
Ambient Operating Temperature Commercial (-CZ)
(-DZ) TAC
TAC
-10
-40 -
-70
85 °C
°C
Parameter Symbol Min Max Units
DC Power Supplies: Analog
Logic
Digital
VA
VL
VD
-0.3
-0.3
-0.3
+6.0
+6.0
+6.0
V
V
V
Input Current (Note 2) Iin -±10 mA
Analog Input Voltage  (Note 3) VIN GND-0.7 VA+0.7 V
Digital In put Vo ltage (Note 3) VIND -0.7 VL+0.7 V
Ambient Operating Temperature (Power Applied) TA-50 +95 °C
Storage Temperature Tstg -65 +150 °C

CS5340

ANALOG CHARACTERISTI CS (CS5 340-CZ) Test conditions (unless otherwise specified):

Input test signal is a 1 kHz sine wa ve; meas ureme nt bandwidth is 10 Hz to 20 kH z.

Parameter Symbol Min Typ Max Unit

VA = 3.3 V

Single Speed Mode Fs = 48 kHz

Dynamic Range A-weighted

unweighted 92

89 98

95 -

-dB

Total Harmonic Distortion + Noise (Note 5)

-1 dB

-20 dB

-60 dB

THD+N -

-91

-75

-35

-85

Double Speed Mode F s = 9 6 kHz

Dynamic Range A-weighted

unweighted

40 kHz bandwidth unweighted

Total Harmonic Distortion + Noise (Note 5)

-1 dB

-20 dB

-60 dB

40 kHz bandwidth -1 dB

THD+N -

-91

-75

-35

-85

Quad Speed Mode Fs = 192 kHz

Dynamic Range A-weighted

unweighted

40 kHz bandwidth unweighted

Total Harmonic Distortion + Noise (Note 5)

-1 dB

-20 dB

-60 dB

40 kHz bandwidth -1 dB

THD+N -

-91

-75

-35

-85

VA = 5.0 V

Single Speed Mode Fs = 48 kHz

Dynamic Range A-weighted

unweighted 95

92 101

98 -

-dB

Total Harmonic Distortion + Noise (Note 5)

-1 dB

-20 dB

-60 dB

THD+N -

-94

-78

-38

-88

Double Speed Mode F s = 9 6 kHz

Dynamic Range A-weighted

unweighted

40 kHz bandwidth unweighted

101

Total Harmonic Distortion + Noise (Note 5)

-1 dB

-20 dB

-60 dB

40 kHz bandwidth -1 dB

THD+N -

-94

-78

-38

-91

-88

CS5340

Note: 5. Referred to the typical full-sca le input voltage

Quad Speed Mode Fs = 192 kHz

Dynamic Range A-weighted

unweighted

40 kHz bandwidth unweighted

101

Total Harmonic Distortion + Noise (Note 5)

-1 dB

-20 dB

-60 dB

40 kHz bandwidth -1 dB

THD+N -

-94

-78

-38

-91

-88

Dynamic Performance for All Modes

Interchannel Iso lation - 90 - dB

DC Accuracy

Interchannel Gain Mismatch - 0.1 - dB

Gain Error - ±5%

G ain D rift - ±100 - ppm/°C

Anal og Input Characteristics

Full-sca le Input Voltage 0.53*VA 0.56*VA 0.59*VA Vpp

Input Impedance 18 - - kΩ

CS5340

ANALOG CHARACTERISTI CS (CS5 340-DZ) Test conditions (unless otherwise specified):

Input test signal is a 1 kHz sine wa ve; meas ureme nt bandwidth is 10 Hz to 20 kH z.

Parameter Symbol Min Typ Max Unit

VA = 3.3 V

Single Speed Mode Fs = 48 kHz

Dynamic Range A-weighted

unweighted 90

87 98

95 -

-dB

Total Harmonic Distortion + Noise (Note 6)

-1 dB

-20 dB

-60 dB

THD+N -

-91

-75

-35

-83

Double Speed Mode F s = 9 6 kHz

Dynamic Range A-weighted

unweighted

40 kHz bandwidth unweighted

Total Harmonic Distortion + Noise (Note 6)

-1 dB

-20 dB

-60 dB

40 kHz bandwidth -1 dB

THD+N -

-91

-75

-35

-85

-83

Quad Speed Mode Fs = 192 kHz

Dynamic Range A-weighted

unweighted

40 kHz bandwidth unweighted

Total Harmonic Distortion + Noise (Note 6)

-1 dB

-20 dB

-60 dB

40 kHz bandwidth -1 dB

THD+N -

-91

-75

-35

-85

-83

VA = 5.0 V

Single Speed Mode Fs = 48 kHz

Dynamic Range A-weighted

unweighted 93

90 101

98 -

-dB

Total Harmonic Distortion + Noise (Note 6)

-1 dB

-20 dB

-60 dB

THD+N -

-94

-78

-38

-86

Double Speed Mode F s = 9 6 kHz

Dynamic Range A-weighted

unweighted

40 kHz bandwidth unweighted

101

Total Harmonic Distortion + Noise (Note 6)

-1 dB

-20 dB

-60 dB

40 kHz bandwidth -1 dB

THD+N -

-94

-78

-38

-91

-86

CS5340

Note: 6. Referred to the typical full-sca le input voltage

Quad Speed Mode Fs = 192 kHz

Dynamic Range A-weighted

unweighted

40 kHz bandwidth unweighted

101

Total Harmonic Distortion + Noise (Note 6)

-1 dB

-20 dB

-60 dB

40 kHz bandwidth -1 dB

THD+N -

-94

-78

-38

-91

-86

Dynamic Performance for All Modes

Interchannel Iso lation - 90 - dB

DC Accuracy

Interchannel Gain Mismatch - 0.1 - dB

Gain Error - ±10 %

G ain D rift - ±100 - ppm/°C

Anal og Input Characteristics

Full-scale I nput Voltage 0.5*VA 0.56 *VA 0.62*VA Vpp

Input Impedance 18 - - kΩ

CS5340
9
DIGITAL FILTER CHARACTERISTICS     (CS5340 - CZ / CS5340 - DZ)  
Note: 7. Response s hown is for Fs e qual to 48 kHz. Filte r characteristics scale with Fs.
8. See “Parameter Definitions” on page 22.
Parameter Symbol Min Typ Max Unit
Single Speed Mode                 Fs = 48 kHz
Passband (-0.1 dB) 0 - 23.5 kHz
Passband Rippl e - - 0.035 d B
Stopband 27.3 - - kHz
Stopband Attenuation 70 - - d B
Total  Group Delay (Fs = Output Sample Rate) tgd -12/Fs - s
Intra-chan nel phase deviation  (Note 8) ∆tgd --±0.2/Fs s
Inter-chan nel phase deviation (Note 8) - - 0 s
Double Speed Mode               Fs = 96 kHz
Passband (-0.1 dB) 0 - 47 kHz
Passband Rippl e - - ±0.025 dB
Stopband 53.8 - - kHz
Stopband Attenuation 69 - - d B
Total  Group Delay (Fs = Output Sample Rate) tgd -9/Fs - s
Intra-chan nel phase deviation (Note 8 ) ∆tgd --±0.2/Fs s
Inter-chan nel phase deviation (Note 8 ) - - 0 s
Quad Speed Mode                   Fs = 192 k Hz
Passband (-0.1 dB) 0 - 50 kHz
Passband Rippl e - - ±0.025 dB
Stopband 96 - - kHz
Stopband Attenuation 60 - - d B
Total  Group Delay (Fs = Output Sample Rate) tgd -5/Fs - s
Intra-chan nel phase deviation (Note 8 ) ∆tgd --0s
Inter-chan nel phase deviation (Note 8 ) - - 0 s
High Pass Filter Characteristics
Frequency Response -3.0 dB
-0.13 dB (Note 7) -1
20 -
-Hz
Hz
Phase Deviation @ 20 Hz (Note 7) - 10 - Deg
Passband Rippl e - - 0 dB

CS5340

Figure 1. Single Speed Mod e Stopban d Rejection Figure 2. Single Speed Mod e Stopba nd Rejection

Figure 3. Single Speed Mode Transi tion Band (Detail) Figure 4. Single Speed Mode Passband Ripple

Figure 5. Double Speed Mode Sto pband Rejection Figure 6. Double Speed Mode Stopba nd Rejection

-140

-130

-120

- 110

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0

Frequency (norma l ized to Fs)

Ampl i tude (dB)

-140

-130

-120

- 110

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0.40 0.42 0.44 0.46 0.48 0.50 0.52 0.54 0.56 0.58 0.60

Freque ncy (normalized to Fs)

Ampl i tude (dB)

-10

-9

-8

-7

-6

-5

-4

-3

-2

-1

0.45 0.46 0.47 0.48 0.49 0.5 0.51 0.52 0.53 0.54 0.55

Frequency (normalized to Fs)

Ampl i tude (dB)

-0.10

-0.08

-0.06

-0.04

-0.02

0.00

0.02

0.04

0.06

0.08

0.10

0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5

Frequency (normalized to F s)

Ampl i tude (dB)

-140

-130

-120

- 110

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0

Frequency (norma l ized to Fs)

Ampl i tude (dB)

-140

-130

-120

- 110

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0.40 0.42 0.44 0.46 0.48 0.50 0.52 0.54 0.56 0.58 0.60

Freque ncy (normalized to Fs)

Ampl i tude (dB)

CS5340

Figure 7 . Double Speed Mode Transit ion Band (Det ail) Figure 8. Double Speed Mode Passband Ripple

Figur e 9. Quad Speed Mode Stop ban d Rejection Figure 10. Quad Speed Mo de Stopb and Rejection

Figure 11. Quad Speed Mode Transi tion Band (Detail) Figure 12. Quad Speed Mode Passband Ripple

-10

-9

-8

-7

-6

-5

-4

-3

-2

-1

0.46 0.47 0.48 0.49 0.50 0.51 0.52

Frequency (normalized to Fs)

Ampl i tude (dB)

-0.10

-0.08

-0.06

-0.04

-0.02

0.00

0.02

0.04

0.06

0.08

0.10

0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50

Frequency (normalized to F s)

Ampl i tude (dB)

-140

-130

-120

- 110

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0

Frequency (norma l ized to Fs)

Ampl i tude (dB)

-140

-130

-120

- 110

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0.20 0.25 0.30 0.35 0.40 0.45 0.50 0.55 0.60 0.65 0.70 0.75 0.80 0.85

Frequency (norma l ized to Fs)

Ampl i tude (dB)

-10

-9

-8

-7

-6

-5

-4

-3

-2

-1

0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50

Frequency (normalized to Fs)

Ampl i tude (dB)

-0.10

-0.08

-0.06

-0.04

-0.02

0.00

0.02

0.04

0.06

0.08

0.10

0.00 0.03 0.05 0.08 0.10 0.13 0.15 0.18 0.20 0.23 0.25 0.28

Freque ncy (normalized to Fs)

Ampl i tude (dB)

CS5340

DC ELECTRICAL CHARACTERISTICS (GND = 0 V, all voltages with respe ct to 0 V.

MCLK =12. 288 M Hz; Mas ter Mode)

Notes: 9. P ower Down Mod e is defined as RST = Low wit h all cl ocks and dat a lines h eld static.

10. Valid with the recommended capac itor values on FILT+ and V Q as shown in the Typical Connection

Diagram.

DIGITAL CHARACTERISTICS

THERMAL CHARACTERISTICS

Parameter Symbol Min Typ Max Unit

DC Power Supplies: Positive Analog

Positive Digital

Positive Logic

3.1

1.7

5.25

Power Supply Current VA = 5 V

(Normal Operation) VA = 3.3 V

VL,VD = 5 V

VL,VD = 3.3 V

18.2

23.1

16.5

Power Supply Current VA = 5 V

(Power-Down Mode) (N ote 9) VL,V D=5 V IA

-1.5

0.4 -

-mA

Power Consu mption VL, VD, VA = 5 V

(Normal Operation) VL, VD, VA = 3.3 V

(Power-Down Mode)

180

9.5

198

100

Power Supply Rejection Ratio (1 kHz) (Note 10) PSRR - 65 - dB

VQ Nominal V oltage

Outp ut Imped ance -

-VA÷2

25 -

-V

kΩ

Filt+ Nom inal Vo ltage

Outp ut Imped ance

Maximum allowable DC current source/sink

0.01

kΩ

Parameter Symbol Min Typ Max Units

High-Level Input Voltage (% of VL) VIH 70% - - V

Low-Lev el Input Voltage (% of VL) VIL --30%V

High-Level Output Voltage at Io = 100 µA(% of VL)

VOH 70% - - V

Low-Level Output Volt age at Io =100 µA(% of VL)

VOL --15%V

Input Leakage Current Iin --±10 µA

Parameter Symbol Min Typ Max Unit

Allowable Junct ion Temperature - - 135 °C

Junction to Am bient Thermal Imped anc e θJA -75 -°C/W

Ambient Operat ing Temperat ure (Power Applied)(-CZ)

(-DZ) TA

-10

-40 -

-+70

+85 °C

°C

CS5340

SWITCHING CHARACTERIS TICS - SERIAL AUDIO PORT (Logic "0" = GND = 0 V;

Lo gic "1" = VL, CL = 20 pF)

* For a description of Speed Modes, please refer to Table 1 on page 17.

Parameter Symbol Min Typ Max Unit

MCLK Speci fications

MCLK Period tclkw 40 - 45 ns

79 - 978 ns

MCLK Pulse Width High tclkh 15 - - ns

MCLK Pulse Width Low tclkl 15 - - ns

Master Mo de

SCLK falling to LRCK tmslr -20 - 20 ns

SCLK falling to SDOUT valid tsdo 0-32ns

SCLK Duty Cycle - 50 - %

Slave Mode

Single Speed*

LRCK Dut y Cycle 40 50 60 %

SCLK Pe r i od t sclkw 156 - - ns

SCLK Low tsclkhl 55 - - ns

SCLK falling to SDOUT valid tdss --32ns

SCLK falling to LRCK e dge tslrd -20 - 20 ns

Double Speed*

LRCK Dut y Cycle 40 50 60 %

SCLK Pe r i od t sclkw 156 - - ns

SCLK Low tsclkhl 55 - - ns

SCLK falling to SDOUT valid tdss --32ns

SCLK falling to LRCK e dge tslrd -20 - 20 ns

Quad Speed *

LRCK Dut y Cycle 40 50 60 %

SCLK Pe r i od t sclkw 78 - - ns

SCLK Low tsclkhl 40 - - ns

SCLK falling to SDOUT valid tdss --32ns

SCLK falling to LRCK e dge tslrd -8 - 8 ns

CS5340

CLK output

tmslr

SDOUT

tsdo

LRCK output

MSB MSB-

SCLK input

LRCK input

sclkl

dss

MSB MSB-1 MSB-2

lrdss

sclkh

tsclkw

SDOUT

srdl

Figur e 13. Master Mode, Left Justified SAI Figure 14. Slave Mode, Left Justified SAI

CLK output

tmslr

tsdo

RCK output

MSB

SDOUT

SCLK input

LRCK input

sclkl

dss

MSB MSB-1

sclkh

tsclkw

SDOUT

Figure 15. Master Mode, I2S SAI Figure 16. Slave Mode, I2S SAI

CS5340

2 PIN DESCRIPTION

Pin Name #Pin Description

M1 1

16 Mode Selecti on (Input) - Determines the operational mode of the device.

MCLK 2Master Clock (Input) - Clock source f or the delt a-sigma modulator and digital fi lters.

VL 3Logic Power (Input) - Positive power for the di gital inp ut/ output.

SDOUT 4Serial Audio Data Output (Output) - Output for two’s complem ent serial audio data.

GND 5,14 Ground (Input) - Ground refere nce. Must be conn ected to analog ground.

VD 6Digital Power (Input) - Positi ve power supp ly for the digital section.

SCLK 7Serial Clock (Input/Output) - Serial clock for the serial a udio inter face.

LRCK 8Left Right Clock (Input/Output) - Determines which channel, Left or Right, is curr ently

active on the ser ial audio data line.

RST 9Reset (Input) - The device enters a low power mode when low.

AINL

AINR 10

12 Analog Input (Input) - The ful l scale analog input level is spec ified in the Analog Charac-

teri stics specific ation tabl e.

VQ 11 Quiescent Voltage (Output) - Filt er connecti on for the internal quiescent

reference voltage.

VA 13 Analog Power (Input) - Positive power supply for the analog s ection.

FILT+ 15 Positive Vol tage Reference (Output) - Positiv e reference vol tage for the internal

sampling circuits.

M0 M1

MCLK FILT+

VL REF_GND

SDOUT VA

GND AINR

VD VQ

SCLK AINL

LRCK RST

CS5340

3 TYPICAL CONNECTION DIAGRAM

FILT+ V

0.1 µF

A/D CONVERTER

SCLK

CS5340

MCLK

1µF+

RST

VA L

1µF1.8V to 5V

1µF

SDOUT

GND

LRCK

Power Down

and Mode

Settings

Audio Data

Processor

Timing Logic

and Clock

0.1 µF

REFGND

1µF

AINL

AINR

.3 V to 5 V

1µF

+0.1 µF

.3 V to 5 V

Ω

5.1

0.1 µF

Ω

10k

VL or GND

* Pul l-up to V L for I2S

Pull-down to GND for LJ

A n a log In pu t B u ffe r

Figure 21

** Resistor may on ly be

used if VD is derived from

VA. If used, do not drive

any other logic from VD

Figure 17. Typical Connection Diagram

CS5340

4 APPLICATIONS

4.1 Single, Double, and Quad Speed Modes

The CS5340 can support output sample rates from 2 kHz to 200 kHz. The proper speed mode can be determined

by the desired output sample rate and the extern al MCL K/LRCK ratio , as shown in Table 1.

* Quad Speed Mode, 64x onl y available in Master Mo de.

Table 1. Speed Mod es and the Associated Output Sample Rates (Fs)

4.2 Operation as Either a Clock Master or Slave

The CS5340 supports operation as either a clock master or slave. As a clock master, the LRCK and SCLK pins are

outputs with the left/right and serial clocks synchronously generated on-chip. As a clock slave, the LRCK and SCLK

pins are inputs and re quire the lef t/right and s erial clock s to be ext ernally ge nerate d. The s elect ion of c lock mast er

or slave is made via the Mode pins as shown in Table 2.

Spee d M ode MCLK/LRCK

Ratio Output Sample Rate Range (kHz)

Single Speed Mode 512x 43 - 50

256x 2 - 50

Double Speed Mod e 256x 86 - 100

128x 50 - 100

Quad Speed Mod e 128x 172 - 200

64x* 100 - 200

M1(Pin 16) M0(Pin 1) MODE

0 0 Clock Master, Single Speed Mode

0 1 Clock Master, Double Speed Mode

1 0 Clock Master, Quad Speed Mode

1 1 Clock Slave, All Speed Modes

Table 2. CS5340 Mode Control

CS5340

4.2.1 Operation as a Clock Master

As a clock ma ster, LRCK and SCLK operate as outputs. T he l eft/right and serial clocks are internally derived from

the master clock with the left/right clock equal to Fs and the serial clock equal to 64x Fs, as shown in Figure 18.

4.2.2 Operation as a Clock Slave

LRCK and SCLK operate as inputs in clock slave mode. It is recommended that the left/right clock be

synchronous ly derived from the master clock and must be equal to Fs. It is also recommen ded that the serial clock

be synchronously derived from the master clock and be equal to 64x Fs to maximize system performance.

A uniqu e fe ature of the CS53 40 is t he au tomat ic s elect ion o f ei the r Single, Doubl e or Quad speed mode when op-

erating as a clock slave. The auto -mode select feature negates the need to configure the Mode pi ns to correspo nd

to the d es ired mode. The auto-m ode selecti on feature supports all standard audio sam ple rates from 2 to 200 kHz.

However, th ere are ranges of non-standa rd audio s ample rates that are not supported whe n operating with a fast

MCLK (512x, 256x, 128x for Single, Double, and Quad Speed Modes respectively). Please refer to T able 1 for sup-

ported sample rate ranges.

÷ 128

÷ 256

÷ 6 4

M0M1

LRCK Output

(Equal to Fs)

Single

Speed

Quad

Speed

Double

Speed

÷ 2

÷ 4

÷ 1

SCLK Output

Single

Speed

Quad

Speed

Double

Speed

÷ 2

÷ 1 0

MCLK

Auto-Select

Figure 18. CS5340 Master Mode Clocking

CS5340

4.2.3 Master Clock

The CS5340 requires a Master clock (MCLK) which runs the internal sampling circuits and digital filters. There is

also an internal MCLK divider which is automatically activated based on the speed mode and frequency of the

MCLK. Table 3 shows a listing of the external MCLK/LRCK ratios that are required. Table 4 lists some common au-

dio output sample rates and the required MCLK frequen cy. Please note that not all of the listed sample rates are

supported when operating with a fast MCLK (512x, 256x, 128x for Single, Double, and Quad Speed Modes respec-

tively).

4.3 Serial Audio Interface

The CS5340 supports both I2S and Left Justified serial audio formats. Upon start-up, the CS5340 will detect the logic

level on SDOUT (pin 4). A 10k pull-up to VL is needed to select I2S format, and a 10k pull-down to GND is need ed

to select Left Justified f orm at. Please see Figures 13 through 16 on page 14, f or m ore i nfo rmation on the required

timing for the two serial audio interface formats.

Sing le Speed Mode Dou ble Speed Mode Quad Speed Mode

MCLK /LRCK Ratio 256x, 512x 128x, 256x 64x*,128x

* Quad Speed, 64x only available in Master Mode.

Tab le 3. Master Clock (MCLK) Ratios

SAMPLE RATE (kHz) MCLK (MHz)

32 8.192

44.1 11.2896

22.5792

48 12.288

24.576

64 8.192

88.2 11.2896

22.5792

96 12.288

24.576

192 12.288

24.576

Tab le 4. Master Clock (MCLK) Fre qu encies for Standard Audio Sampl e Rates

SDATA 23 22 7 623 22

SCLK

LRCK

23 2254321087654321089 9

Left Channel Right Channel

Figure 19. Left-Justified Serial Audio Inter face

SDATA 23 22 8 723 22

SCLK

LRCK

23 2265432108765432109 9

Left Channel Right Channel

Figure 20. I2S Serial Audio Interface

CS5340

4.4 Power-up Sequence

Reliable power-up can be accompli shed by keepin g the device in reset until the power s uppli es, clocks and conf ig-

uration pins are stable. It is also recommended that reset be enabled if the analog or digital supplies drop below the

minimum specified operating voltages to prevent power glitch related issues.

4.5 Analog Connections

The analog modulator samples the input at 6.144 MHz. The digital filter will reject signals within t he stopband of the

filter. However, there is no rejection for input signals which are multiples of the input sampling frequency

(n ×6.144 MHz), where n=0,1,2,... Refer to Figure 21 which shows the suggested filter that will attenuate any noise

energy at 6.144 MHz, in addition to providing the optimum source impedance for the modulators. The use of capac-

itors which h ave a large v oltage c oefficient (su ch as gen eral purpose ceram ics) must be avoide d since these can

degrade signal linearity.

4.6 Grounding and Power Supply Decoupling

As with any high resolution converter, the CS5340 requires careful attention to power supply and grounding arrange-

ments if its poten tia l performance is to be real ized. Figure 17 s hows the recom mended powe r a rrangements, with

VA and VL connected to clean supplies. VD, which powers the digital filter, may be run from the system logic supply

or may be powered from the analog supply via a resistor. In this case, no additional devices should be powered from

VD. Dec oupling capaci tors should be as ne ar to the A DC as pos sible, with the low value ceramic c apacitor being

the nearest. All signals, especially clocks, should be kept a way from the FILT+ and VQ pins in order to avoid un-

wanted coupling into the modulators. The FILT+ and VQ decoupling capacitors, particularly the 0.01 µ F, must be

positioned to minimize the electrical path from FILT+ and REF_GND. The CDB5340 evaluation board demonstrates

the optimum layout and power supply arrangements. To minimize digital noise, connect the ADC digital outputs only

to CMOS inputs .

100kΩ

634 Ω

91Ω

2700 pF

470 pF

COG

CS 5340 AINL

AINL

COG

100kΩ

4.7 uF

100kΩ

INR

100kΩ

4.7 uF

634 Ω

91Ω

470 pF

COG

CS 5340 AIN

2700 pF

COG

Figure 21. CS5340 Recommended Analog Input Buffer

CS5340

4.7 Synchronization of Multiple Devices

In systems where multiple ADCs are required, care must be taken to achieve simultaneous sam pling. To ensure

synchronous sampling, the MCLK and LRCK must be the same for all of the CS5340’s in the system. If only one

master clock source is needed, one solution is to place one CS5340 in Master mode, and slave all of the other

CS5340’s to the one master. If multiple master clock sources are needed, a possible solution would be to supply all

clocks from the sa me ext er nal sour ce and time t he C S5 340 rese t with the in active (falling ) edge of MC LK. Thi s wil l

ensure that all converters begi n sampling on the sam e clock edge.

CS5340

5 PARAMETER DEFINITIONS

Dynamic Range

The ratio of the rms value of the signal to the rms sum of all other spectral components over the specified

bandwidt h. Dynamic Range is a signal-t o-noise ratio measurem ent over the specified bandwidth made

with a -60 dBFS signal. 60 dB is added to resulting measurement to refer the measurement to full-scale.

This techni que ens ures that the distortion components are below the noise level and do not affect the

measurem ent . This measurement techni que has been accep ted by the Audio Engin eering Soc iety,

AES 17-1991, and the Electr onic Industries Assoc iation of Japan, EIAJ CP-307. Expre ssed in decibels.

Total Harmonic Distortion + Noise

The ratio of the rms value of the signal to the rms sum of all other spectral components over the specified

bandwidth (typically 10 Hz to 20 kHz), including distortion components. Expressed in decibels. Measured

at -1 and -20 dB FS as sugges ted in AES17 -1991 An nex A.

Fre quency R es pon se

A measu re of the amplitude response variation from 10 Hz to 2 0 kHz relative to the amplitude response

at 1 kHz . Units in decibels.

Inte rchann e l Is ol at io n

A measure of crosstalk between the left and right channels. Measured for each channel at t he converter's

output wit h no signal to the input under test and a full-scale signal applied to the other channe l. Units in

decibels.

Interchann el Ga in Mism atch

The gain difference between left and right channels. Units in decibels.

Gain Error

The deviat ion from the nominal full-scale analog inp ut for a full-scale digital output .

Gain Drift

The change in gain value with temperature. Units in ppm/°C.

Offset Error

The deviat ion of the mid-scal e transition (111...111 t o 000... 000) from the ideal. Units in mV.

Intra-chann el Phase Deviation

The deviat ion from line ar phase within a given channel.

Inter-chann el Phase Deviation

The difference in phase res ponse bet ween c hannel s .

CS5340

6 PACKAGE DIMENSIONS

Notes: 1. “D” and “E1” a re reference datums and do not included mold flash or protrusions, but do include mold

mismatch and are measured at the parting line, mold flash or protrusions shall not exceed 0.20 m m per

side.

2. Dimension “b” does not include damb ar protrusion/intrusion. Allowable dambar protrusion shall be

0.13 m m total in excess of “b” dimension at maximum material condition. Dambar intrusion shall not

reduce dimension “b” by more than 0.07 mm at lea st material condition.

3. These dimensions apply to the flat section of the lead between 0.10 and 0.25 mm from lead tips.

INCHES MILLIMETERS NOTE

DIM MIN NOM MAX MIN NOM MAX

A -- -- 0.043 -- -- 1.10

A1 0.002 0.004 0.006 0.05 -- 0.15

A2 0.03346 0.0354 0.037 0.85 0.90 0.95

b 0.00748 0.0096 0.012 0.19 0.245 0.30 2,3

D 0.193 0.1969 0.201 4.90 5.00 5.10 1

E 0.248 0.2519 0.256 6.30 6.40 6.50

E1 0.169 0.1732 0.177 4.30 4.40 4.50 1

e -- 0.026 BS C -- -- 0. 065 BSC --

L 0.020 0.024 0.028 0.50 0.60 0.70

∝0° 4° 8° 0° 4° 8°

JEDEC #: MO-153

Controlling Dimension is Millimeters

16L TSSOP (4.4 mm BODY) PACKAGE DRAWING

123

eb2A1

A2 A

SEATING

PLANE

E11

SIDE VIEW

END VIEW

TOP VIEW

∝