Monolithic CMOS Analog Multiplexers
DG506A/DG507A
1
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
General Description
Maxim’s DG506A/DG507A are monolithic CMOS analog
multiplexers. The DG506A is a single 16-channel (1 of
16) multiplexer and the DG507A is a differential 8-chan-
nel (2 of 16) multiplexer.
Both devices feature break-before-make switching.
Maxim guarantees that these multiplexers will not latch-
up if the power supplies are turned off with the input
signals still present as long as absolute maximum ratings
are not violated. The multiplexers operate over a wide
range of power supplies from Q4.5V to Q18V.
Compared to the original manufacturer’s devices,
Maxim’s DG506A/DG507A consume significantly less
power, making them ideal for portable equipment.
Maxim’s DG506A/DG507A meet or exceed the speci-
fications of, and are drop-in replacements for Intersil’s
IH6116 and IH6216, Siliconix’s DG506A and DG507A,
and Harris’ HI506 and HI507.
Applications
Control Systems
Data Logging Systems
Aircraft Heads Up Displays
Data Acquisition Systems
Signal Routing
Features
S Improved 2nd Source
S Pin Compatible with Harris, Siliconix, Intersil
S Operable with ±4.5V to ±18V Supplies
S Symmetrical, Bidirectional Operation
S Logic and Enable Inputs, TTL and CMOS Compatible
S Latch-Up Proof Construction
S Monolithic, Low-Power CMOS Design
19-0482; Rev 4; 6/12
Pin Configurations
Typical Operating Circuit
Ordering Information
Devices are available in a lead(Pb)-free/RoHS-compliant
package, specify lead-free by adding “+” to the part number
when ordering.
Pin Configurations continued in middle of data sheet.
CLOCK IN
QB
QC
QA
AH1
BH1
NC
+15V
+15V
V+
GND
r02
r01
QD
NC
ANALOG
INPUT
(OUTPUTS)
-15V -15V
ANALOG
OUTPUT
(INPUTS)
ENABLE IN
(MUX ON-OFF
CONTROL)
A0A1A2
GND
EN
V+V-
Da
Db
S1b
S8b
S1a
S8a DG507A
8-CHANNEL SEQUENTIAL DIFFERENTIAL MUX/DEMUX
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
D
V-
S8
S7
S6
S5
A2
S4
S3
S2
S1
EN
A0
A1
A3
NC
GND
S9
S10
S11
S12
S13
S14
S15
S16
NC
NC
V+28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Da
V-
S8a
S7a
S6a
S5a
A2
S4a
S3a
S2a
S1a
EN
A0
A1
NC
WIDE SO/DIP WIDE SO/DIP
NC
GND
S1b
S2b
S3b
S4b
S5b
S6b
S7b
S8b
NC
Db
V+
DG506A DG507A
PARTTEMP RANGE PIN-PACKAGE
DG506AAK -55°C to +125°C 28 CERDIP
DG506ABK -25°C to +85°C 28 CERDIP
DG506AC/D 0°C to +70°C Dice
DG506ACJ 0°C to +70°C 28 Plastic Dip
DG506ACK 0°C to +70°C 28 CERDIP
DG506ACWI 0°C to +70°C 28 Wide SO
DG506AMWI/PR -55°C to +125°C 28 Wide SO
DG506AAZ/833B -55°C to +125°C 28 LCC
DG507AAK -55°C to +125°C 28 CERDIP
DG507ABK -25°C to +85°C 28 CERDIP
DG507AC/D 0°C to +70°C Dice
DG507ACJ 0°C to +70°C 28 Plastic DIP
DG507ACK 0°C to +70°C 28 CERDIP
DG507ACWI 0°C to +70°C 28 Wide SO
Monolithic CMOS Analog Multiplexers
DG506A/DG507A
2
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
(Voltages referenced to V-.)
V+ ..........................................................................................44V
GND .......................................................................................25V
Digital Inputs VS, VD (Note 1) .......................-2V to (V+ + 2V) or
20mA, whichever occurs first
Current, Any Terminal Except S or D .................................30mA
Continuous Current, S or D ................................................20mA
Peak Current, S or D (pulsed at 1ms, 10% duty cycle max) ... 40mA
Continuous Power Dissipation (TA = +70°C)*
28-Pin Ceramic DIP (derate 16.7mW/NC above +70NC) .1333mW
28-Pin Plastic DIP (derate 14.3mW/NC above +70NC) ..1143mW
28-Pin Wide SO (derate 12.5mW/°C above +70°C) .1000mW
28-Pin LCC (derate 10.2mW/°C above +70°C) .......816.3mW
Operating Temperature Range (A Suffix) ........ -55NC to +125NC
(B Suffix) .......... -25NC to +85NC
(C Suffix) ................ 0NC to +70N
Storage Temperature (A and B Suffix) ............. -65NC to +150NC
(C Suffix) ....................... -65NC to +125NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow)
Lead (Pb)-free packages ............................................+260NC
Packages containing lead (Pb) ...................................+240NC
ELECTRICAL CHARACTERISTICS
(V+ = 15V, V- = -15V, VGND = 0V, TA = +25NC, unless otherwise indicated.)
ABSOLUTE MAXIMUM RATINGS
*All leads soldered or welded to PCB.
PARAMETER SYMBOL CONDITIONS
DG506AA
DG507AA
DG506AB/C
DG507AB/C UNITS
MIN
(Note 2)
TYP
(Note 3) MAX MIN
(Note 2)
TYP
(Note 3) MAX
SWITCH
Analog Signal
Range VANALOG -15 +15 -15 +15 V
Drain-to-
Source
On-Resistance
RDS(ON)
Sequence each
switch on,
VAL = 0.8V,
VAH = 2.4V,
VEN = 2.4V
VD = 10V,
IS = -200FA270 400 270 450
I
VD = -10V,
IS = -200FA230 400 230 450
Greatest
Change in
Drain-Source
On-Resistance
Between
Channels
RDS(ON)
DS(ON)MAX DS(ON)MIN
DS(ON) DS(ON)AVE
RR
RR

∆=



-10V P VS P +10V 6 6 %
Source Off-
Leakage
Current
IS(OFF) VEN = 0.8V,
VAL = 0.8V
VS = 10V,
VD = -10V -1 0.002 +1 -5 0.002 +5
nA
VS = -10V,
VD = 10V -1 -0.005 +1 -5 -0.005 +5
Drain Off-
Leakage
Current
ID(OFF)
DG506A,
VEN = 0.8V,
VAL = 0.8V
VD = 10V,
VS = -10V -10 0.02 +10 -20 0.02 +20
nA
VD = -10V,
VS = 10V -10 -0.03 +10 -20 -0.03 +20
DG507A,
VEN = 0.8V,
VAL = 0.8V
VD = 10V,
VS = -10V -5 0.007 +5 -10 0.007 +10
VD = -10V,
VS = 10V -5 -0.015 +5 -10 -0.015 +10
Monolithic CMOS Analog Multiplexers
DG506A/DG507A
3
ELECTRICAL CHARACTERISTICS (continued)
(V+ = 15V, V- = -15V, VGND = 0V, TA = +25NC, unless otherwise indicated.)
PARAMETER SYMBOL CONDITIONS
DG506AA
DG507AA
DG506AB/C
DG507AB/C UNITS
MIN
(Note 2)
TYP
(Note 3) MAX MIN
(Note 2)
TYP
(Note 3) MAX
Channel
On-Leakage
Current
ID(ON)
(Note 4)
DG506A,
sequence each
switch on,
VAL = 0.8V,
VAH = 2.4V,
VEN = 2.4V
VS(all) = VD
= 10V -10 0.03 +10 -20 0.03 +20
nA
VS(all) = VD
= -10V -10 -0.06 +10 -20 -0.06 +20
DG507A,
sequence each
switch on,
VAL = 0.8V,
VAH = 2.4V,
VEN = 2.4V
VS(all) = VD
= 10V -5 0.015 +5 -10 0.015 +10
VS(all) = VD
= -10V -5 -0.03 +5 -10 -0.03 +10
INPUT
Address Input
Current, Input-
Voltage High
IAH
VA = 2.4V -10 -0.002 -10 -0.002
FA
VA = 15V 0.006 10 0.006 10
Address Input
Current, Input-
Voltage Low
IAL All VA = 0V
VEN = 2.4V -10 -0.002 -10 -0.002
FA
VEN = 0V -10 -0.002 -10 -0.002
DYNAMIC
Switching Time
of Multiplexer ttransition Figure 1 0.6 1 0.06 Fs
Break-Before-
Make Interval tOPEN Figure 3 0.2 0.2 Fs
Enable Turn-
On Time tON(EN) Figure 2 1 1 Fs
Enable Turn-
Off Time tOFF(EN) Figure 2 0.4 0.4 Fs
Off-Isolation
(Note 5) OIRR VEN = 0V, RL = 1kI, CL =
15pF, VS = 7VRMS, f = 500kHz 68 68 dB
Source Off-
Capacitance CS(OFF) VEN = 0V, f = 140kHz, VS = 0V 6 6 pF
Drain Off-
Capacitance CD(OFF) VEN = 0V,
f = 140kHz
DG506A, VD = 0V 45 45 pF
DG507A, VD = 0V 23 23
SUPPLY
Positive Supply
Current I+VEN = 0 or 5V, all VA = 0V 0.13 0.25 0.13 0.3
mA
Negative
Supply Current I-VEN = 0 or 5V, all VA = 0V -0.15 -0.07 -0.25 -0.07
Monolithic CMOS Analog Multiplexers
DG506A/DG507A
4
ELECTRICAL CHARACTERISTICS (Overtemperature)
(V+ = 15V, V- = -15V, VGND = 0V, TA = overtemperature range, unless otherwise noted.)
PARAMETER SYMBOL CONDITIONS
DG506AA
DG507AA
DG506AB/C
DG507AB/C UNITS
MIN
(Note 2)
TYP
(Note 3) MAX MIN
(Note 2)
TYP
(Note 3) MAX
SWITCH
Analog Signal
Range VANALOG -15 +15 -15 +15 V
Drain-to-Source
On-Resistance RDS(ON)
Sequence each
switch on,
VAL = 0.8V,
VAH = 2.4V,
VEN = 2.4V
VD = 10V, IS
= -200FA500 550
I
VD = -10V,
IS = -200FA500 550
Source Off-
Leakage
Current
IS(OFF) VEN = 0.8V,
VAL = 0.8V
VS = 10V,
VD = -10V -50 +50 -50 +50
nA
VS = -10V,
VD = 10V -50 +50 -50 +50
Drain Off-
Leakage
Current
ID(OFF)
DG506A,
VEN = 0.8V,
VAL = 0.8V
VD = 10V,
VS = -10V -300 +300 -300 +300
nA
VD = -10V,
VS = 10V -300 +300 -300 +300
DG507A,
VEN = 0.8V,
VAL = 0.8V
VD = 10V,
VS = -10V -200 +200 -200 +200
VD = -10V,
VS = 10V -200 +200 -200 +200
Channel
On-Leakage
Current
ID(ON)
(Note 4)
DG506A,
sequence each
switch on,
VAL = 0.8V,
VAN = 2.4V,
VEN = 2.4V
VS(all) = VD
= 10V -300 +300 -300 +300
nA
VS(all) = VD
= -10V -300 +300 -300 +300
DG507A,
sequence each
switch on,
VAL = 0.8V,
VAN = 2.4V,
VEN = 2.4V
VS(all) = VD
= 10V -200 +200 -200 +200
VS(all) = VD
= -10V -200 +200 -200 +200
INPUT
Address Input
Current, Input-
Voltage High
IAH
VA = 2.4V -30 -30
FA
VA = 15V 30 30
Address Input
Current, Input-
Voltage Low
IAL All VA = 0V
VEN = 2.4V -30 -30
FA
VEN = 0V 30 30
Monolithic CMOS Analog Multiplexers
DG506A/DG507A
5
ELECTRICAL CHARACTERISTICS (Overtemperature) (continued)
(V+ = 15V, V- = -15V, VGND = 0V, TA = over temperature range, unless otherwise noted.)
Note 1: Signals on SX, DX, or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum
current ratings.
Note 2: The algebraic convention whereby the most negative value is a minimum, and the most positive value is a maximum, is
used in this data sheet.
Note 3: Typical values are for design aid only, not guaranteed nor subject to production testing.
Note 4: ID(ON) is leakage from driver into on switch.
Note 5: Off-isolation = 20log x VO/VS, VS = input to off switch, VD = output due to VS.
Truth Tables
Switching Time Test Circuits
Figure 1a. Transition Switching Time Figure 1b. Transition Switching Time
Note: Logic “0” = VAL 0.8V, Logic “1” = VAH 2.4V,
“0” = Don’t Care.
+2.4V
±10V
S1
±10VS16
A1
A2
A0
EN
A3
+15V
V+
V-
-15V
DG506A
GND
SWITCH
OUTPUT
VO
1M
D
50
LOGIC
INPUT
S2 THRU S15
35pF
+2.4V
±10V
S1b
±10V
S8b
A1
A2
A0
EN
+15V
V+
V-
-15V
DG507A
GND
SWITCH
OUTPUT
VO
1M
Db
50
LOGIC
INPUT
S2b, AND S7b
S1a THRU S8a, Da
35pF
A3 A2 A1 A0 EN ON SWITCH
X X X X 0 None
0 0 0 0 1 1
0 0 0 1 1 2
0 0 1 0 1 3
0 0 1 1 1 4
0 1 0 0 1 5
0 1 0 1 1 6
0 1 1 0 1 7
0 1 1 1 1 8
1 0 0 0 1 9
1 0 0 1 1 10
1 0 1 0 1 11
1 0 1 1 1 12
1 1 0 0 1 13
1 1 0 1 1 14
1 1 1 0 1 15
1 1 1 1 1 16
A2 A1 A0 EN ON SWITCH
X X X 0 None
0001 1
0011 2
0101 3
0111 4
1001 5
1011 6
1101 7
1111 8
Monolithic CMOS Analog Multiplexers
DG506A/DG507A
6
Switching Time Test Circuits (continued)
Figure 2a. Enable Switching Time
Figure 2b. Enable Switching Time
Figure 3. Break-Before-Make
Figure 4. Timing Diagrams for Figures 1, 2, and 3
-5V
S1
A1
A2
A0
EN
A3
+15V
V+
V-
-15V
DG506A
GND
SWITCH
OUTPUT
VO
1k
D
50
LOGIC
INPUT
S2 THRU S16
35pF
-5V
S1b
A1
A2
A0
EN
+15V
V+
V-
-15V
DG507A
GND
SWITCH
OUTPUT
VO
1k35pF
Db
50
LOGIC
INPUT
S1a THRU S4a, Da,
S2b, S3b, S4b
+2.4V
VS = +5V
ALL S AND Da
A0 A1 A2 A3
EN
+15V
V+
V-
-15V
DG506A
DG507A
GND
SWITCH
OUTPUT
VO
1k
Db, D
50
LOGIC
INPUT
35pF
LOGIC INPUT
tr < 20ns
ti < 20ns
SWITCH OUTPUT
VO
(SEE FIGURE 1)
TRANSITION
TIME
SWITCH OUTPUT
VO
(SEE FIGURE 2)
ENABLE t(ON)/t(OFF)
TIME
SWITCH OUTPUT
VO
(SEE FIGURE 3)
3V
50%
0
tON (En)
0.1 VO
0
0.9 VO
VO
VS
VS
50%
0V
S8 ON
toff (En)
VS1
0.8 VS1
0.8 VS8
VS8
ttransition
S1 ON ttransition
0
OPEN TIME
BREAK-BEFORE-MAKE
INTERVAL tOPEN
Monolithic CMOS Analog Multiplexers
DG506A/DG507A
7
Pin Description
Pin Configurations (continued)
IN15
IN14
IN13
IN12
IN11
IN10
IN9
IN7
IN6
IN5
IN4
IN3
IN2
IN1
IN16
N.C.
N.C.
V+
OUT
V-
IN8
GND
N.C.
A3
A2
A1
A0
EN
LCC
12 13 14 15 16 17 18
1234 2627
28
19
20
21
22
23
24
25
5
6
7
8
9
10
11
DG506A
N.C. = NO INTERNAL CONNECTION
PIN
NAME FUNCTION
DG506A
DIP / SO
DG507A
DIP / SO
1 1 V+ Positive Supply Voltage Input
2, 3 3 N.C. No Connection. Internally not connected.
2 DbAnalog Output Bidirectional Channel b
4 S16 Analog Output Bidirectional Channel 16
4 S8b Analog Output Bidirectional Channel 8b
5 S15 Analog Output Bidirectional Channel 15
5 S7b Analog Output Bidirectional Channel 7b
6 S14 Analog Output Bidirectional Channel 14
6 S6b Analog Output Bidirectional Channel 6b
7 S13 Analog Output Bidirectional Channel 13
7 S5b Analog Output Bidirectional Channel 5b
8 S12 Analog Output Bidirectional Channel 12
8 S4b Analog Output Bidirectional Channel 4b
9 S11 Analog Output Bidirectional Channel 11
9 S3b Analog Output Bidirectional Channel 3b
10 S10 Analog Output Bidirectional Channel 10
10 S2b Analog Output Bidirectional Channel 2b
11 S9Analog Output Bidirectional Channel 9
11 S1b Analog Output Bidirectional Channel 1b
12 12 GND Ground
Monolithic CMOS Analog Multiplexers
DG506A/DG507A
8
Pin Description (continued)
PIN
NAME FUNCTION
DG506A
DIP / SO
DG507A
DIP / SO
13 13, 14 N.C. No Connection. Not internally connected.
14 A3 Address Input A3
15 15 A2 Address Input A2
16 16 A1 Address Input A1
17 17 A0 Address Input A0
18 18 EN Enable Input
19 S1Analog Output Bidirectional Channel 1
19 S1A Analog Output Bidirectional Channel 1a
20 S2Analog Output Bidirectional Channel 2
20 S2A Analog Output Bidirectional Channel 2a
21 S3Analog Output Bidirectional Channel 3
21 S3A Analog Output Bidirectional Channel 3a
22 S4Analog Output Bidirectional Channel 4
22 S4A Analog Output Bidirectional Channel 5
23 S5Analog Output Bidirectional Channel 5a
23 S5a Analog Output Bidirectional Channel 6
24 S6Analog Output Bidirectional Channel 6a
24 S6a Analog Output Bidirectional Channel 7
25 S7Analog Output Bidirectional Channel 7a
25 S7a Analog Output Bidirectional Channel 8
26 S8Analog Output Bidirectional Channel 8a
26 S8a Analog Output Bidirectional Channel
27 27 V- Negative Supply Voltage Input
28 D Analog Output Bidirectional
28 Da Analog Output Bidirectional Channel a
Monolithic CMOS Analog Multiplexers
DG506A/DG507A
9
Pin Description (continued)
Package Information
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the
package code indicates RoHS status only. Package drawings may show a different suffix number, but the drawing pertains to the
package regardless of RoHS status.
PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO.
28 CERDIP J28-2 21-0046
28 Plastic DIP P28-2 21-0044
28 Wide SO W28-5 21-0042 90-0109
28 Wide SO W28-5 21-0047 90-0178
28 LCC L28-2 21-4497 90-0178
PIN
NAME FUNCTION
DG506A
LCC
1 V+ Positive Supply Voltage Input
2, 3 N.C. NoConnection. Internally not connected.
4 IN16 Analog Input Bidirectional Channel 16
5 IN15 Analog Input Bidirectional Channel 15
6 IN14 Analog Input Bidirectional Channel 14
7 IN13 Analog Input Bidirectional Channel 13
8 IN12 Analog Input Bidirectional Channel 12
9 IN11 Analog Input Bidirectional Channel 11
10 IN10 Analog Input Bidirectional Channel 10
11 IN9Analog Input Bidirectional Channel 9
12 GND Ground
13 N.C. No Connection. Not internally connected.
14 A3 Address Input A3
15 A2 Address Input A2
16 A1 Address Input A1
17 A0 Address Input A0
18 EN Enable Input
19 IN1Analog Input Bidirectional Channel 1
20 IN2Analog Input Bidirectional Channel 2
21 IN3Analog Input Bidirectional Channel 3
22 IN4Analog Input Bidirectional Channel 4
23 IN5Analog Input Bidirectional Channel 5
24 IN6Analog Input Bidirectional Channel 6
25 IN7Analog Input Bidirectional Channel 7
26 IN8Analog Input Bidirectional Channel 8
27 V- Negative Supply Voltage Input
28 OUT Analog Output Bidirectional
Monolithic CMOS Analog Multiplexers
DG506A/DG507A
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.
Maxim reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical
Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
10 Maxim Integrated Products, Inc. 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000
© 2012 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.
Revision History
REVISION
NUMBER
REVISION
DATE DESCRIPTION PAGES
CHANGED
0 8/92 Initial release
1 1/99 Updated to Word format. 1–7
2 5/09 Added ruggedized plastic part. 1–4, 7
3 2/10
• Added lead temperature to the Absolute Maximum Ratings.
• Changed the derate rate of all packages to above 70°C in the Absolute
Maximum Ratings.
2
4 6/12 Added DG506AAZ/883B; added the Pin Descriptions for DG506A DIP/SO,
DG507A DIP/SO, DG506A LCC; added LCC Pin Configuration for the DG506A 1, 2, 7, 9