INTEGRATED CIRCUITS DIVISION
www.ixysic.com
DS-CPC5602-R10 1
CPC5602
N-Channel Depletion Mode FET
Applications
Features
Description
Ordering Information
Package Pinout
• Support Component for LITELINK™
Data Access Arrangement (DAA)
• Telecommunications
• Normally On Switches
• Ignition Modules
• Converters
• Security
• Power Supplies
• 350V Drain-to-Source Voltage
• Depletion Mode Device Offers Low RDS(on)
at Cold Temperatures
• Low On-resistance: 8 (Typical) @ 25°C
• Low VGS(off) Voltage: -2.0V to -3.6V
• High Input Impedance
• Low Input and Output Leakage
• Small Package Size SOT-223
• PC Card (PCMCIA) Compatible
• PCB Space and Cost Savings
The CPC5602 is an N-channel depletion mode Field
Effect Transistor (FET) that utilizes IXYS Integrated
Circuits Division’s proprietary third generation vertical
DMOS process. The third generation process realizes
world class, high voltage MOSFET performance
in an economical silicon gate process. The vertical
DMOS process yields a highly reliable device,
particularly in difficult application environments such
as telecommunications, security, and power supplies.
One of the primary applications for the CPC5602 is
as a linear regulator/hook switch for the LITELINK
family of Data Access Arrangements (DAA) Devices
CPC5620A, CPC5621A, and CPC5622A.
The CPC5602 has a typical on-resistance of 8, a
drain-to-source voltage of 350V, and is available in an
SOT-223 package. As with all MOS devices, the FET
structure prevents thermal runaway and
thermal-induced secondary breakdown.
Pin Number Name
1GATE
2 DRAIN
3 SOURCE
4 DRAIN
Parameter Rating Units
Drain-to-Source Voltage - VDS 350 V
Max On-Resistance - RDS(on) 14
Max Power 2.5 W
D
GD S
4
123
Part # Description
CPC5602CTR N-Channel Depletion Mode FET, SOT-223 Pkg.
Tape and Reel (1000/Reel)
INTEGRATED CIRCUITS DIVISION
www.ixysic.com
2R10
CPC5602
Parameter Symbol Conditions Min Typ Max Units
Gate-to-Source Off Voltage VGS(off) ID= 2µA, VDS=10V, VDS=100V -2 -2.62 -3.6 V
Drain-to-Source Leakage Current IDS(off)
VGS= -5V, VDS=190V - - 20 nA
VGS= -5V, VDS=350V - - 1 A
Drain Current ID
VGS= -2.7V, VDS=5V, VDS=50V - - 5 mA
VGS= -0.57V, VDS=5V 130 - - mA
On-Resistance RDS(on) VGS= -0.35V, IDS=50mA - 8 14
Gate Leakage Current IGSS VGS=10V, VGS=-10V - - 0.1 A
Gate Capacitance CISS VDS= VGS=0V - - 300 pF
Electrical Characteristics @25oC (Unless Otherwise Specified)
Absolute Maximum Ratings are stress ratings. Stresses in
excess of these ratings can cause permanent damage to the
device. Functional operation of the device at conditions beyond
those indicated in the operational sections of this data sheet is
not implied.
Absolute Maximum Ratings @ 25ºC
Thermal Characteristics
Parameter Symbol Conditions Min Typ Max Units
Thermal Resistance RJC - - - 14 ºC/W
Parameter Symbol Ratings Units
Drain-to-Source Voltage VDS 350 V
Gate-to-Source Voltage VGS ±20 V
Total Package Dissipation P 2.5 W
Operational Temperature T
A-40 to +85 oC
Storage Temperature T
A-40 to +125 oC
INTEGRATED CIRCUITS DIVISION
CPC5602
www.ixysic.com 3
R10
PERFORMANCE DATA*
*The Performance data shown in the graphs above is typical of device performance. For guaranteed parameters not indicated in the written specifi cations, please
contact our application department.
VDS (V)
012345
ID (A)
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.35
Output Characteristics
(TA=25ºC)
VGS=-0.5
VGS=-1
VGS=-1.5
VGS=-2
ID (A)
0.0 0.1 0.2 0.3 0.4 0.5 0.6
On-Resistance (:)
0
5
10
15
20
On-Resistance vs. Drain Current
(VGS=0V)
ID (mA)
0 50 100 150
0
50
100
150
200
250
300
Transconductance vs Drain Current
(VDS=10V)
TA=-40ºC
TA=25ºC
TA=125ºC
GFS (m)
:
VGS (V)
-3.0 -2.5 -2.0 -1.5 -1.0
ID (mA)
0
50
100
150
200
250
Transfer Characteristics
(VDS=10V)
TA=125ºC
TA=25ºC
TA=-40ºC
Temperature (ºC)
-40 -20 0 20 40 60 80 100
VGS(off) (V)
-3.0
-2.9
-2.8
-2.7
-2.6
-2.5
-2.4
-2.3
VGS(off) vs. Temperature
(VDS=10V, ID=2PA)
Temperature (ºC)
-40 -20 0 20 40 60 80 100
On-Resistance (:)
4
5
6
7
8
9
10
11
12
On-Resistance vs. Temperature
(VGS=0V, ID=100mA)
VDS (V)
0 5 10 15 20 25 30
Capacitance (pF)
0
50
100
150
200
250
300
Capacitance vs. Drain-Source Voltage
(VGS=-5V)
CISS
COSS
CRSS
Temperature (ºC)
0 204060
80 100 120
Power Dissipation (W)
0
0.5
1.0
1.5
2.0
2.5
3.0
Power Dissipation
vs. Ambient Temperature
4.0
3.5
140 160
VDS (V)
1 10 100 1000
IDS(A)
0.001
0.01
0.1
1
Forward Safe Operating Bias
(VGS=0V, DC Load, TC=25ºC)
Limited by
Device Channel
Saturation
Limited by
Device RDS(on)
INTEGRATED CIRCUITS DIVISION
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4R10
CPC5602
Manufacturing Information
Moisture Sensitivity
All plastic encapsulated semiconductor packages are susceptible to moisture ingression. IXYS Integrated
Circuits Division classified all of its plastic encapsulated devices for moisture sensitivity according to
the latest version of the joint industry standard, IPC/JEDEC J-STD-020, in force at the time of product
evaluation. We test all of our products to the maximum conditions set forth in the standard, and guarantee proper
operation of our devices when handled according to the limitations and information in that standard as well as to any
limitations set forth in the information or standards referenced below.
Failure to adhere to the warnings or limitations as established by the listed specifications could result in reduced
product performance, reduction of operable life, and/or reduction of overall reliability.
This product carries a Moisture Sensitivity Level (MSL) rating as shown below, and should be handled according
to the requirements of the latest version of the joint industry standard IPC/JEDEC J-STD-033.
Device Moisture Sensitivity Level (MSL) Rating
CPC5602C MSL 1
ESD Sensitivity
This product is ESD Sensitive, and should be handled according to the industry standard JESD-625.
Soldering Profile
This product has a maximum body temperature and time rating as shown below. All other guidelines of J-STD-020
must be observed.
Device Maximum Temperature x Time
CPC5602C 260ºC for 30 seconds
Board Wash
IXYS Integrated Circuits Division recommends the use of no-clean flux formulations. However, board washing to
remove flux residue is acceptable, and the use of a short drying bake may be necessary. Chlorine-based or
Fluorine-based solvents or fluxes should not be used. Cleaning methods that employ ultrasonic energy should not be
used.
INTEGRATED CIRCUITS DIVISION
IXYS Integrated Circuits Division makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make
changes to specifications and product descriptions at any time without notice. Neither circuit patent licenses nor indemnity are expressed or implied. Except as set forth in IXYS Integrated
Circuits Division’s Standard Terms and Conditions of Sale, IXYS Integrated Circuits Division assumes no liability whatsoever, and disclaims any express or implied warranty, relating to
its products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right.
The products described in this document are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other
applications intended to support or sustain life, or where malfunction of IXYS Integrated Circuits Division’s product may result in direct physical harm, injury, or death to a person or severe
property or environmental damage. IXYS Integrated Circuits Division reserves the right to discontinue or make changes to its products at any time without notice.
Specification: DS-CPC5602-R10
©Copyright 2015, IXYS Integrated Circuits Division
All rights reserved. Printed in USA.
7/20/2015
For additional information please visit our website at: www.ixysic.com
CPC5602
5
MECHANICAL DIMENSIONS
Dimensions
mm MIN / mm MAX
(inches MIN / inches MAX)
6.705 / 7.290
(0.264 / 0.287)
0.229 / 0.330
(0.009 / 0.013)
0.914 MIN
(0.036 MIN)
1.90
(0.075)
1.90
(0.075)
6.10
(0.24)
2.286
(0.090)
0.90
(0.035)
3.20
(0.126)
6.30 / 6.71
(0.248 / 0.264)
2.286
(0.090)
3.30 / 3.71
(0.130 / 0.146)
2.90 / 3.10
(0.114 / 0.122)
0.610 / 0.787
(0.024 / 0.031)
0.020 / 0.102
(0.0008 / 0.004)
0.864 / 1.067
(0.034 / 0.042) 4.597
(0.181)
1.549 / 1.803
(0.061 / 0.071)
1.499 / 1.981
(0.059 / 0.078)
PCB Land Pattern
Pin 1
CPC5602C
CPC5602CTR Tape & Reel
Dimensions
mm
(inches)
Embossment
Embossed
Carrier
177.8 Dia
(7.00 Dia)
Top Cover
Tape Thickness
0.102 Max
(0.004 Max)
W=12.08 ± 0.2
(0.476 ± 0.008)
B0=7.42 ± 0.1
(0.292 ± 0.004)
A0=6.83 ± 0.1
(0.269 ± 0.004)
P=8.03 ± 0.1
(0.316 ± 0.004)
K0=1.88 ± 0.1
(0.074 ± 0.004)
2.00 ± 0.05
(0.079 ± 0.002)
4.00 ± 0.1
(0.157 ± 0.004)
1.75 ± 0.1
(0.069 ± 0.004)
5.50 ± 0.05
(0.217 ± 0.002)
