24AA02/24LC02B/24FC02 2K I2C Serial EEPROM Device Selection Table Part Number VCC Range Max. Clock Frequency 400 kHz Temp. Ranges (1) I Available Packages P, SN, MS, ST, MC, LT, MNY, OT 24AA02 1.7V-5.5V 24LC02B 2.5V-5.5V 400 kHz I, E P, SN, MS, ST, MC, LT, MNY, OT 24FC02 1.7V-5.5V 1 MHz I, E P, SN, MS, ST, MUY, OT Note 1: 100 kHz for VCC < 2.5V Features Description * Single Supply with Operation down to 1.7V for 24AA02 and 24FC02 Devices, 2.5V for 24LC02B Devices * Low-Power CMOS Technology: - Read current 1 mA, maximum - Standby current 1 A, maximum (I-temp.) * 2-Wire Serial Interface, I2C Compatible * Schmitt Trigger Inputs for Noise Suppression * Output Slope Control to Eliminate Ground Bounce * 100 kHz, 400 kHz and 1 MHz Compatibility * Page Write Time: 5 ms, Maximum * Self-Timed Erase/Write Cycle * 8-Byte Page Write Buffer * Hardware Write-Protect * ESD Protection >4,000V * More than 1 Million Erase/Write Cycles * Data Retention >200 Years * Factory Programming Available * RoHS Compliant * Temperature Ranges: - Industrial (I): -40C to +85C - Extended (E): -40C to +125C * Automotive AEC-Q100 Qualified The Microchip Technology Inc. 24XX02(1) is a 2-Kbit Electrically Erasable PROM. The device is organized as one block of 256 x 8-bit memory with a 2-wire serial interface. Its low-voltage design permits operation down to 1.7V with standby and active currents of only 1 A and 1 mA, respectively. The 24XX02 also has a page write capability for up to 8 bytes of data. Packages * 8-Lead DFN, 8-Lead MSOP, 8-Lead PDIP, 8-Lead SOIC, 8-Lead TDFN, 8-Lead TSSOP, 8-Lead UDFN, 5-Lead SOT-23 and 5-Lead SC-70 Note 1: 24XX02 is used in this document as a generic part number for the 24AA02/24LC02B/24FC02 devices. Package Types A0(1) 1 (1) A1 (1) A2 VSS A0 (1) 1 8 VCC (1) 7 WP A1 (1) 6 SCL A2 2 7 WP 3 6 SCL 5 SDA VSS 4 5 SDA 8 VCC 2 3 4 SOIC, TSSOP (Top View) A0 (1) 1 8 VCC (1) A1 2 7 WP A2(1) 3 6 SCL VSS 4 5 Note 1: 2007-2019 Microchip Technology Inc. PDIP, MSOP (Top View) DFN/TDFN/UDFN (Top View) SOT-23/SC-70 (Top View) SCL 1 Vss 2 SDA SDA 3 5 WP 4 Vcc Pins A0, A1 and A2 are not used by the 24XX02 (no internal connections). DS20001709L-page 1 24AA02/24LC02B/24FC02 Block Diagram WP I/O Control Logic Memory Control Logic HV Generator XDEC EEPROM Array Page Latches I/O SCL YDEC SDA VCC VSS 2007-2019 Microchip Technology Inc. Sense Amp. R/W Control DS20001709L-page 2 24AA02/24LC02B/24FC02 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings () VCC.............................................................................................................................................................................6.5V All inputs and outputs w.r.t. VSS ......................................................................................................... -0.3V to VCC +1.0V Storage temperature ...............................................................................................................................-65C to +150C Ambient temperature with power applied ................................................................................................-40C to +125C ESD protection on all pins 4 kV NOTICE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. TABLE 1-1: DC CHARACTERISTICS DC CHARACTERISTICS Param. Symbol No. Industrial (I): Extended (E): Extended (E): Characteristic Min. TA = -40C to +85C, VCC = +1.7V to +5.5V TA = -40C to +125C, VCC = +2.5V to +5.5V (24LC02B) TA = -40C to +125C, VCC = +1.7V to +5.5V (24FC02) Typ. Max. Units Conditions D1 VIH High-Level Input Voltage 0.7 VCC -- -- V D2 VIL Low-Level Input Voltage -- -- 0.3 VCC V D3 VHYS 0.05 VCC -- -- V Note D4 VOL Low-Level Output Voltage -- -- 0.40 V IOL = 3.0 mA, VCC = 2.5V D5 ILI Input Leakage Current -- -- 1 A VIN = VSS or VCC D6 ILO Output Leakage Current -- -- 1 A VOUT = VSS or VCC D7 CIN, COUT Pin Capacitance (all inputs/outputs) -- -- 10 pF VCC = 5.0V (Note) TA = 25C, FCLK = 1 MHz D8 ICCWRITE Operating Current -- -- 3 mA VCC = 5.5V, SCL = 400 kHz D9 ICCREAD D10 ICCS Note: Hysteresis of Schmitt Trigger Inputs Standby Current -- -- 1 mA VCC = 5.5V, SCL = 400 kHz -- -- 1 A SDA = SCL = VCC WP = VSS, I-Temp. -- -- 3 A SDA = SCL = VCC WP = VSS, E-Temp. (24FC02) -- -- 5 A SDA = SCL = VCC WP = VSS, E-Temp. (24LC02B) This parameter is periodically sampled and not 100% tested. 2007-2019 Microchip Technology Inc. DS20001709L-page 3 24AA02/24LC02B/24FC02 TABLE 1-2: AC CHARACTERISTICS AC CHARACTERISTICS Param. Symbol No. 1 FCLK 2 THIGH 3 TLOW 4 TR 5 TF Characteristic Clock Frequency Clock High Time Clock Low Time SDA and SCL Rise Time SDA and SCL Fall Time THD:STA Start Condition Hold Time 6 TSU:STA Start Condition Setup Time 7 8 THD:DAT Data Input Hold Time 9 TSU:DAT Data Input Setup Time TSU:STO Stop Condition Setup Time 10 11 TSU:WP 12 THD:WP WP Hold Time 13 TAA Note 1: 2: 3: 4: WP Setup Time Output Valid from Clock Industrial (I): Extended (E): Extended (E): TA = -40C to +85C, VCC = +1.7V to +5.5V TA = -40C to +125C, VCC = +2.5V to +5.5V (24LC02B) TA = -40C to +125C, VCC = +1.7V to +5.5V (24FC02) Min. Typ. Max. Units Conditions -- -- 400 kHz 2.5V VCC 5.5V -- -- 100 kHz 1.7V VCC < 2.5V (24AA02) -- -- 1000 kHz 1.7V VCC 5.5V (24FC02) 600 -- -- ns 2.5V VCC 5.5V 4000 -- -- ns 1.7V VCC < 2.5V (24AA02) 260 -- -- ns 1.7V VCC 5.5V (24FC02) 1300 -- -- ns 2.5V VCC 5.5V 4700 -- -- ns 1.7V VCC < 2.5V (24AA02) 500 -- -- ns 1.7V VCC 5.5V (24FC02) -- -- 300 ns 2.5V VCC 5.5V (Note 1) -- -- 1000 ns 1.7V VCC < 2.5V (24AA02) (Note 1) -- -- 1000 ns 1.7V VCC 5.5V (24FC02) (Note 1) -- -- 300 ns Note 1 600 -- -- ns 2.5V VCC 5.5V 4000 -- -- ns 1.7V VCC < 2.5V (24AA02) 250 -- -- ns 1.7V VCC 5.5V (24FC02) 600 -- -- ns 2.5V VCC 5.5V 4700 -- -- ns 1.7V VCC < 2.5V (24AA02) 250 -- -- ns 1.7V VCC 5.5V (24FC02) 0 -- -- ns Note 2 100 -- -- ns 2.5V VCC 5.5V 250 -- -- ns 1.7V VCC < 2.5V (24AA02) 50 -- -- ns 1.7V VCC 5.5V (24FC02) 600 -- -- ns 2.5V VCC 5.5V 4000 -- -- ns 1.7V VCC < 2.5V (24AA02) 250 -- -- ns 1.7V VCC 5.5V (24FC02) 0 -- -- ns 1.7V VCC 5.5V (24FC02) 1000 -- -- ns 1.7V VCC 5.5V (24FC02) -- -- 900 ns 2.5V VCC 5.5V (Note 2) -- -- 3500 ns 1.7V VCC < 2.5V (24AA02) (Note 2) -- -- 450 ns 1.7V VCC 5.5V (24FC02) (Note 2) Characterized but not 100% tested. As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions. CB = total capacitance of one bus line in pF. This parameter is not tested but ensured by characterization. For endurance estimates in a specific application, please consult the Total EnduranceTM Model which can be obtained from Microchip's website at www.microchip.com. 2007-2019 Microchip Technology Inc. DS20001709L-page 4 24AA02/24LC02B/24FC02 TABLE 1-2: AC CHARACTERISTICS AC CHARACTERISTICS (Continued) Param. Symbol No. 14 TBUF 15 TOF Industrial (I): Extended (E): Extended (E): TA = -40C to +85C, VCC = +1.7V to +5.5V TA = -40C to +125C, VCC = +2.5V to +5.5V (24LC02B) TA = -40C to +125C, VCC = +1.7V to +5.5V (24FC02) Characteristic Min. Typ. Max. Units Bus Free Time: The time the bus must be free before a new transmission can start 1300 -- -- ns 2.5V VCC 5.5V 4700 -- -- ns 1.7V VCC < 2.5V (24AA02) 500 -- -- ns 1.7V VCC 5.5V (24FC02) -- 250 ns 2.5V VCC 5.5V (24LC02B) (Notes 1 and 3) -- -- 250 ns 1.7V VCC < 2.5V (24AA02) (Note 1) Note 1 Output Fall Time from VIH 20+0.1CB Minimum to VIL Maximum 16 TSP Input Filter Spike Suppression (SDA and SCL pins) -- -- 50 ns 17 TWC Write Cycle Time (byte or page) -- -- 5 ms 1,000,000 -- -- 18 Endurance Note 1: 2: 3: 4: cycles 25C, 5.5V, Page Mode (Note 4) Characterized but not 100% tested. As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions. CB = total capacitance of one bus line in pF. This parameter is not tested but ensured by characterization. For endurance estimates in a specific application, please consult the Total EnduranceTM Model which can be obtained from Microchip's website at www.microchip.com. FIGURE 1-1: BUS TIMING DATA 5 SCL Conditions 7 SDA IN 3 4 D3 2 8 10 9 6 16 14 13 SDA OUT WP 2007-2019 Microchip Technology Inc. (protected) (unprotected) 11 12 DS20001709L-page 5 24AA02/24LC02B/24FC02 2.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 2-1. TABLE 2-1: PIN FUNCTION TABLE SOIC SOT-23 TDFN(1) TSSOP UDFN(1) Name DFN MSOP PDIP SC-70 A0 1 1 1 -- 1 -- 1 1 1 Not Connected A1 2 2 2 -- 2 -- 2 2 2 Not Connected A2 3 3 3 -- 3 -- 3 3 3 Not Connected Description VSS 4 4 4 2 4 2 4 4 4 Ground SDA 5 5 5 3 5 3 5 5 5 Serial Address/Data I/O SCL 6 6 6 1 6 1 6 6 6 Serial Clock WP 7 7 7 5 7 5 7 7 7 Write-Protect Input 8 8 8 4 8 4 8 8 8 Power Supply VCC Note 1: 2.1 The exposed pad on the TDFN/UDFN package can be connected to VSS or left floating. A0, A1, A2 2.3 Serial Clock (SCL) The A0, A1 and A2 pins are not used by the 24XX02. They may be left floating or tied to either VSS or VCC. The SCL input is used to synchronize the data transfer to and from the device. 2.2 2.4 Serial Address/Data Input/Output (SDA) The SDA input is a bidirectional pin used to transfer addresses and data into and out of the device. Since it is an open-drain terminal, the SDA bus requires a pull-up resistor to VCC (typical 10 k for 100 kHz, 2 k for 400 kHz and 1 MHz). For normal data transfer, SDA is allowed to change only during SCL low. Changes during SCL high are reserved for indicating Start and Stop conditions. 2007-2019 Microchip Technology Inc. Write-Protect (WP) This pin must be connected to either VSS or VCC. If tied to VSS, normal memory operation is enabled (read/write the entire memory 00-FF). If tied to VCC, write operations are inhibited. The entire memory will be write-protected. Read operations are not affected. DS20001709L-page 6 24AA02/24LC02B/24FC02 3.0 FUNCTIONAL DESCRIPTION The 24XX02 supports a bidirectional, 2-wire bus and data transmission protocol. A device that sends data onto the bus is defined as transmitter, while defining a device receiving data as a receiver. The bus has to be controlled by a master device which generates the Serial Clock (SCL), controls the bus access and generates the Start and Stop conditions, while the 24XX02 works as slave. Both master and slave can operate as transmitter or receiver, but the master device determines which mode is activated. 4.0 BUS CHARACTERISTICS The following bus protocol has been defined: * Data transfer may be initiated only when the bus is not busy. * During data transfer, the data line must remain stable whenever the clock line is high. Changes in the data line while the clock line is high will be interpreted as a Start or Stop condition. Accordingly, the following bus conditions have been defined (Figure 4-1). 4.1 4.4 The state of the data line represents valid data when, after a Start condition, the data line is stable for the duration of the high period of the clock signal. The data on the line must be changed during the low period of the clock signal. There is one clock pulse per bit of data. Each data transfer is initiated with a Start condition and terminated with a Stop condition. The number of data bytes transferred between the Start and Stop conditions is determined by the master device and is, theoretically, unlimited (although only the last eight will be stored when doing a write operation). When an overwrite does occur, it will replace data based on the first-in first-out (FIFO) principle. 4.5 Both data and clock lines remain high. 4.2 Start Data Transfer (B) A high-to-low transition of the SDA line while the clock (SCL) is high determines a Start condition. All commands must be preceded by a Start condition. 4.3 Stop Data Transfer (C) A low-to-high transition of the SDA line while the clock (SCL) is high determines a Stop condition. All operations must be ended with a Stop condition. FIGURE 4-1: (A) Acknowledge Each receiving device, when addressed, is obliged to generate an acknowledge after the reception of each byte. The master device must generate an extra clock pulse which is associated with this Acknowledge bit. Note: Bus Not Busy (A) Data Valid (D) The 24XX02 does not generate any Acknowledge bits if an internal programming cycle is in progress. The device that acknowledges has to pull down the SDA line during the acknowledge clock pulse in such a way that the SDA line is stable-low during the high period of the acknowledge-related clock pulse. Moreover, setup and hold times must be taken into account. During reads, a master must signal an end of data to the slave by not generating an Acknowledge bit on the last byte that has been clocked out of the slave. In this case, the slave (24XX02) will leave the data line high to enable the master to generate the Stop condition. DATA TRANSFER SEQUENCE ON THE SERIAL BUS (B) (D) Start Condition Address or Acknowledge Valid (D) (C) (A) SCL SDA 2007-2019 Microchip Technology Inc. Data Allowed to Change Stop Condition DS20001709L-page 7 24AA02/24LC02B/24FC02 5.0 DEVICE ADDRESSING FIGURE 5-1: A control byte is the first byte received following the Start condition from the master device. The control byte consists of a four-bit control code. For the 24XX02, this is set as `1010' binary for read and write operations. The next three bits of the control byte are "don't cares" for the 24XX02. The combination of the 4-bit control code and the next three bits are called the slave address. The last bit of the control byte is the Read/Write (R/W) bit and it defines the operation to be performed. When set to `1', a read operation is selected. When set to `0', a write operation is selected. Following the Start condition, the 24XX02 monitors the SDA bus, checking the device type identifier being transmitted. Upon receiving a valid slave address and the R/W bit, the slave device outputs an Acknowledge signal on the SDA line. Depending on the state of the R/W bit, the 24XX02 will select a read or write operation. CONTROL BYTE ALLOCATION Read/Write Bit Block Select Bits Control Code S 1 0 1 0 x x x R/W ACK Slave Address Acknowledge Bit Start Bit x = "don't care" The next byte received defines the address of the first data byte within the selected block (Figure 5-2). The word address byte uses all eight bits. Operation Control Code Block Select R/W Read 1010 Block Address 1 Write 1010 Block Address 0 FIGURE 5-2: ADDRESS SEQUENCE BIT ASSIGNMENTS Control Byte 1 0 1 0 x Control Code x Word Address Byte x R/W A 7 * * * * * * A 0 Block Select bits x = "don't care" 2007-2019 Microchip Technology Inc. DS20001709L-page 8 24AA02/24LC02B/24FC02 6.0 WRITE OPERATION 6.1 Byte Write 6.2 Following the Start condition from the master, the device code (4 bits), the block address (3 bits, "don't cares") and the R/W bit, which is a logic-low, is placed onto the bus by the master transmitter. This indicates to the addressed slave receiver that a byte with a word address will follow after it has generated an Acknowledge bit during the ninth clock cycle. Therefore, the next byte transmitted by the master is the word address and will be written into the Address Pointer of the 24XX02. After receiving another Acknowledge signal from the 24XX02, the master device will transmit the data word to be written into the addressed memory location. The 24XX02 acknowledges again and the master generates a Stop condition. This initiates the internal write cycle, and, during this time, the 24XX02 will not generate Acknowledge signals (Figure 6-1). Page Write The write control byte, word address and first data byte are transmitted to the 24XX02 in the same way as in a byte write. However, instead of generating a Stop condition, the master transmits up to eight data bytes to the 24XX02, which are temporarily stored in the on-chip page buffer and will be written into the memory once the master has transmitted a Stop condition. Upon receipt of each word, the three lower-order Address Pointer bits, which form the byte counter, are internally incremented by one. The higher-order five bits of the word address remain constant. If the master should transmit more than eight words prior to generating the Stop condition, the Address Pointer will roll over and the previously received data will be overwritten. As with the byte write operation, once the Stop condition is received, an internal write cycle will begin (Figure 6-2). Note: 6.3 Page write operations are limited to writing bytes within a single physical page regardless of the number of bytes actually being written. Physical page boundaries start at addresses that are integer multiples of the page buffer size (or `page size') and end at addresses that are integer multiples of page size - 1. If a page write command attempts to write across a physical page boundary, the result is that the data wraps around to the beginning of the current page (overwriting data previously stored there), instead of being written to the next page, as might be expected. It is therefore necessary for the application software to prevent page write operations that would attempt to cross a page boundary. Write Protection The WP pin allows the user to write-protect the entire array (00-FF) when the pin is tied to VCC. If tied to VSS, the write protection is disabled. FIGURE 6-1: BYTE WRITE Bus Activity Master S T A R T SDA Line S Control Byte 1 0 1 0 Bus Activity x = "don't care" 2007-2019 Microchip Technology Inc. Word Address S T O P Data x x x 0 Block Select Bits P A C K A C K A C K DS20001709L-page 9 24AA02/24LC02B/24FC02 FIGURE 6-2: PAGE WRITE Bus Activity Master S T A R T SDA Line S 10 10 x x x0 Bus Activity x = "don't care" Control Byte Block Select Bits 2007-2019 Microchip Technology Inc. Word Address (n) Data (n + 1) Data (n) S T O P Data (n + 7) P A C K A C K A C K A C K A C K DS20001709L-page 10 24AA02/24LC02B/24FC02 7.0 ACKNOWLEDGE POLLING Since the device will not acknowledge during a write cycle, this can be used to determine when the cycle is complete (this feature can be used to maximize bus throughput). Once the Stop condition for a write command has been issued from the master, the device initiates the internally-timed write cycle. ACK polling can then be initiated immediately. This involves the master sending a Start condition followed by the control byte for a write command (R/W = 0). If the device is still busy with the write cycle, no ACK will be returned. If the cycle is complete, the device will return the ACK and the master can then proceed with the next read or write operation. See Figure 7-1 for a flow diagram of this operation. FIGURE 7-1: ACKNOWLEDGE POLLING FLOW Send Write Command Send Stop Condition to Initiate Write Cycle Send Start Send Control Byte with R/W = 0 Did Device Acknowledge (ACK = 0)? No Yes Next Operation 2007-2019 Microchip Technology Inc. DS20001709L-page 11 24AA02/24LC02B/24FC02 8.0 READ OPERATION 8.3 Sequential Read Read operations are initiated in the same way as write operations, with the exception that the R/W bit of the slave address is set to `1'. There are three basic types of read operations: current address read, random read and sequential read. Sequential reads are initiated in the same way as a random read, except that once the 24XX02 transmits the first data byte, the master issues an acknowledge (as opposed to a Stop condition in a random read). This directs the 24XX02 to transmit the next sequentially addressed 8-bit word (Figure 8-3). 8.1 To provide sequential reads the 24XX02 contains an internal Address Pointer which is incremented by one at the completion of each operation. This Address Pointer allows the entire memory contents to be serially read during one operation. Current Address Read The 24XX02 contains an Address Pointer that maintains the address of the last word accessed, internally incremented by one. Therefore, if the previous access (either a read or write operation) was to address n, the next current address read operation would access data from address n + 1. Upon receipt of the slave address with R/W bit set to `1', the 24XX02 issues an acknowledge and transmits the 8-bit data word. The master will not acknowledge the transfer, but does generate a Stop condition and the 24XX02 discontinues transmission (Figure 8-1). 8.2 8.4 Noise Protection The SCL and SDA inputs have Schmitt Trigger and filter circuits which suppress noise spikes to assure proper device operation even on a noisy bus. Random Read Random read operations allow the master to access any memory location in a random manner. To perform this type of read operation, the word address must first be set. This is accomplished by sending the word address to the 24XX02 as part of a write operation. Once the word address is sent, the master generates a Start condition following the acknowledge. This terminates the write operation, but not before the internal Address Pointer is set. The master then issues the control byte again, but with the R/W bit set to a `1'. The 24XX02 will then issue an acknowledge and transmits the 8-bit data word. The master will not acknowledge the transfer, but does generate a Stop condition and the 24XX02 discontinues transmission (Figure 8-2). FIGURE 8-1: CURRENT ADDRESS READ Bus Activity Master S T A R T SDA Line S 1 0 1 0 x x x 1 Bus Activity x = "don't care" 2007-2019 Microchip Technology Inc. Control Byte Block Select Bits S T O P Data (n) P A C K N o A C K DS20001709L-page 12 24AA02/24LC02B/24FC02 FIGURE 8-2: RANDOM READ S T Control A Byte R T S 10 1 0 x x x 0 Bus Activity Master SDA Line Control Byte A C K Block Select Bits A C K x = "don't care" FIGURE 8-3: Bus Activity Master SDA Line Bus Activity S T O P P Data (n) S1010 xxx 1 A Block C Select K Bits Bus Activity S T A R T Word Address (n) N o A C K SEQUENTIAL READ Control Byte Data (n) Data (n + 1) Data (n + 2) S T O P Data (n + x) P 1 A C K 2007-2019 Microchip Technology Inc. A C K A C K A C K N o A C K DS20001709L-page 13 24AA02/24LC02B/24FC02 9.0 PACKAGING INFORMATION 9.1 Package Marking Information* 8-Lead 2x3 DFN Example XXX YWW NN 224 922 13 8-Lead MSOP Example XXXXXX YWWNNN 4L2BI 92213F 8-Lead PDIP (300 mil) Example XXXXXXXX T/XXXNNN YYWW 24LC02B I/P e3 13F 1922 5-Lead SC-70 Example XXNN B413 8-Lead SOIC (3.90 mm) Example XXXXXXXX XXXXYYWW 24LC02BI SN e3 1922 NNN 13F 2007-2019 Microchip Technology Inc. DS20001709L-page 14 24AA02/24LC02B/24FC02 5-Lead SOT-23 (1-Line Marking) Example XXNN M213 5-Lead SOT-23 (2-Line Marking) XXXXYY WWNNN 8-Lead 2x3 TDFN Example AAEV19 2213F Example XXX YWW NN A24 922 13 8-Lead TSSOP Example XXXX 4L02 TYWW I922 NNN 13F 8-Lead 2x3 UDFN XXX YWW NN 2007-2019 Microchip Technology Inc. Example ADN 922 13 DS20001709L-page 15 24AA02/24LC02B/24FC02 Part Number 1st Line Marking Codes SOT-23 24AA02 24LC02B 24FC02 TSSOP MSOP UDFN 4A02 4A02T(1) 4L02 4L2BT(1) AADQ 24FC02 DFN TDFN SC-70 I-Temp. E-Temp. I-Temp. E-Temp. I-Temp. E-Temp. I-Temp. E-Temp. -- B2NN(2,3) -- 221 -- A21 -- B5NN(2) -- -- M2NN(2,3) N2NN(2,3) 224 225 A24 A25 B4NN(2) B6NN(2) ADN AAEVYY(4) AAEVYY(4) -- -- -- -- -- -- Note 1: T = Temperature grade (I, E) 2: NN = Alphanumeric traceability code 3: These parts use the 1-line SOT-23 marking format 4: These parts use the 2-line SOT-23 marking format Legend: XX...X T Y YY WW NNN e3 Part number or part number code Temperature (I, E) Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code (2 characters for small packages) JEDEC(R) designator for Matte Tin (Sn) * Standard OTP marking consists of Microchip part number, year code, week code, and traceability code. Note: For very small packages with no room for the JEDEC(R) designator e3 , the marking will only appear on the outer carton or reel label. Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 2007-2019 Microchip Technology Inc. DS20001709L-page 16 24AA02/24LC02B/24FC02 /HDG3ODVWLF'XDO)ODW1R/HDG3DFNDJH 0& [[PP%RG\>')1@ 1RWH )RUWKHPRVWFXUUHQWSDFNDJHGUDZLQJVSOHDVHVHHWKH0LFURFKLS3DFNDJLQJ6SHFLILFDWLRQORFDWHGDW KWWSZZZPLFURFKLSFRPSDFNDJLQJ e D b N N L K E2 E EXPOSED PAD NOTE 1 NOTE 1 2 1 2 1 D2 BOTTOM VIEW TOP VIEW A A3 A1 NOTE 2 8QLWV 'LPHQVLRQ/LPLWV 1XPEHURI3LQV 0,//,0(7(56 0,1 1 120 0$; 3LWFK H 2YHUDOO+HLJKW $ 6WDQGRII $ &RQWDFW7KLFNQHVV $ 5() 2YHUDOO/HQJWK ' %6& 2YHUDOO:LGWK ( ([SRVHG3DG/HQJWK ' ([SRVHG3DG:LGWK ( E &RQWDFW/HQJWK / &RQWDFWWR([SRVHG3DG . &RQWDFW:LGWK %6& %6& 1RWHV 3LQYLVXDOLQGH[IHDWXUHPD\YDU\EXWPXVWEHORFDWHGZLWKLQWKHKDWFKHGDUHD 3DFNDJHPD\KDYHRQHRUPRUHH[SRVHGWLHEDUVDWHQGV 3DFNDJHLVVDZVLQJXODWHG 'LPHQVLRQLQJDQGWROHUDQFLQJSHU$60(<0 %6& %DVLF'LPHQVLRQ7KHRUHWLFDOO\H[DFWYDOXHVKRZQZLWKRXWWROHUDQFHV 5() 5HIHUHQFH'LPHQVLRQXVXDOO\ZLWKRXWWROHUDQFHIRULQIRUPDWLRQSXUSRVHVRQO\ 0LFURFKLS 7HFKQRORJ\ 'UDZLQJ && 2007-2019 Microchip Technology Inc. DS20001709L-page 17 24AA02/24LC02B/24FC02 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2007-2019 Microchip Technology Inc. DS20001709L-page 18 24AA02/24LC02B/24FC02 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2007-2019 Microchip Technology Inc. DS20001709L-page 19 24AA02/24LC02B/24FC02 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2007-2019 Microchip Technology Inc. DS20001709L-page 20 24AA02/24LC02B/24FC02 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2007-2019 Microchip Technology Inc. DS20001709L-page 21 24AA02/24LC02B/24FC02 8-Lead Plastic Dual In-Line (P) - 300 mil Body [PDIP] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D A N B E1 NOTE 1 1 2 TOP VIEW E C A2 A PLANE L c A1 e eB 8X b1 8X b .010 C SIDE VIEW END VIEW Microchip Technology Drawing No. C04-018D Sheet 1 of 2 2007-2019 Microchip Technology Inc. DS20001709L-page 22 24AA02/24LC02B/24FC02 8-Lead Plastic Dual In-Line (P) - 300 mil Body [PDIP] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging ALTERNATE LEAD DESIGN (VENDOR DEPENDENT) DATUM A DATUM A b b e 2 e 2 e Units Dimension Limits Number of Pins N e Pitch Top to Seating Plane A Molded Package Thickness A2 Base to Seating Plane A1 Shoulder to Shoulder Width E Molded Package Width E1 Overall Length D Tip to Seating Plane L c Lead Thickness Upper Lead Width b1 b Lower Lead Width Overall Row Spacing eB e MIN .115 .015 .290 .240 .348 .115 .008 .040 .014 - INCHES NOM 8 .100 BSC .130 .310 .250 .365 .130 .010 .060 .018 - MAX .210 .195 .325 .280 .400 .150 .015 .070 .022 .430 Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Significant Characteristic 3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" per side. 4. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. Microchip Technology Drawing No. C04-018D Sheet 2 of 2 2007-2019 Microchip Technology Inc. DS20001709L-page 23 24AA02/24LC02B/24FC02 5-Lead Plastic Small Outline Transistor (LT) [SC70] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D A e e 3 B 1 E1 E 2X 0.15 C 4 N 5X TIPS 0.30 C NOTE 1 2X 0.15 C 5X b 0.10 C A B TOP VIEW C c A2 A SEATING PLANE A1 L SIDE VIEW END VIEW Microchip Technology Drawing C04-061D Sheet 1 of 2 2007-2019 Microchip Technology Inc. DS20001709L-page 24 24AA02/24LC02B/24FC02 5-Lead Plastic Small Outline Transistor (LT) [SC70] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Units Dimension Limits Number of Pins N e Pitch Overall Height A Standoff A1 Molded Package Thickness A2 Overall Length D Exposed Pad Length D2 Overall Width E Exposed Pad Width E1 b Terminal Width Terminal Length L c Lead Thickness MIN 0.80 0.00 0.80 2.50 0.15 0.10 0.08 MILLIMETERS NOM 5 0.65 BSC 2.00 BSC 2.60 2.10 BSC 1.25 BSC 0.20 - MAX 1.10 0.10 1.00 2.70 0.40 0.46 0.26 Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15mm per side. 3. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-061D Sheet 2 of 2 2007-2019 Microchip Technology Inc. DS20001709L-page 25 24AA02/24LC02B/24FC02 5-Lead Plastic Small Outline Transistor (LT) [SC70] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging E Gx SILK SCREEN 3 2 1 C G 4 5 Y X RECOMMENDED LAND PATTERN Units Dimension Limits Contact Pitch E Contact Pad Spacing C Contact Pad Width X Contact Pad Length Y Distance Between Pads G Distance Between Pads Gx MIN MILLIMETERS NOM 0.65 BSC 2.20 MAX 0.45 0.95 1.25 0.20 Notes: 1. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. Microchip Technology Drawing No. C04-2061B 2007-2019 Microchip Technology Inc. DS20001709L-page 26 24AA02/24LC02B/24FC02 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2X 0.10 C A-B D A D NOTE 5 N E 2 E1 2 E1 E NOTE 1 2 1 e B NX b 0.25 C A-B D NOTE 5 TOP VIEW 0.10 C C A A2 SEATING PLANE 8X A1 SIDE VIEW 0.10 C h R0.13 h R0.13 H SEE VIEW C VIEW A-A 0.23 L (L1) VIEW C Microchip Technology Drawing No. C04-057-SN Rev D Sheet 1 of 2 2007-2019 Microchip Technology Inc. DS20001709L-page 27 24AA02/24LC02B/24FC02 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Units Dimension Limits Number of Pins N e Pitch Overall Height A Molded Package Thickness A2 Standoff A1 Overall Width E Molded Package Width E1 Overall Length D Chamfer (Optional) h Foot Length L L1 Footprint Foot Angle c Lead Thickness b Lead Width Mold Draft Angle Top Mold Draft Angle Bottom MIN 1.25 0.10 0.25 0.40 0 0.17 0.31 5 5 MILLIMETERS NOM 8 1.27 BSC 6.00 BSC 3.90 BSC 4.90 BSC 1.04 REF - MAX 1.75 0.25 0.50 1.27 8 0.25 0.51 15 15 Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Significant Characteristic 3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15mm per side. 4. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. 5. Datums A & B to be determined at Datum H. Microchip Technology Drawing No. C04-057-SN Rev D Sheet 2 of 2 2007-2019 Microchip Technology Inc. DS20001709L-page 28 24AA02/24LC02B/24FC02 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm Body [SOIC] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging SILK SCREEN C Y1 X1 E RECOMMENDED LAND PATTERN Units Dimension Limits E Contact Pitch Contact Pad Spacing C Contact Pad Width (X8) X1 Contact Pad Length (X8) Y1 MIN MILLIMETERS NOM 1.27 BSC 5.40 MAX 0.60 1.55 Notes: 1. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. Microchip Technology Drawing C04-2057-SN Rev B 2007-2019 Microchip Technology Inc. DS20001709L-page 29 24AA02/24LC02B/24FC02 5-Lead Plastic Small Outline Transistor (OT) [SOT23] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 0.20 C 2X D e1 A D N E/2 E1/2 E1 E (DATUM D) (DATUM A-B) 0.15 C D 2X NOTE 1 1 2 e B NX b 0.20 C A-B D TOP VIEW A A A2 0.20 C SEATING PLANE A SEE SHEET 2 C A1 SIDE VIEW Microchip Technology Drawing C04-028D [OT] Sheet 1 of 2007-2019 Microchip Technology Inc. DS20001709L-page 30 24AA02/24LC02B/24FC02 5-Lead Plastic Small Outline Transistor (OT) [SOT23] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging c T L L1 VIEW A-A SHEET 1 Units Dimension Limits Number of Pins N e Pitch e1 Outside lead pitch Overall Height A Molded Package Thickness A2 Standoff A1 E Overall Width E1 Molded Package Width D Overall Length L Foot Length Footprint L1 I Foot Angle c Lead Thickness b Lead Width MIN 0.90 0.89 - 0.30 0 0.08 0.20 MILLIMETERS NOM 6 0.95 BSC 1.90 BSC 2.80 BSC 1.60 BSC 2.90 BSC 0.60 REF - MAX 1.45 1.30 0.15 0.60 10 0.26 0.51 Notes: 1. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.25mm per side. 2. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-091D [OT] Sheet 2 of 2007-2019 Microchip Technology Inc. DS20001709L-page 31 24AA02/24LC02B/24FC02 5-Lead Plastic Small Outline Transistor (OT) [SOT23] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging X SILK SCREEN 5 Y Z C G 1 2 E GX RECOMMENDED LAND PATTERN Units Dimension Limits E Contact Pitch C Contact Pad Spacing X Contact Pad Width (X5) Contact Pad Length (X5) Y Distance Between Pads G Distance Between Pads GX Overall Width Z MIN MILLIMETERS NOM 0.95 BSC 2.80 MAX 0.60 1.10 1.70 0.35 3.90 Notes: 1. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. Microchip Technology Drawing No. C04-2091A [OT] 2007-2019 Microchip Technology Inc. DS20001709L-page 32 24AA02/24LC02B/24FC02 8-Lead Plastic Dual Flat, No Lead Package (MNY) - 2x3x0.8 mm Body [TDFN] With 1.4x1.3 mm Exposed Pad (JEDEC Package type WDFN) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D A B N (DATUM A) (DATUM B) E NOTE 1 2X 0.15 C 1 2 2X 0.15 C TOP VIEW 0.10 C C (A3) A SEATING PLANE 8X 0.08 C A1 SIDE VIEW 0.10 C A B D2 L 1 2 0.10 C A B NOTE 1 E2 K N 8X b e 0.10 0.05 C A B C BOTTOM VIEW Microchip Technology Drawing No. C04-129-MNY Rev E Sheet 1 of 2 2007-2019 Microchip Technology Inc. DS20001709L-page 33 24AA02/24LC02B/24FC02 8-Lead Plastic Dual Flat, No Lead Package (MNY) - 2x3x0.8 mm Body [TDFN] With 1.4x1.3 mm Exposed Pad (JEDEC Package type WDFN) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Units Dimension Limits N Number of Pins e Pitch A Overall Height A1 Standoff Contact Thickness A3 D Overall Length E Overall Width Exposed Pad Length D2 Exposed Pad Width E2 b Contact Width L Contact Length Contact-to-Exposed Pad K MIN 0.70 0.00 1.35 1.25 0.20 0.25 0.20 MILLIMETERS NOM 8 0.50 BSC 0.75 0.02 0.20 REF 2.00 BSC 3.00 BSC 1.40 1.30 0.25 0.30 - MAX 0.80 0.05 1.45 1.35 0.30 0.45 - Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Package may have one or more exposed tie bars at ends. 3. Package is saw singulated 4. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing No. C04-129-MNY Rev E Sheet 2 of 2 2007-2019 Microchip Technology Inc. DS20001709L-page 34 24AA02/24LC02B/24FC02 8-Lead Plastic Dual Flat, No Lead Package (MNY) - 2x3x0.8 mm Body [TDFN] With 1.4x1.3 mm Exposed Pad (JEDEC Package type WDFN) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging X2 EV 8 OV C Y2 EV Y1 1 2 SILK SCREEN X1 E RECOMMENDED LAND PATTERN Units Dimension Limits E Contact Pitch Optional Center Pad Width X2 Optional Center Pad Length Y2 Contact Pad Spacing C Contact Pad Width (X8) X1 Contact Pad Length (X8) Y1 Thermal Via Diameter V Thermal Via Pitch EV MIN MILLIMETERS NOM 0.50 BSC MAX 1.60 1.50 2.90 0.25 0.85 0.30 1.00 Notes: 1. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. 2. For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during reflow process Microchip Technology Drawing No. C04-129-MNY Rev. B 2007-2019 Microchip Technology Inc. DS20001709L-page 35 24AA02/24LC02B/24FC02 /HDG3ODVWLF7KLQ6KULQN6PDOO2XWOLQH 67 PP%RG\>76623@ 1RWH )RUWKHPRVWFXUUHQWSDFNDJHGUDZLQJVSOHDVHVHHWKH0LFURFKLS3DFNDJLQJ6SHFLILFDWLRQORFDWHGDW KWWSZZZPLFURFKLSFRPSDFNDJLQJ D N E E1 NOTE 1 1 2 b e c A A2 A1 L L1 8QLWV 'LPHQVLRQ/LPLWV 1XPEHURI3LQV 0,//,0(7(56 0,1 1 120 0$; 3LWFK H 2YHUDOO+HLJKW $ %6& 0ROGHG3DFNDJH7KLFNQHVV $ 6WDQGRII $ 2YHUDOO:LGWK ( 0ROGHG3DFNDJH:LGWK ( %6& 0ROGHG3DFNDJH/HQJWK ' )RRW/HQJWK / )RRWSULQW / 5() )RRW$QJOH /HDG7KLFNQHVV F /HDG:LGWK E 1RWHV 3LQYLVXDOLQGH[IHDWXUHPD\YDU\EXWPXVWEHORFDWHGZLWKLQWKHKDWFKHGDUHD 'LPHQVLRQV'DQG(GRQRWLQFOXGHPROGIODVKRUSURWUXVLRQV0ROGIODVKRUSURWUXVLRQVVKDOOQRWH[FHHGPPSHUVLGH 'LPHQVLRQLQJDQGWROHUDQFLQJSHU$60(<0 %6& %DVLF'LPHQVLRQ7KHRUHWLFDOO\H[DFWYDOXHVKRZQZLWKRXWWROHUDQFHV 5() 5HIHUHQFH'LPHQVLRQXVXDOO\ZLWKRXWWROHUDQFHIRULQIRUPDWLRQSXUSRVHVRQO\ 0LFURFKLS 7HFKQRORJ\ 'UDZLQJ &% 2007-2019 Microchip Technology Inc. DS20001709L-page 36 24AA02/24LC02B/24FC02 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2007-2019 Microchip Technology Inc. DS20001709L-page 37 24AA02/24LC02B/24FC02 8-Lead Ultra Thin Plastic Dual Flat, No Lead Package (Q4B) - 2x3 mm Body [UDFN] Atmel Legacy YNZ Package Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D A B N (DATUM A) E (DATUM B) NOTE 1 2X 0.10 C 1 2 2X 0.10 C TOP VIEW A1 0.10 C C SEATING PLANE A 8X (A3) SIDE VIEW 0.10 0.08 C C A B D2 e 2 1 2 0.10 E2 C A B K N L 8X b e 0.10 0.05 C A B C BOTTOM VIEW Microchip Technology Drawing C04-21355-Q4B Rev A Sheet 1 of 2 2007-2019 Microchip Technology Inc. DS20001709L-page 38 24AA02/24LC02B/24FC02 8-Lead Ultra Thin Plastic Dual Flat, No Lead Package (Q4B) - 2x3 mm Body [UDFN] Atmel Legacy YNZ Package Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Units Dimension Limits Number of Terminals N e Pitch A Overall Height Standoff A1 Terminal Thickness A3 Overall Length D Exposed Pad Length D2 Overall Width E Exposed Pad Width E2 b Terminal Width Terminal Length L Terminal-to-Exposed-Pad K MIN 0.50 0.00 1.40 1.20 0.18 0.35 0.20 MILLIMETERS NOM 8 0.50 BSC 0.55 0.02 0.152 REF 2.00 BSC 1.50 3.00 BSC 1.30 0.25 0.40 - MAX 0.60 0.05 1.60 1.40 0.30 0.45 - Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Package is saw singulated 3. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-21355-Q4B Rev A Sheet 2 of 2 2007-2019 Microchip Technology Inc. DS20001709L-page 39 24AA02/24LC02B/24FC02 8-Lead Ultra Thin Plastic Dual Flat, No Lead Package (Q4B) - 2x3 mm Body [UDFN] Atmel Legacy YNZ Package Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging X2 EV G2 8 OV C Y2 G1 Y1 1 2 SILK SCREEN X1 E RECOMMENDED LAND PATTERN Units Dimension Limits E Contact Pitch Optional Center Pad Width X2 Optional Center Pad Length Y2 Contact Pad Spacing C Contact Pad Width (X8) X1 Contact Pad Length (X8) Y1 Contact Pad to Center Pad (X8) G1 Contact Pad to Contact Pad (X6) G2 Thermal Via Diameter V Thermal Via Pitch EV MIN MILLIMETERS NOM 0.50 BSC MAX 1.60 1.40 2.90 0.30 0.85 0.20 0.33 0.30 1.00 Notes: 1. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. 2. For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during reflow process Microchip Technology Drawing C04-21355-Q4B Rev A 2007-2019 Microchip Technology Inc. DS20001709L-page 40 24AA02/24LC02B/24FC02 APPENDIX A: REVISION HISTORY Revision L (05/2019) Corrected Part Marking for UDFN package. Added note about exposed pad on the TDFN and UDFN packages. Revision K (11/2018) Added the 24FC02 device. Revision J (02/2009) Added TDFN Package; Updated Package Drawings. Revision H (08/2008) Added SC-70 Package; Updated Package Drawings. Revision G (03/2007) Replaced Package Drawings (Rev. AM). Revision F (01/2007) Revised Features section; Changed 1.8V to 1.7V in Tables and text; Revised Ambient Temperature, Section 1.0; Replaced Package Drawings; Revised Product ID section. Revision E Revised Figure 3-2 Control Byte Allocation; Figure 4-1 Byte Write; Figure 4-2 Page Write; Section 6.0 Write Protection; Figure 7-1 Current Address Read; Figure 7-2 Random Read; Figure 7-3 Sequential Read. Revision D Added DFN package. Revision C Corrections to Section 1.0, Electrical Characteristics. 2007-2019 Microchip Technology Inc. DS20001709L-page 41 24AA02/24LC02B/24FC02 NOTES: 2007-2019 Microchip Technology Inc. DS20001709L-page 42 24AA02/24LC02B/24FC02 THE MICROCHIP WEBSITE CUSTOMER SUPPORT Microchip provides online support via our website at www.microchip.com. This website is used as a means to make files and information easily available to customers. Accessible by using your favorite Internet browser, the website contains the following information: Users of Microchip products can receive assistance through several channels: * Product Support - Data sheets and errata, application notes and sample programs, design resources, user's guides and hardware support documents, latest software releases and archived software * General Technical Support - Frequently Asked Questions (FAQ), technical support requests, online discussion groups, Microchip consultant program member listing * Business of Microchip - Product selector and ordering guides, latest Microchip press releases, listing of seminars and events, listings of Microchip sales offices, distributors and factory representatives * * * * Distributor or Representative Local Sales Office Field Application Engineer (FAE) Technical Support Customers should contact their distributor, representative or Field Application Engineer (FAE) for support. Local sales offices are also available to help customers. A listing of sales offices and locations is included in the back of this document. Technical support is available through the website at: http://microchip.com/support CUSTOMER CHANGE NOTIFICATION SERVICE Microchip's customer notification service helps keep customers current on Microchip products. Subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest. To register, access the Microchip website at www.microchip.com. Under "Support", click on "Customer Change Notification" and follow the registration instructions. 2007-2019 Microchip Technology Inc. DS20001709L-page 43 24AA02/24LC02B/24FC02 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. [X] PART NO. Device Device: (1) Tape and Reel Option -X /XX Temperature Range Package 24AA02: = 1.7V, 2-Kbit I2C Serial EEPROM 24LC02B: = 2.5V, 2-Kbit I2C Serial EEPROM 24FC02: = 1.7V, High Speed, 2-Kbit I2C Serial EEPROM Tape and Blank = Standard packaging (tube or tray) Reel Option: T = Tape and Reel(1) Temperature I Range: E Package: = -40C to +85C (Industrial) = -40C to +125C (Extended) MC = Plastic Dual Flat, No Lead Package - 2x3x0.9 mm Body, 8-lead (DFN) MS = Plastic Micro Small Outline Package, 8-lead (MSOP) P = Plastic Dual In-Line - 300 mil Body, 8-lead (PDIP) LT = Plastic Small Outline Transistor, 5-lead (SC-70) (Tape and Reel only) SN = Plastic Small Outline - Narrow, 3.90 mm Body, 8-lead (SOIC) OT = Plastic Small Outline Transistor, 5-lead (SOT-23) (Tape and Reel only) MNY = Plastic Dual Flat, No Lead Package - 2x3x0.8 mm Body, 8-lead (TDFN) ST = Plastic Thin Shrink Small Outline - 4.4 mm, 8-lead (TSSOP) MUY = Plastic Dual Flat, No Lead Package - 2x3x0.6 mm Body, 8-lead (UDFN) Examples: a) 24LC02BT-I/MC: Tape and Reel, Industrial Temperature, 2.5V, DFN package. b) 24LC02BT-I/MS: Tape and Reel, Industrial Temperature, 2.5V, MSOP package. c) 24AA02-I/P: Industrial Temperature, 1.7V, PDIP package. d) 24LC02BT-I/LT: Tape and Reel, Industrial Temperature, 2.5V, SC-70 package. e) 24AA02-I/SN: Industrial Temperature, 1.7V, SOIC package. f) 24AA02T-I/OT: Tape and Reel, Industrial Temperature, 1.7V, SOT-23 package. g) 24AA02T-I/MNY: Tape and Reel, Industrial Temperature, 1.7V, TDFN package. h) 24AA02T-I/ST: Tape and Reel, Industrial Temperature, 1.7V, TSSOP package. i) 24FC02-I/P: Industrial Temperature, 1.7V, PDIP package. j) 24FC02T-I/MUY: Tape and Reel, Industrial Temperature, 1.7V, UDFN package. Note 1: Tape and Reel identifier only appears in the catalog part number description. This identifier is used for ordering purposes and is not printed on the device package. Check with your Microchip Sales Office for package availability with the Tape and Reel option. 2: 2007-2019 Microchip Technology Inc. Contact Microchip for Automotive grade ordering part numbers. DS20001709L-page 44 24AA02/24LC02B/24FC02 Note the following details of the code protection feature on Microchip devices: * Microchip products meet the specification contained in their particular Microchip Data Sheet. * Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. * There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. * Microchip is willing to work with the customer who is concerned about the integrity of their code. * Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable." Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights unless otherwise stated. Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company's quality system processes and procedures are for its PIC(R) MCUs and dsPIC(R) DSCs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified. Trademarks The Microchip name and logo, the Microchip logo, AnyRate, AVR, AVR logo, AVR Freaks, BitCloud, chipKIT, chipKIT logo, CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KeeLoq, Kleer, LANCheck, LINK MD, maXStylus, maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB, OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip Designer, QTouch, SAM-BA, SpyNIC, SST, SST Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. ClockWorks, The Embedded Control Solutions Company, EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS, mTouch, Precision Edge, and Quiet-Wire are registered trademarks of Microchip Technology Incorporated in the U.S.A. Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BodyCom, CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, INICnet, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, memBrain, Mindi, MiWi, motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries. GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. (c) 2019, Microchip Technology Incorporated, All Rights Reserved. ISBN: 978-1-5224-4476-3 2007-2019 Microchip Technology Inc. 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