LT3795
1
3795fc
For more information www.linear.com/LT3795
TYPICAL APPLICATION
FEATURES DESCRIPTION
110V LED Controller with
Spread Spectrum Frequency Modulation
The LT
®
3795 is a DC/DC controller designed to regulate a
constant-current or constant-voltage and is ideal for driv-
ing LEDs. It drives a low side external N-channel power
MOSFET from an internal regulated 7.7V supply. The fixed
frequency and current mode architecture result in stable
operation over a wide range of supply and output voltages.
Spread spectrum frequency modulation (SSFM) can be
activated for improved electromagnetic compatibility (EMC)
performance. The ground referred voltage FB pin serves as
the input for several LED protection features, and also al-
lows the converter to operate as a constant-voltage source.
The maximum output current is set by an external resistor,
and the output current amplifier has a rail-to-rail common
mode range. The LT3795 also includes a separate input
current sensing amplifier that is used to limit input current.
The TG pin inverts and level shifts the PWM signal to drive
the gate of the external PMOS. The PWM input provides
LED dimming ratios of up to 3000:1, and the CTRL inputs
provide additional analog dimming capability.
Short-Circuit Robust Boost LED Driver with Spread Spectrum Frequency Modulation
APPLICATIONS
n 3000:1 True Color PWM™ Dimming
n Wide Input Voltage Range: 4.5V to 110V
n Input and Output Current Reporting
n PMOS Switch Driver for PWM and Output Disconnect
n Internal Spread Spectrum Frequency Modulation
n ±2% Constant Voltage Regulation
n ±3% Constant Current Regulation: 0V VOUT ≤ 110V
n Programmable Input Current limit
n CTRL Inputs Linearly Adjust LED Current
n Adjustable Frequency: 100kHz to 1MHz
n Programmable Open LED Protection with OPENLED Flag
n Short-Circuit Protection and SHORTLED Flag
n Programmable Undervoltage Lockout with Hysteresis
n Soft-Start with Programmable Fault Restart Timer
n C/10 Detection for Battery Charging
n Available in 28-Lead TSSOP Package
n High Power LED, High Voltage LED
n Battery Chargers
n Accurate Current Limited Voltage Regulators
L, LT, LT C, LT M, Linear Technology and the Linear logo are registered trademarks and True
Color PWM is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Protected by U.S. Patents, including 7199560, 7321203,
7746300.
Efficiency vs VIN
VIN (V)
0
90
100
30 50
3795 TA01b
85
80
10 20 40 60
75
70
95
EFFICIENCY (%)
IVINPVIN IVINNEN/UVLO
RT ISMON SSVC
OPENLED
SHORTLED
OPENLED
SHORTLED
87V LED
400mA
LT3795
3795 TA01a
CTRL1
CTRL2
PWMPWM
VREF
IVINCOMP
RAMP
OVLO
GND
FB
ISP
ISN
TG
INTVCC INTVCC
INTVCC
GATE
SENSE
6.8nF
0.1µF 0.1µF
22µH
15mΩ
8V TO 60V
110V (TRANSIENT)
63V OVLO
31.6k
250kHz
10k
4.7µF
10nF
499k
2.2µF
×3
12.4k
115k
VIN
2.2µF
×4
13.3k
15mΩ
620mΩ
1M
6.8nF
100k100k
LT3795
2
3795fc
For more information www.linear.com/LT3795
PIN CONFIGURATIONABSOLUTE MAXIMUM RATINGS
VIN .......................................................................... 110V
EN/UVLO ................................................................. 110V
ISP, ISN ................................................................... 110V
TG, GATE...............................................................Note 2
IVINP, IVINN ............................................................ 110V
VIN - IVINN ................................................... 0.3V to 4V
INTVCC (Note 3) .....................................8.6V, VIN + 0.3V
PWM, SHORTLED, OPENLED .....................................12V
FB, RAMP, OVLO .........................................................8V
CTRL1, CTRL2 ...........................................................15V
SENSE ...................................................................... 0.5V
ISMON, IVINCOMP .....................................................5V
VC, VREF, SS ................................................................ 3V
RT ...............................................................................2V
Operating Junction Temperature Range (Note 4)
LT3795E/LT3795I .................................. 40 to 125°C
LT3795H ................................................40 to 150°C
Storage Temperature Range ......................65 to 150°C
(Note 1)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
TOP VIEW
FE PACKAGE
28-LEAD PLASTIC TSSOP
28
27
26
25
24
23
22
21
20
19
18
17
16
15
ISP
ISN
TG
GND
ISMON
CTRL2
FB
VC
CTRL1
VREF
SS
RT
RAMP
PWM
IVINCOMP
IVINP
IVINN
OVLO
EN/UVLO
VIN
GND
GND
INTVCC
GATE
SENSE
GND
OPENLED
SHORTLED
29
GND
TJMAX = 150°C, θJA = 30°C/W, θJC = 10°C/W
EXPOSED PAD (PIN 29) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
ELECTRICAL CHARACTERISTICS
PARAMETER CONDITIONS MIN TYP MAX UNITS
VIN Minimum Operating Voltage VIN Tied to INTVCC 4.5 V
VIN Shutdown IQEN/UVLO = 0V, PWM = 0V
EN/UVLO = 1.15V, PWM = 0V 10
22 µA
µA
VIN Operating IQ (Not Switching) RT = 82.5k to GND, FB = 1.5V 2.9 3.5 mA
VREF Voltage –100µA ≤ IREF ≤ 10µA l1.97 2.015 2.06 V
VREF Pin Line Regulation 4.5V < VIN < 110V 1.5 m%/V
VREF Pin Load Regulation –100µA ≤ IREF ≤ 0µA 10 m%/µA
SENSE Current Limit Threshold l100 117 125 mV
The l denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C, VIN = 24V, EN/UVLO = 24V, CTRL1 = CTRL2 = 2V, PWM = 5V, unless otherwise noted.
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LT3795EFE#PBF LT3795EFE#TRPBF LT3795FE 28-Lead Plastic TSSOP –40°C to 125°C
LT3795IFE#PBF LT3795IFE#TRPBF LT3795FE 28-Lead Plastic TSSOP –40°C to 125°C
LT3795HFE#PBF LT3795HFE#TRPBF LT3795FE 28-Lead Plastic TSSOP –40°C to 150°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through
designated sales channels with #TRMPBF suffix.
http://www.linear.com/product/LT3795#orderinfo
LT3795
3
3795fc
For more information www.linear.com/LT3795
The l denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C, VIN = 24V, EN/UVLO = 24V, CTRL1 = CTRL2 = 2V, PWM = 5V, unless otherwise noted.
PARAMETER CONDITIONS MIN TYP MAX UNITS
SENSE Input Bias Current Current Out of Pin 65 µA
SS Sourcing Current SS = 0V 28 µA
SS Sinking Current ISP – ISN = 1V, SS = 2V 2.8 µA
Error Amplifier
Full Scale LED Current Sense Threshold
(V(ISP-ISN))ISP = 48V, CTRL1 ≥ 1.2V, CTRL2 ≥ 1.2V
ISP = 0V, CTRL1 ≥ 1.2V, CTRL2 ≥ 1.2V
l
l
243
243 250
250 257
257 mV
mV
9/10th LED Current Sense Threshold
(V(ISP-ISN))ISP = 48V, CTRL1 = 1V, CTRL2 = 1.2V
ISP = 0V, CTRL1 = 1V, CTRL2 = 1.2V
l
l
220
220 225
225 230
230 mV
mV
1/2 LED Current Sense Threshold
(V(ISP-ISN))ISP = 48V, CTRL1 = 0.6V, CTRL2 = 1.2V
ISP = 0V, CTRL1 = 0.6V, CTRL2 = 1.2V
l
l
119
119 125
125 130
130 mV
mV
1/10th LED Current Sense Threshold
(V(ISP-ISN)) ISP = 48V, CTRL1 = 0.2V, CTRL2 = 1.2V
ISP = 0V, CTRL1 = 0.2V, CTRL2 = 1.2V
l
l
16
16 25
25 32
32 mV
mV
ISP/ISN Current Monitor Voltage (VISMON) V(ISP-ISN) = 250mV, ISP = 48V, –50µAIISMON ≤ 0 µA
V(ISP-ISN) = 250mV, ISP = 0V, –50µAIISMON ≤ 0 µA
l
l
0.96
0.96 1
11.04
1.04 V
V
ISP/ISN Overcurrent Protection Threshold
(V(ISP-ISN))ISN = 48V
ISN = 0V
l
l
360
360 375
375 390
390 mV
mV
CTRL1, CTRL2 Input Bias Current Current Out of Pin, CTRL = 1V 50 200 nA
ISP/ISN Current Sense Amplifier Input
Common Mode Range 0 110 V
ISP/ISN Input Current Bias Current
(Combined) PWM = 5V (Active), ISP = 48V
PWM = 0V (Standby), ISP = 48V 700
0
0.1 µA
µA
ISP/ISN Current Sense Amplifier gmV(ISP-ISN) = 250mV 350 µS
VC Output Impedance 2000
VC Standby Input Bias Current PWM = 0V –20 20 nA
FB Regulation Voltage (VFB) ISP = ISN = 48V
ISP = ISN = 48V
l1.230
1.238 1.250
1.250 1.270
1.264 V
V
FB Amplifier gm600 µS
FB Pin Input Bias Current Current Out of Pin, FB = VFB 40 200 nA
FB Open LED Threshold OPENLED Falling, ISP = ISN = 48V VFB – 62mV VFB – 52mV VFB – 42mV V
C/10 Comparator Threshold (V(ISP-ISN))OPENLED Falling, FB = 1.25V, ISP = 48V
OPENLED Falling, FB = 1.25V, ISN = 0V 25
25 mV
mV
FB Overvoltage Threshold TG Rising VFB + 35mV VFB + 50mV VFB + 60mV V
VC Current Mode Gain (∆VVC/∆VSENSE) 4.2 V/V
FB SHORTLED Threshold SHORTLED Falling l300 350 mV
VC Pin Source Current VC = 1.2V 10 µA
VC Pin Sink Current VC = 1.2V, FB = 1.4V 30 µA
Input Current Sense Amplifier
Input Current Sense Amplifier Input Voltage
Common Range (VIVINP/VIVINN)
l2.5 110 V
Input Current Sense Threshold
(VIVINP - VIVINN)VIVINP = 48V, VIN = 48V l57 60 63 mV
Input Current Monitor V(IVINCOMP) VIVINP-VIVINN = 50mV, VIN = 48V l0.94 1 1.06 V
Input Bias Current (I(IVINN)) VIVINP-VIVINN = 50mV, VIN = 48V 100 1000 nA
Input Current Sense Amplifier gmVIVINP-VIVINN = 60mV, VIN = 48V 3400 µS
Input Step Response (to 50% of Output Step) ∆VSENSE = 60mV Step, VIN = 48V 1 µs
IVINCOMP Pin Resistance to GND VIN = 48V 15
ELECTRICAL CHARACTERISTICS
LT3795
4
3795fc
For more information www.linear.com/LT3795
PARAMETER CONDITIONS MIN TYP MAX UNITS
Linear Regulator
INTVCC Regulation Voltage l7.4 7.7 8 V
Dropout (VIN-INTVCC) IINTVCC = –10mA, VIN = 4.5V 550 mV
INTVCC Current Limit VIN = 110V, INTVCC = 6V
VIN = 12V, INTVCC = 6V 18
85 mA
mA
INTVCC Shutdown Bias Current if Externally
Driven to 7V EN/UVLO = 0V, INTVCC = 7V 13 17 µA
INTVCC Undervoltage Lockout 3.8 4 4.1 V
INTVCC Undervoltage Lockout Hysteresis 200 mV
Oscillator
Switching Frequency RT = 82.5k
RT = 19.6k
RT = 6.65k
l
l
l
85
340
900
105
400
1000
125
480
1150
kHz
kHz
kHz
Minimum Off-Time (Note 5) 160 ns
Minimum On-Time (Note 5) 210 ns
Switching Frequency Modulation VRAMP = 2V 70 %
RAMP Input Low Threshold 1 V
RAMP Input High Threshold 2 V
RAMP Pin Source Current RAMP = 0.4V 12 µA
RAMP Pin Sink Current RAMP = 1.6V 12 µA
LOGIC Input/Outputs
PWM Input Threshold Rising l0.96 1 1.04 V
PWM Pin Bias Current 10 µA
EN/UVLO Threshold Voltage Falling l1.185 1.220 1.25 V
EN/UVLO Rising Hysteresis 20 mV
EN/UVLO Input Low Voltage IVIN Drops Below 10µA 0.4 V
EN/UVLO Pin Bias Current Low EN/UVLO = 1.15V 2.5 3 3.8 µA
EN/UVLO Pin Bias Current High EN/UVLO = 1.30V 10 100 nA
OPENLED OUTPUT Low IOPENLED = 0.5mA 300 mV
SHORTLED OUTPUT Low ISHORTLED = 0.5mA 300 mV
OVLO Threshold Voltage Rising l1.215 1.25 1.28 V
OVLO Falling Hysteresis 28 mV
OVLO Pin Input Current 150 nA
Gate Driver
tr NMOS GATE Driver Output Rise Time CL = 3300pF, 10% to 90% 20 ns
tf NMOS GATE Driver Output Fall Time CL = 3300pF, 10% to 90% 18 ns
NMOS GATE Output Low (VOL) 0.05 V
NMOS GATE Output High (VOH)INTVCC
0.05 V
tr Top GATE Driver Output Rise Time CL = 300pF 50 ns
tf Top GATE Driver Output Fall Time CL = 300pF 100 ns
Top Gate On Voltage (VISP-VTG) ISP = 48V 7 8 V
Top Gate Off Voltage (VISP-VTG)PWM = 0V, ISP = 48V 0 0.3 V
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C, VIN = 24V, EN/UVLO = 24V, CTRL1 = CTRL2 = 2V, PWM = 5V, unless otherwise noted.
LT3795
5
3795fc
For more information www.linear.com/LT3795
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Do not apply a positive or negative voltage source to TG and GATE
pins, otherwise permanent damage may occur.
Note 3: Operating maximum for INTVCC is 8V.
Note 4: The LT3795E is guaranteed to meet specified performance from
0°C to 125°C. Specifications over the –40°C to 125°C operating junction
temperature range are assured by design, characterization and correlation
with statistical process controls. The LT3795I is guaranteed to meet
performance specifications over the –40°C to 125°C operating junction
temperature range. The LT3795H is guaranteed over the full –40°C to
150°C operating junction temperature range. High junction temperatures
degrade operating lifetimes. Operating lifetime is derated at junction
temperatures greater than 125°C.
Note 5: See Duty Cycle Considerations in the Applications Information
section.
TYPICAL PERFORMANCE CHARACTERISTICS
V(ISP-ISN) Threshold vs FB Voltage VFB vs Temperature
V(ISP-ISN) Threshold vs VCTRL V(ISP-ISN) Threshold vs VISP
V(ISP-ISN) Full-Scale Threshold
vs Temperature
TA = 25°C, unless otherwise noted.
V(ISP-ISN) Threshold at CTRL1 = 0.6V,
CTRL2 = 1.2V vs Temperature
VCTRL (V)
0
200
300
0.6 1.0
3795 G01
150
100
0.2 0.4 0.8 1.2 1.4
50
0
250
V(ISP-ISN) THRESHOLD (mV)
TEMPERATURE (°C)
–50
250
254
25 75
3795 G03
249
248
–25 0 50 100 150125
247
246
253
252
251
V(ISP-ISN) THRESHOLD (mV)
ISP = 48V
CTRL1= CTRL2 = 2V
TEMPERATURE (°C)
–50
128
3795 G03a
–25 0 25 50 75 100 150125
127
125
124
126
122
123
V(ISP-ISN) (mV)
VISP (V)
0
251
253
40 10080
3795 G02
250
249
20 60 120
248
247
252
V(ISP-ISN) THRESHOLD (mV)
TEMPERATURE (°C)
–50
1.24
1.27
3795 G05
–25 0 25 50 10075 150125
1.23
1.26
1.25
VFB (V)
VFB (V)
1.1
150
300
3795 G04
100
1.15 1.2 1.25 1.3
50
0
250
200
V(ISP-ISN) THRESHOLD (mV)
LT3795
6
3795fc
For more information www.linear.com/LT3795
TYPICAL PERFORMANCE CHARACTERISTICS
RT vs Switching Frequency (kHz)
Switching Frequency
vs Temperature
Quiescent Current vs VIN VISMON vs V(ISP-ISN)
ISP/ISN Input Bias Current
vs VISP , VISN VREF Voltage vs Temperature
VREF vs VIN
TA = 25°C, unless otherwise noted.
ISP/ISN Overcurrent Protection
Threshold vs Temperature
V(ISP-ISN) (mV)
0
1200
1000
1400
2000
3795 G13
100 200 300 400 500
800
600
400
200
0
1600
1800
VISMON (mV)
TEMPERATURE (°C)
–50
400
390
410
440
3795 G11
0–25 25 50 75 100 150125
380
370
360
420
430
SWITCHING FREQUENCY (kHz)
RT = 19.6k
SWITCHING FREQUENCY (kHz)
0
3795 G10
400300200100 500 600 700 800 900 1000
100
10
1
RT (kΩ)
VIN (V)
0
2.01
2.00
2.02
2.05
3795 G09
4020 60 80 120100
1.99
1.98
1.97
2.03
2.04
VREF (V)
VIN (V)
0
1.0
1.5
2.0
3.0
3795 G12
4020 100
60 80 120
0.5
0
2.5
VIN CURRENT (mA)
Switching Frequency
vs SS Voltage
SS VOLTAGE (mV)
0
450
3795 G11a
200 400 600 800 1000 1200
350
400
250
200
300
150
0
50
100
SWITCHING FREQUENCY (kHz)
RT = 19.6k
TEMPERATURE (°C)
–50
374
372
380
3795 G06
–25 0 25 50 10075 150125
370
378
376
ISP/ISN OVERCURRENT THRESHOLD (mV)
VISP, VISN (V)
0
500
3795 G07
20 40 60 12010080
400
300
200
100
0
800
900
700
600
ISP, ISN BIAS CURRENT (µA)
ISP
ISN
TEMPERATURE (°C)
–50
2.01
2.00
2.05
3795 G08
–25 0 25 50 10075 125 150
1.99
1.98
1.97
1.96
2.04
2.03
2.02
VREF (V)
IREF = 0µA
IREF = –100µA
LT3795
7
3795fc
For more information www.linear.com/LT3795
TYPICAL PERFORMANCE CHARACTERISTICS
EN/UVLO Hysteresis Current
vs Temperature
TA = 25°C, unless otherwise noted.
EN/UVLO Falling/Rising
Threshold vs Temperature
SENSE Current Limit Threshold
vs Temperature
TEMPERATURE (°C)
–50
1.25
1.24
1.28
3795 G15
–25 0 25 50 75 100 150125
1.23
1.22
1.21
1.20
1.19
1.26
1.27
EN/UVLO (V)
EN/UVLO RISING THRESHOLD
EN/UVLO FALLING THRESHOLD
TEMPERATURE (°C)
–50
115
114
118
3795 G16
–25 0 25 50 75 100 125 150
113
112
111
110
109
108
116
117
SENSE THRESHOLD (mV)
TEMPERATURE (°C)
–50
2.0
1.5
3.5
3795 G14
–25 0 25 50 75 100 150125
1.0
0.5
0
2.5
3.0
EN/UVLO HYSTERESIS CURRENT (µA)
INTVCC Current Limit
vs Temperature
INTVCC vs VIN
INTVCC Dropout Voltage
vs Current, Temperature INTVCC vs Temperature
INTVCC Current Limit vs VIN
TEMPERATURE (°C)
–50
70
80
100
3795 G19
0–25 25 50 75 150100 125
60
50
90
INTVCC CURRENT LIMIT (mA)
VIN = 24V
VIN = 48V
INTVCC LOAD (mA)
0
1800 VIN = 6V
3795 G21
5 10 15 20
125°C
25°C
–55°C
1600
1400
1200
1000
800
600
400
200
0
INTVCC DROPOUT (mV)
150°C
75°C
0°C
–40°C
VIN (V)
0
40
60
120
3795 G18
4020 60 80 120100
20
0
80
100
INTVCC CURRENT LIMIT (mA)
VIN (V)
0
9
3795 G20
2010 30 40 50 60 70 80 90 110100
7
8
6
5
4
3
2
1
0
INTVCC (V)
TEMPERATURE (°C)
–50
–25 0 5025 75 125100 150
7.9
8.0
7.8
7.7
7.6
7.5
7.4
7.3
INTVCC (V)
SENSE Current Limit Threshold
vs Duty Cycle
DUTY CYCLE (%)
0
120
115
3795 G17
20 40 60 80 100
110
105
100
SENSE THRESHOLD (mV)
LT3795
8
3795fc
For more information www.linear.com/LT3795
V(IVINP-IVINN) Threshold
vs Temperature
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, unless otherwise noted.
Top Gate (PMOS) Rise/Fall Time
vs Capacitance
VIVINCOMP vs V(IVINP-IVINN)
RAMP Pin Sourcing and Sinking
Current vs Temperature
NMOS Gate Rise/Fall Time
vs Capacitance
V(IVINP-IVINN) Threshold vs VIN
Top Gate Driver Rising Edge
VIN (V)
0
65
64
3795 G24
20 40 60 80 100 120
63
62
61
60
59
58
57
56
55
V(IVINP-IVINN) (mV)
V(IVINP-IVINN) (mV)
0
1.8
3795 G25
20 40 60 80
1.4
1.6
0.8
0.6
1.2
1.0
0.4
0
0.2
VIVINCOMP (V)
VIN = 24V
Top Gate Driver Falling Edge
CAPACITANCE (nF)
0
160
3795 G27
10 20 30 40 50
120
140
80
60
100
40
0
20
TIME (ns)
RISE TIME
FALL TIME
CAPACITANCE (nF)
0
800
3795 G28
1 2 3 4 5 6 7 8 9 10
600
700
400
300
500
200
0
100
TIME (ns)
FALL TIME
RISE TIME
PMOS VISHAY SILICONIX Si7113DN
3795 G29
100ns/DIV
5V
PWM
TG
0V
85V
75V
TEMPERATURE (°C)
–50
65
64
63
3795 G23
–25 0 25 50 75 100 150125
62
61
60
59
58
57
56
55
V(IVINP-IVINN) (mV)
VIN = 24V
TEMPERATURE (°C)
–50
13
3795 G26
5025–25 0 75 100 125 150
12
11
10
8
9
CURRENT (µA)
SINKING
SOURCING
PMOS VISHAY SILICONIX Si7113DN
3795 G30
100ns/DIV
5V
PWM
TG
0V
85V
75V
LT3795
9
3795fc
For more information www.linear.com/LT3795
PIN FUNCTIONS
ISP (Pin 1): Connection Point for the Positive Terminal
of the Current Feedback Resistor (RLED). Also serves as
positive rail for TG pin driver.
ISN (Pin 2): Connection Point for the Negative Terminal
of the Current Feedback Resistor (RLED).
TG (Pin 3): Top Gate Driver Output. An inverted PWM
signal drives the gate of a series PMOS device between
VISP and (VISP – 7V) if VISP > 7V. An internal 7V clamp
protects the PMOS gate by limiting VGS. Leave TG uncon-
nected if not used.
GND (Pins 4, 17, 21, 22, Exposed Pad Pin 29): Ground.
These pins also serve as current sense input for control
loop, sensing the negative terminal of the current sense
resistor in the source of the N-channel MOSFET. Solder
the exposed pad directly to the ground plane.
ISMON (Pin 5): ISP/ISN Current Report Pin. The LED
current sensed by ISP/ISN inputs is reported as VISMON =
ILEDRLED • 4. Leave ISMON pin unconnected if not used.
When PWM is low, ISMON is driven to ground. Bypass
with a 47nF capacitor or higher if needed.
CTRL2 (Pin 6): Current Sense Threshold Adjustment
Pin 2. This pin has identical functions as CTRL1. The
V(ISP-ISN) threshold is regulated by the internal 1.1V refer-
ence voltage, CTRL1 or CTRL2. Whichever is the lowest
takes precedence. Regulating threshold V(ISP-ISN) is 0.25 •
VCTRLX less an offset for 0.1V < VCTRLX < 1V. For VCTRLX >
1.2V the current sense threshold is constant at the full-scale
value of 250mV. For 1V < VCTRLX < 1.2V, the dependence
of the current sense threshold upon VCTRLX transitions
from a linear function to a constant value, reaching 98%
of full-scale value by VCTRLX = 1.1V. Connect CTRL1 and
CTRL2 to VREF for the 250mV default current threshold.
Do not leave this pin open. Connect either CTRL pin to
GND for zero LED current.
FB (Pin 7): Voltage Loop Feedback Pin. FB is intended for
constant-voltage regulation or for LED protection/open
LED detection. The internal transconductance amplifier
with output VC regulates FB to 1.25V (nominal) through
the DC/DC converter. If the FB input is regulating the loop,
and V(ISP-ISN) is less than 25mV (typical), the OPENLED
pull-down is asserted. This action may signal an open LED
fault. If FB is driven above the 1.3V (by an external power
supply spike, for example), the GATE pin is pulled low to
turn off the external N-channel MOSFET and the TG pin
is driven high to protect the LEDs from an overcurrent
event. Do not tie this pin to GND as the SHORTLED will
be asserted and the part will be shut down.
VC (Pin 8): Transconductance Error Amplifier Output Pin.
Used to stabilize the control loop with an RC network. This
pin is high impedance when PWM is low, a feature that
stores the demand current state variable for the next PWM
high transition. Connect a capacitor between this pin and
GND; a resistor in series with the capacitor is recommended
for fast transient response. Do not leave this pin open.
CTRL1 (Pin 9): Current Sense Threshold Adjustment
Pin 1. This pin has an identical function as CTRL2. Please
refer to the CTRL2 pin description.
VREF (Pin 10): Voltage Reference Output Pin. Typically
2.015V. This pin drives a resistor divider for the CTRL
pins, either for analog dimming or for temperature limit/
compensation of the LED load. It can supply up to 100μA.
SS (Pin 11): Soft-Start Pin. This pin modulates oscillator
frequency and compensation pin voltage (VC) clamp. The
soft-start interval is set with an external capacitor. The pin
has a 28μA (typical) pull-up current source to an internal
2.5V rail. This pin can be used as fault timer. Provided the
SS pin has exceeded 1.7V to complete a blanking period
at start-up, the pull-up current source is disabled and a
2.8µA pull-down current enabled when any one of the
following fault conditions happen:
1. LED overcurrent (ISP-ISN > 0.375V)
2. INTVCC undervoltage
3. Output short (FB < 0.3V after start-up)
4. Thermal limit
The SS pin must be discharged below 0.2V to reinitiate a
soft-start cycle. Switching is disabled until SS begins to
recharge. It is important to select a capacitor large enough
that FB can exceed 0.3V under normal load conditions
before SS exceeds 1.7V. Do not leave this pin open.
RT (Pin 12): Switching Frequency Adjustment Pin. Set the
frequency using a resistor to GND (for resistor values, see
the Typical Performance curve or Table 2). Do not leave
the RT pin open.
LT3795
10
3795fc
For more information www.linear.com/LT3795
PIN FUNCTIONS
RAMP (Pin 13): The RAMP pin is used for spread spectrum
frequency modulation. The internal switching frequency
is spread out to 70% of the original value, where the
modulation frequency is set by 12µA/(2 1V CRAMP). If
not used, tie this pin to GND.
PWM (Pin 14): PWM Input Signal Pin. A low signal turns
off switching, idles the oscillator, disconnects the VC pin
from all internal loads, and drives TG to the ISP level.
PWM has an internal 500k pull-down resistor. If not used,
connect to VREF.
SHORTLED (Pin 15): An open-collector pull-down on
SHORTLED asserts when any of the following conditions
happen:
1. FB < 0.3V after SS pin reaches 1.7V at start-up.
2. LED overcurrent (V(ISP-ISN) > 375mV).
To function, the pin requires an external pull-up resistor.
SHORTLED status is only updated during PWM high state
and latched during PWM low state. SHORTLED remains
asserted until the SS pin is discharged below 0.2V.
OPENLED (Pin 16): An open-collector pull-down on
OPENLED asserts if the FB input is above 1.20V (typical),
and V(ISP-ISN) is less than 25mV (typical). To function, the
pin requires an external pull-up resistor. OPENLED status
is updated only during PWM high state and latched during
PWM low state.
SENSE (Pin 18): The current sense input for the control
loop. Kelvin connect this pin to the positive terminal of
the switch current sense resistor, RSENSE, in the source
of the N-channel MOSFET. The negative terminal of the
current sense resistor should be Kelvin connected to the
GND plane of the IC.
GATE (Pin 19): N-Channel MOSFET Gate Driver Output.
Switches between INTVCC and GND. It is driven to GND
during shutdown, fault or idle states.
INTVCC (Pin 20): Regulated Supply for Internal Loads
and GATE Driver. Supplied from VIN and regulates to 7.7V
(typical). INTVCC must be bypassed with a 4.7μF capacitor
placed close to the pin. Connect INTVCC directly to VIN if
VIN is always less than or equal to 8V.
VIN (Pin 23): Input Supply Pin. Must be locally bypassed
with a 0.22μF (or larger) capacitor placed close to the IC.
EN/UVLO (Pin 24): Enable and Undervoltage Lockout
Pin. An accurate 1.22V falling threshold with externally
programmable hysteresis detects when power is OK to
enable switching. Rising hysteresis is generated by the
external resistor divider and an accurate internalA
pull-down current. Above the threshold, EN/UVLO input
bias current is sub-μA. Below the falling threshold, aA
pull-down current is enabled so the user can define the
hysteresis with the external resistor selection. An under-
voltage condition resets soft-start. Tie to 0.4V, or less, to
disable the device.
OVLO (Pin 25): Input Overvoltage Lockout Pin. An ac-
curate 1.25V rising threshold detects when power is OK
to enable switching.
IVINN (Pin 26): Connection Point for the Negative Terminal
of the Input Current Sense Resistor (RINSNS). The input
current can be programmed by IIN = 60mV/RINSNS.
IVINP (Pin 27): Connection Point for the Positive Terminal
of the Input Current Sense Resistor.
IVINCOMP (Pin 28): Input Current Sense Amplifier Output
Pin. The voltage at IVINCOMP pin is proportional to IIN as
VIVINCOMP = IIN RINSNS 20. A 10nF or larger capacitor
to GND is required at this pin to compensate the input
current loop. Do not leave this pin open, and do not load
this pin with a current.
LT3795
11
3795fc
For more information www.linear.com/LT3795
BLOCK DIAGRAM
EN/UVLO
SHORT-CIRCUIT
DETECT
FB VC
ISMON
A1
A2
1.22V
1.5V
SCILM
2.5V
VLED
gm
EAMP
3µA
PWM
COMPARATOR
TGOFFB
1.25V
ISP ISP-7V
SHDN
1.25V
ISN 1.1V
100mV
+
+
+
+
+
+
+
1.2V
CTRL1
CTRL2
ISP
SS AND
LOGIC
TGOFFB
FAULTB
SCILM
SS
THERMAL
SHDN
PWM
10µA AT
FB = 1.25V
gm
TG
×4
+
A4
A5
A6
gm
A8
×1
+ 10µA AT
A6+ = A610µA
10µA AT
IVINCOMP
= 1.2V
2.8µA1mA
28µA
IVINP R1
R2 = R1
IVINN +
A11
IVINCOMP
5.5V R3 = R1 × 20
SHORTLED
SCILMINTVCC
OVFBVINOV
SS RT RAMP
3796 BD
+
A7
+
RAMP
GENERATOR
100kHz TO 1MHz
OSCILLATOR
PWM VIN
INTVCC
VREF
FAULTB
DRIVER
I
SENSE
+
I
LIM
7.7V
SENSE
GND
GATE
LDO
+
A3
Q
RS
OVLO OVFB
COMPARATOR
+
1.20V
FB
1.25V
A17
A16
A21
A7
+
200mV
100µA
2.015V
V
LED
INTV
CC
INTV
CC
C/10 COMPARATOR
WITH 200mV
HYSTERESIS
A7
+
A14
A10
+
A18
A9
A15
2V
12µA
12µA
A7
1V
A7
OPENLED
2.5V
113mV
FB
+
1.3V
+
0.3V
FB
EN
+
SQR
+
A19
A20
PWM
LT3795
12
3795fc
For more information www.linear.com/LT3795
OPERATION
The LT3795 is a constant-frequency, current mode con-
troller with a low side NMOS gate driver. The operation of
the LT3795 is best understood by referring to the Block
Diagram of the IC. In normal operation, with the PWM pin
low, the GATE pin is driven to GND, the TG pin is pulled
high to ISP to turn off the PMOS disconnect switch, the
VC pin goes high impedance to store the previous switch-
ing state on the external compensation capacitor, and
the ISP and ISN pin bias currents are reduced to leakage
levels. When the PWM pin transitions high, the TG pin
transitions low after a short delay. At the same time, the
internal oscillator wakes up and generates a pulse to set
the PWM latch, turning on the external power N-channel
MOSFET switch (GATE goes high). A voltage input propor-
tional to the switch current, sensed by an external current
sense resistor between the SENSE and GND input pins,
is added to a stabilizing slope compensation ramp and
the resulting switch current sense signal is fed into the
negative terminal of the PWM comparator. The current in
the external inductor increases steadily during the time
the switch is on. When the switch current sense voltage
exceeds the output of the error amplifier, labeled VC, the
latch is reset and the switch is turned off. During the
switch off phase, the inductor current decreases. At the
completion of each oscillator cycle, internal signals such
as slope compensation return to their starting points and
a new cycle begins with the set pulse from the oscillator.
Through this repetitive action, the PWM control algorithm
establishes a switch duty cycle to regulate a current or
voltage in the load. The VC signal is integrated over many
switching cycles and is an amplified version of the differ-
ence between the LED current sense voltage, measured
between ISP and ISN, and the target difference voltage
set by the CTRL1 or CTRL2 pin. In this manner, the error
amplifier sets the correct peak switch current level to keep
the LED current in regulation. If the error amplifier output
increases, more current is demanded in the switch; if it
decreases, less current is demanded. The switch current
is monitored during the on phase and the voltage across
the SENSE pin is not allowed to exceed the current limit
threshold of 113mV (typical). If the SENSE pin exceeds
the current limit threshold, the SR latch is reset regardless
of the output state of the PWM comparator. Likewise, any
fault condition, i.e. FB overvoltage (FB > 1.3V), output
short (FB < 0.3V) after start-up, input overvoltage (OVLO
> 1.25V) LED overcurrent, or INTVCC undervoltage (INTVCC
< 4V), the GATE pin is pulled down to GND immediately.
In voltage feedback mode, the operation is similar to that
described above, except the voltage at the VC pin is set by
the amplified difference of the internal reference of 1.25V
(nominal) and the FB pin. If FB is lower than the reference
voltage, the switch current increases; if FB is higher than
the reference voltage, the switch demand current decreases.
The LED current sense feedback interacts with the voltage
feedback so that FB does not exceed the internal reference
and the voltage between ISP and ISN does not exceed the
threshold set by either of the CTRL pins. For accurate current
or voltage regulation, it is necessary to be sure that under
normal operating conditions, the appropriate loop is domi-
nant. To deactivate the voltage loop entirely, FB can be set
between 0.4V and 1V through a resistor network to VREF pin.
To deactivate the LED current loop entirely, the ISP and ISN
should be tied together and CTRL1 and CTRL2 tied to VREF.
Tw o LED specific functions featured on the LT3795 are
controlled by the voltage feedback FB pin. First, when the
FB pin exceeds a voltage 52mV lower (–4%) than the FB
regulation voltage and V(ISP-ISN) is less than 25mV (typi-
cal), the pull-down driver on the OPENLED pin is activated.
This function provides a status indicator that the load may
be disconnected and the constant-voltage feedback loop
is taking control of the switching regulator. When the FB
pin drops below 0.3V after start-up, the SHORTLED pin
is asserted by comparator A16. A blanking period occurs
during start-up for the SHORTLED protection feature from
the EN/UVLO toggle until the SS pin reaches 1.7V.
LT3795 features a PMOS disconnect switch driver. The PMOS
disconnect switch can be used to improve the PWM dimming
ratio, and operate as fault protection as well. Once a fault
condition is detected, the TG pin is pulled high to turnoff the
PMOS switch. The action isolates the LED array from the power
path, preventing excessive current from damaging the LEDs.
A standalone input current sense amplifier is integrated in
the LT3795. The input current sense amplifier A11 senses
the input current and converts it to a voltage signal at the
IVINCOMP pin. When the voltage potential at the IVINCOMP
pin moves close to 1.2V, the amplifier A8 starts to interact
with the VC pin, and thus reduces the regulated LED cur-
rent. In this way, the input current is limited.
LT3795
13
3795fc
For more information www.linear.com/LT3795
INTVCC Regulator Bypassing and Operation
The INTVCC pin requires a capacitor for stable operation
and to store the charge for the large GATE switching cur-
rents. Choose a 10V rated low ESR, X7R or X5R ceramic
capacitor for best performance. A 4.7μF ceramic capacitor
is adequate for many applications. Place the capacitor
close to the IC to minimize the trace length to the INTVCC
pin and also to the IC ground.
An internal current limit on the INTVCC output protects the
LT3795 from excessive on-chip power dissipation. The
minimum value of this current limit should be considered
when choosing the switching N-channel MOSFET and the
operating frequency. IINTVCC can be calculated from the
following equation:
IINTVCC = QG • fOSC
Careful choice of a lower QG MOSFET allows higher switching
frequencies, leading to smaller magnetics. The INTVCC pin
has its own undervoltage disable (UVLO) set to 4V (typical)
to protect the external FETs from excessive power dissipation
caused by not being fully enhanced. If the INTVCC pin drops
below the UVLO threshold, the GATE pin is forced to 0V,
TG pin is pulled high and the soft-start pin will be reset. If
the input voltage, VIN, will not exceed 8V, then the INTVCC
pin should be connected to the input supply. Be aware
that a small current (typically 13μA) loads the INTVCC in
shutdown. If VIN is normally above, but occasionally drops
below the INTVCC regulation voltage, then the minimum
operating VIN is close to 4.5V. This value is determined
by the dropout voltage of the linear regulator and the 4V
INTVCC undervoltage lockout threshold mentioned above.
Programming the Turn-On and Turn-Off Thresholds
with the EN/UVLO Pin
The falling UVLO value can be accurately set by the resistor
divider. A smallA pull-down current is active when EN/
UVLO is below the threshold. The purpose of this current
is to allow the user to program the rising hysteresis. The
following equations should be used to determine the
values of the resistors:
VIN(FALLING) =1.22
R1+R2
R2
VIN(RISING) =VIN(FALLING) +3µA R
1
APPLICATIONS INFORMATION
Programming the Overvoltage Lockout Threshold with
the OVLO Pin
The input overvoltage lockout protection feature can be
implemented by a resistor from the VIN to OVLO pins as
shown in Figure 2. The following equations should be used
to determine the values of the resistors:
VIN,OVLO =1.25
R3+R4
R4
LED Current Programming
The LED current is programmed by placing an appropriate
value current sense resistor RLED between the ISP and ISN
pins. For best fault protection provided by the high side
PMOS disconnect switch, sensing of the current should
be done at the top of the LED string. If this option is not
available, then the current may be sensed at the bottom
of the string. Both the CTRL pins should be tied to a volt-
age higher than 1.2V to get the full-scale 250mV (typical)
threshold across the sense resistor. Either CTRL pin can
also be used to dim the LED current to zero, although
relative accuracy decreases with the decreasing voltage
sense threshold. The two CTRL pins have identical func-
tions. Whichever is the lowest takes precedence. When the
lower CTRL pin voltage is less than 1V, the LED current is:
ILED =
V
CTRL
100mV
R
LED
4 , 0.1V<VCTRL <1V
ILED = 0, VCTRL = 0V
Figure 1.
Figure 2.
LT3795
3795 F01
EN/UVLO
R1
R2
VIN
LT3795
3795 F02
OVLO
R3
R4
VIN
LT3795
14
3795fc
For more information www.linear.com/LT3795
When the lower CTRL pin voltage is between 1V and 1.2V,
the LED current varies with CTRL, but departs from the
previous equation by an increasing amount as the CTRL
voltage increases. Ultimately above 1.2V, the LED current
no longer varies with CTRL. The typical V(ISP-ISN) threshold
vs CTRL is listed in Table 1.
Table 1. V(ISP-ISN) Threshold vs CTRL
VCTRL (V) V(ISP-ISN) (mV)
1 225
1.05 236
1.1 244.5
1.15 248.5
1.2 250
When both the CTRL pins are higher than 1.2V, the LED
current is regulated to:
ILED =
250mV
R
LED
The CTRL pins should not be left open (tie to VREF if not
used). Either CTRL pin can also be used in conjunction
with a thermistor to provide overtemperature protection
for the LED load, or with a resistor divider to VIN to reduce
output power and switching current when VIN is low.
The presence of a time varying differential voltage signal
(ripple) across ISP and ISN at the switching frequency
is expected. The amplitude of this signal is increased by
high LED load current, low switching frequency and/or a
smaller value output filter capacitor. For best accuracy,
the amplitude of this ripple should be less than 25mV.
Programming Output Voltage (Constant-Voltage
Regulation) and Output Voltage Open LED and
Shorted LED Thresholds
The LT3795 has a voltage feedback pin FB that can be
used to program a constant-voltage output. In addition,
FB programming determines the output voltage that will
cause OPENLED and SHORTLED to assert. For a boost LED
driver, the output voltage can be programmed by selecting
the values of R5 and R6 (see Figure 3) according to the
following equation:
VOUT =1.25
R5+R6
R6
Figure 3. Feedback Resistor Connections for Boost and SEPIC
Applications
Figure 4. Feedback Resistor Connection for Buck Mode or
Buck-Boost Mode LED Driver
APPLICATIONS INFORMATION
LT3795
3795 F03
FB
R5
R6
VOUT
LT3795
3795 F04 R8
Q1
R7
LED
ARRAY
VOUT
FB
RSENSE
+
For an LED driver of buck mode or a buck-boost mode
configuration, the FB voltage is typically level shifted to a
signal with respect to GND as illustrated in Figure 4. The
output can be expressed as:
VOUT =1.25
R7
R8
+VBE(Q1)
If the open LED clamp voltage is programmed correctly
using the resistor divider, then the FB pin should never
exceed 1.2V when LEDs are connected.
To detect both open-circuit and short-circuit conditions
at the output, the LT3795 monitors both output voltage
and current. When FB exceeds VFB - 52mV, OPENLED is
asserted if V(ISP-ISN) is less than 25mV. OPENLED is de-
asserted when V(ISP-ISN) is higher than 70mV (typical) or
FB drops below VFB - 62mV (typical).
The SHORTLED pin is asserted if V(ISP-ISN) > 375mV or
the FB pin falls below 300mV (typical) after initial start-up
and SS reaches 1.7V. The ratio between the FB OPENLED
threshold of 1.2V and the SHORTLED threshold of 0.3V
can limit the range of VOUT. The range of VOUT using the
maximum SHORTLED threshold of 0.35V is 3.5:1. The
range of VOUT can be made wider using the circuits shown
LT3795
15
3795fc
For more information www.linear.com/LT3795
in Figure 5 and Figure 6. For a VOUT range that is greater
than 8:1, consult factory applications.
APPLICATIONS INFORMATION
Figure 6. Feedback Resistor Connection for Wide Range
Output in Buck Mode and Buck-Boost Mode Applications
Figure 5. Feedback Resistor Connection for Wide Range
Output in Boost and SEPIC Applications
LT3795
3795 F05
FB
R10
R11
R12
VOUT
VREF
Step 3:
R11=1000
1.7
(1.65) 91.4 (0.8) 18.3 1.7 =12.64,
Use R11=12.7kΩ
R12 =1000 1.7
(0.35) 91.4 (1.2) 18.3 =169kΩ
The resistor values for R14 and R15 in Figure 6 can be
calculated as shown below. See the example that follows
for a suggested R13 value.
R14 =R13
1.7
1.65VHOUT 0.8VLOUT 0.85VBE(Q1)
R15 =R131.7
0.35VH
OUT
1.2VL
OUT
+0.85V
BE
(Q1)
Example: Calculate the resistor values required to in-
crease the VOUT range of a buck-boost mode LED driver
to 7.5:1 and have OPENLED occur when VOUT is 43.5V.
Use VBE(Q1) = 0.7V:
Step 1: Choose R13 = 357k
Step 2: VLOUT = 43.5/7.5 = 5.8
Step 3:
R14 =357
1.7
(1.65) 43.5(0.8) 5.8 (0.85) 0.7 =9.12,
Use R14 =9.09kΩ
R15 =357 1.7
(0.35) 43.5 (1.2) 5.8+(0.85) 0.7 =68.5,
Use R15 =68.1kΩ
LED Overcurrent Protection Feature
The ISP and ISN pins have a short-circuit protection feature
independent of the LED current sense feature. This feature
prevents the development of excessive switching currents
and protects the power components. The short-circuit
protection threshold (375mV, typ) is designed to be 50%
higher than the default LED current sense threshold. Once
the LED overcurrent is detected, the GATE pin is driven to
GND to stop switching, TG pin is pulled high to disconnect
the LED array from the power path, and fault protection
is initiated via the SS pin.
LT3795
3795 F06
FB
R13 +
R14
R15
Q1
LED
ARRAY
VREF
VOUT
RSENSE
The equations to widen the range of VOUT are derived using
a SHORTLED threshold of 0.35V, an OPENLED threshold
of 1.2V and a reference voltage VREF of 2V. The resistor
values for R11 and R12 in Figure 5 can be calculated as
shown below. See the example that follows for a sug-
gested R10 value.
R11=R10
1.7
1.65VHOUT 0.8VLOUT 1.7
R12 =R101.7
0.35VH
OUT
1.2VL
OUT
Example: Calculate the resistor values required to increase
the VOUT range of a boost LED driver to 5:1 and have
OPENLED occur when VOUT is 91.4V:
Step 1: Choose R10 = 1M
Step 2: VLOUT = 91.4/5 = 18.3
LT3795
16
3795fc
For more information www.linear.com/LT3795
Figure 7. The Simplified LED Short-Circuit Protection
Schematic for Boost or Buck-Boost Mode Converter
Figure 9. The Simplified LED Short-Circuit Protection
Schematic for Buck Mode Converter
Figure 8. Short-Circuit Current
APPLICATIONS INFORMATION
LT3795
3795 F07
RSNS
RLED
LED+
GND (BOOST) OR
VIN (BUCK-BOOST MODE)
LED
STRING D2
ISP
GATE
SENSE
VIN
VIN
C1 M1
M2
ISN
TG
C2
L1 D1
LT3795
3795 F09
LED
STRING
TGISP ISNVIN
VIN RLED
RSNS
D3
GATE
SENSE
D1
D2
LED+
LED
L1
M1
M2 C2
C1
A typical LED short-circuit protection scheme for a boost
or buck-boost mode converter is shown in Figure 7. The
Schottky or ultrafast diode D2 should be put close to
the drain of M2 on the board. It protects the LED+ node
from swinging well below ground when being shorted
to ground through a long cable. Usually, the internal
protection loop takes about 100ns to respond as shown
in Figure 8. Refer to the Short-Circuit Robust Boost LED
Driver with Input Current Limit and Spread Spectrum
Frequency Modulation application circuit for the test
schematic. Note that the impedance of the short-circuit
cable affects the peak current.
Schottky or UltraFast recovery diodes D2 and D3 are
recommended to protect against a short circuit for the
buck mode circuit shown in Figure 9.
PWM Dimming Control for Brightness
There are two methods to control the LED current for dim-
ming using the LT3795. One method uses the CTRL pins to
adjust the current regulated in the LEDs. A second method
uses the PWM pin to modulate the LED current between
zero and full current to achieve a precisely programmed
average current, without the possibility of color shift that
occurs at low current in LEDs. To make PWM dimming
more accurate, the switch demand current is stored on
the VC node during the quiescent phase when PWM is
low. This feature minimizes recovery time when the PWM
signal goes high. To further improve the recovery time, a
disconnect switch should be used in the LED current path
to prevent the output capacitor from discharging during
the PWM signal low phase. The minimum PWM on or off
time depends on the choice of operating frequency set
by the RT input. For best current accuracy, the minimum
PWM high time should be at least three switching cycles
(3μs for fSW = 1MHz).
A low duty cycle PWM signal can cause excessive start-up
times if it were allowed to interrupt the soft-start sequence.
Therefore, once start-up is initiated by PWM > 1V, the
LT3795 will ignore a logical disable by the external PWM
input signal. The device will continue to soft-start with
switching and TG enabled until either the voltage at SS
reaches the 1.0V level, or the output current reaches one-
fourth of the full-scale current. At this point the device will
IM2
5A/DIV
SHORTLED
5V/DIV
3795 F08
500ns/DIV
LED+
50V/DIV
LT3795
17
3795fc
For more information www.linear.com/LT3795
APPLICATIONS INFORMATION
begin following the dimming control as designated by PWM.
If at any time an output overcurrent is detected, GATE and
TG will be disabled even as SS continues to charge.
Programming the Switching Frequency
The RT frequency adjust pin allows the user to program
the switching frequency from 100kHz to 1MHz to optimize
efficiency/performance or external component size. Higher
frequency operation yields smaller component size but
increases switching losses and gate driving current, and
may not allow sufficiently high or low duty cycle operation.
Lower frequency operation gives better performance at the
cost of larger external component size. For an appropriate
RT resistor value see Table 2. An external resistor from the
RT pin to GND is required—do not leave this pin open.
Table 2. Typical Switching Frequency vs RT Value (1% Resistor)
fOSC(kHz) RT(kΩ)
1000 6.65
900 7.50
800 8.87
700 10.2
600 12.4
500 15.4
400 19.6
300 26.1
200 39.2
100 82.5
Spread Spectrum Frequency Modulation
Switching regulators can be particularly troublesome for
applications where electromagnetic interference (EMI) is
a concern. To improve the EMI performance, the LT3795
includes a spread spectrum frequency feature. If there
is a capacitor (CRAMP)at the RAMP pin, a triangle wave
sweeping between 1V and 2V is generated. This signal is
then fed into the internal oscillator to modulate the switch-
ing frequency between 70% of the base frequency and
the base frequency, which is set by the RT resistor. The
modulation frequency is set by 12µA/(2 1V CRAMP).
Figure 10 shows the noise spectrum comparison between
a conventional boost switching converter (with the LT3795
RAMP pin tied to GND) and a spread spectrum modulation
enabled boost switching converter with 6.8nF at the RAMP
pin (refer to the Boost LED Driver with Input Current Limit
and Spread Spectrum Frequency Modulation application
circuit). The results of EMI measurements are sensitive
to the RAMP frequency selected with the capacitor. 1kHz
is a good starting point to optimize peak measurements,
but some fine tuning of this selection may be necessary
to get the best overall EMI results in a particular system.
Consult factory applications for more detailed information
about EMI reduction.
(10b) Conducted Peak EMI Comparison
Figure 10.
(10a) Conducted Average EMI Comparison
FREQUENCY (kHz)
500
60
50
30
20
10
90
3796 F10a
1300900 1700 2100 2500
40
0
70
80
PEAK AMPLITUDE (dBµV)
SPREAD SPECTRUM ENABLED
SPREAD SPECTRUM DISABLED
FREQUENCY (kHz)
500
60
50
30
20
10
90
3796 F10b
1300900 1700 2100 2500
40
0
70
80
PEAK AMPLITUDE (dBµV)
SPREAD SPECTRUM ENABLED
SPREAD SPECTRUM DISABLED
Duty Cycle Considerations
Switching duty cycle is a key variable defining converter
operation, therefore, its limits must be considered when
programming the switching frequency for a particular
application. The fixed minimum on-time and minimum
LT3795
18
3795fc
For more information www.linear.com/LT3795
Figure 12. Setting Input Current Limit
off-time (see Figure 11) and the switching frequency de-
fine the minimum and maximum duty cycle of the switch,
respectively. The following equations express the mini-
mum/ maximum duty cycle:
Minimum Duty Cycle = minimum on-timeswitching
frequency
Maximum Duty Cycle = 1 – minimum off-timeswitching
frequency
Filter capacitor CFILT shown in Figure 12 filters the voltage
at the IVINCOMP pin to minimize ripple due to the input
current. CFILT also compensates the input current regula-
tion loop, and is selected based on the loop response
in addition to the intended voltage ripple on IVINCOMP.
The IVINCOMP pin resistance to ground and CFILT form a
second pole in the input current regulation loop in addition
to the dominant pole at VC pin. Suggested values for CFILT
of 10nF - 0.1µF will usually provide a second pole in the
input current regulation loop that results in stable loop
response and is equivalent to the second pole in the ISP/ISN
regulation loop, which consists of the output capacitance
COUT and the dynamic resistance of the LED load. For buck
mode applications, filter components, RIN(OPT) and COPT,
can be placed close to LT3795 to suppress substantial
transient signal or noise at the IVINN and IVINP pins. For
boost and buck-boost mode applications, RIN(OPT) and
COPT are not required.
Thermal Considerations
The LT3795 is rated to a maximum input voltage of 110V.
Careful attention must be paid to the internal power dis-
sipation of the IC at higher input voltages to ensure that
a junction temperature of 150°C is not exceeded. This
junction limit is especially important when operating at
high ambient temperatures. The majority of the power dis-
sipation in the IC comes from the supply current needed to
APPLICATIONS INFORMATION
LT3795
3795 F12
RINSNS
RIN(OPT)
IVINN
CFILT
IVINP
TO LOAD
VIN
IIN
IVINCOMP
COPT
When calculating the operating limits, the typical values
for on/off-time in the data sheet should be increased by
at least 100ns to allow margin for PWM control latitude,
GATE rise/fall times and SW node rise/fall times.
Setting Input Current Limit
The LT3795 has a standalone input current sense amplifier
to limit the input current. The input current IIN shown in
Figure 12 is converted to a voltage output at the IVINCOMP
pin. When the IVINCOMP voltage exceeds 1.2V the GATE
is pulled low, and the converter stops switching. The input
current limit is calculated as follows:
IIN =
60mV
R
INSNS
Figure 11. Typical Minimum On- and Off-Time vs Temperature
TEMPERATURE (°C)
–50
200
150
50
350
3796 F11
0–25 25 50 75 125100 150
100
0
250
300
TIME (ns)
MINIMUM ON-TIME
MINIMUM OFF-TIME
LT3795
19
3795fc
For more information www.linear.com/LT3795
APPLICATIONS INFORMATION
drive the gate capacitance of the external power N-channel
MOSFET. This gate drive current can be calculated as:
IGATE = fSW • QG
A low QG power MOSFET should always be used when
operating at high input voltages, and the switching fre-
quency should also be chosen carefully to ensure that the
IC does not exceed a safe junction temperature. The internal
junction temperature, TJ of the IC can be estimated by:
TJ = TA + [VIN • (IQ + fSW • QG) •θJA]
where TA is the ambient temperature, IQ is the quiescent
current of the part (2.9mA typical) and θJA is the package
thermal impedance (30°C/W for the TSSOP package). For
example, an application with TA(MAX) = 85°C, VIN(MAX) =
60V, fSW = 400kHz, and having a N-channel MOSFET with
QG = 20nC, the maximum IC junction temperature will be
approximately:
TJ = 85°C + [60V • (2.9mA + 400kHz • 20nC) • 30°C/W]
≈ 104.6°C
The exposed pad on the bottom of the package must be
soldered to a ground plane. This ground should then be
connected to an internal copper ground plane with thermal
vias placed directly under the package to spread out the
heat dissipated by the IC.
It is best if the copper plane is extended on either the top
or bottom layer of the PCB to have the maximum exposure
to air. Internal ground layers do not dissipate thermals
as much as top and bottom layer copper does. See the
recommended layout as an example.
Input Capacitor Selection
The input capacitor supplies the transient input current for
the power inductor of the converter and must be placed
and sized according to the transient current requirements.
The switching frequency, output current and tolerable input
voltage ripple are key inputs to estimating the capacitor
value. An X7R type ceramic capacitor is usually the best
choice since it has the least variation with temperature
and DC bias. Typically, boost and SEPIC converters re-
quire a lower value capacitor than a buck mode converter.
Assuming that a 100mV input voltage ripple is acceptable,
the required capacitor value for a boost converter can be
estimated as follows (TSW = 1/fOSC):
CIN(µF)=ILED(A)
V
LED
V
IN
TSW(µs)
1µF
A µs2.8
Therefore, a 2.2µF capacitor is an appropriate selection
for a 400kHz boost regulator with 12V input, 48V output
and 500mA load.
With the same VIN voltage ripple of less than 100mV,
the input capacitor for a buck mode converter can be
estimated as follows:
CIN(µF)=ILED(A)•
V
LED
(V
IN
V
LED
)
V
IN
2TSW(µs)
10µF
A µs
A 10µF input capacitor is an appropriate selection for a
400kHz buck mode converter with 24V input, 12V output
and 1A load.
In the buck mode configuration, the input capacitor has
large pulsed currents due to the current returned through
the Schottky diode when the switch is off. It is important to
place the capacitor as close as possible to the Schottky diode
and to the GND return of the switch (i.e., the sense resistor).
It is also important to consider the ripple current rating of
the capacitor. For best reliability, this capacitor should have
low ESR and ESL and have an adequate ripple current rat-
ing. The RMS input current for a buck mode LED driver is:
IIN(RMS) = ILED • √(1–D)D
D=
V
LED
V
IN
where D is the switch duty cycle.
Table 3. Recommended Ceramic Capacitor Manufacturers
MANUFACTURER WEB
TDK www.tdk.com
Kemet www.kemet.com
Murata www.murata.com
Taiyo Yuden www.t-yuden.com
AVX www.avx.com
LT3795
20
3795fc
For more information www.linear.com/LT3795
Output Capacitor Selection
The selection of the output capacitor depends on the load and
converter configuration, i.e., step-up or step-down and the
operating frequency. For LED applications, the equivalent
resistance of the LED is typically low and the output filter
capacitor should be sized to attenuate the current ripple.
Use of an X7R type ceramic capacitor is recommended.
To achieve the same LED ripple current, the required filter
capacitor is larger in the boost and buck-boost mode ap-
plications than that in the buck mode applications. Lower
operating frequencies will require proportionately higher
capacitor values. The component values shown in the data
sheet applications are appropriate to drive the specified
LED string. The product of the output capacitor and LED
string impedance decides the second dominant pole in the
LED current regulation loop. It is prudent to validate the
power supply with the actual load (or loads).
Power MOSFET Selection
For applications operating at high input or output voltages,
the power N-channel MOSFET switch is typically chosen
for drain voltage VDS rating and low gate charge QG.
Consideration of switch on-resistance, RDS(ON), is usually
secondary because switching losses dominate power loss.
The INTVCC regulator on the LT3795 has a fixed current
limit to protect the IC from excessive power dissipation
at high VIN, so the MOSFET should be chosen so that
the product of QG at 7.7V and switching frequency does
not exceed the INTVCC current limit. For driving LEDs, be
careful to choose a switch with a VDS rating that exceeds
the threshold set by the FB pin in case of an open load
fault. Several MOSFET vendors are listed in Table 4. The
MOSFETs used in the application circuits in this data sheet
have been found to work well with the LT3795. Consult
factory applications for other recommended MOSFETs.
Table 4. MOSFET Manufacturers
VENDOR WEB
Vishay Siliconix www.vishay.com
Fairchild www.fairchildsemi.com
International Rectifier www.irf.com
Infineon www.infineon.com
High Side PMOS Disconnect Switch Selection
A high side PMOS disconnect switch with a minimum VTH
of –1V to –2V is recommended in most LT3795 applica-
tions to optimize or maximize the PWM dimming ratio and
protect the LED string from excessive heating during fault
conditions as well. The PMOS disconnect switch is typi-
cally selected for drain-source voltage VDS, and continuous
drain current ID. For proper operations, VDS rating must
exceed the open LED regulation voltage set by the FB pin,
and ID rating should be above ILED.
Schottky Rectifier Selection
The power Schottky diode conducts current during the
interval when the switch is turned off. Select a diode rated
for the maximum SW voltage. It is important to choose a
Schottky diode with sufficiently low leakage current when
using the PWM feature for dimming, because leakage
increases with temperature and occurs from the output
during the PWM low interval. Table 5 has some recom-
mended component vendors.
Table 5. Schottky Rectifier Manufacturers
VENDOR WEB
On Semiconductor www.onsemi.com
Diodes, Inc www.diodes.com
Central Semiconductor www.centralsemi.com
Rohm Semiconductor www.rohm.com
Sense Resistor Selection
The resistor, RSENSE, between the source of the external
N-channel MOSFET and GND should be selected to provide
adequate switch current to drive the application without
exceeding the 113mV (typical) current limit threshold on
the SENSE pin of the LT3795. For buck mode applications,
select a resistor that gives a switch current at least 30%
greater than the required LED current. For buck mode,
select a resistor according to:
RSENSE(BUCK)
0.07V
I
LED
APPLICATIONS INFORMATION
LT3795
21
3795fc
For more information www.linear.com/LT3795
APPLICATIONS INFORMATION
For buck-boost mode, select a resistor according to:
RSENSE(BUCK BOOST)
V
IN
0.07V
(V
IN
+V
LED
)I
LED
For boost, select a resistor according to:
RSENSE(BOOST)
V
IN
0.07V
V
LED
I
LED
The placement of RSENSE should be close to the source
of the N-channel MOSFET and GND of the LT3795. The
SENSE input to LT3795 should be a Kelvin connection to
the positive terminal of RSENSE.
70mV is used in the equations above to give some margin
below the 113mV (typical) sense current limit threshold.
Inductor Selection
The inductor used with the LT3795 should have a saturation
current rating appropriate to the maximum switch current
selected with the RSENSE resistor. Choose an inductor
value based on operating frequency and input and output
voltage to provide a current mode signal on SENSE of ap-
proximately 20mV magnitude. The following equations
are useful to estimate the inductor value (TSW = 1/fOSC):
LBUCK =
T
SW
R
SENSE
V
LED
(V
IN
V
LED
)
V
IN
0.02V
LBUCKBOOST =
T
SW
R
SENSE
V
LED
V
IN
(V
LED
+V
IN
)0.02V
LBOOST =
T
SW
R
SENSE
V
IN
(V
LED
V
IN
)
V
LED
0.02V
Table 6 provides some recommended inductor vendors.
Table 6. Inductor Manufacturers
VENDOR WEB
Sumida www.sumida.com
Würth Elektronik www.we-online.com
Coiltronics www.cooperet.com
Vishay www.vishay.com
Coilcraft www.coilcraft.com
Loop Compensation
The LT3795 uses an internal transconductance error
amplifier whose VC output compensates the control loop.
The external inductor, output capacitor and the compen-
sation resistor and capacitor determine the loop stability.
The inductor and output capacitor are chosen based on
performance, size and cost. The compensation resistor
and capacitor at VC are selected to optimize control loop
response and stability. For typical LED applications, a 10nF
compensation capacitor at VC is adequate, and a series
resistor should always be used to increase the slew rate
on the VC pin to maintain tighter regulation of LED current
during fast transients on the input supply to the converter.
Soft-Start Capacitor Selection
For many applications, it is important to minimize the
inrush current at start-up. The built-in soft-start circuit
significantly reduces the start-up current spike and output
voltage overshoot. The soft-start interval is set by the
soft-start capacitor selection according to the equation:
TSS =CSS
2V
28µA
A typical value for the soft-start capacitor is 0.1µF. The
soft-start pin reduces the oscillator frequency and the
maximum current in the switch. Soft-start also operates
as fault protection, which forces the converter into hiccup
or latchoff mode. Detailed information is provided in the
Fault Protection: Hiccup Mode and Latchoff Mode section.
LT3795
22
3795fc
For more information www.linear.com/LT3795
APPLICATIONS INFORMATION
Fault Protection: Hiccup Mode and Latchoff Mode
If an LED overcurrent condition, INTVCC undervoltage,
output short (FB ≤ 0.3V), or thermal limit happens, the
TG pin is pulled high to disconnect the LED array from the
power path, and the GATE pin is driven low. If the soft-start
pin is charging and still below 1.7V, then it will continue
to do so with a 28µA source. Once above 1.7V, the pull-
up source is disabled and a 2.8µA pull-down is activated.
While the SS pin is discharging, the GATE is forced low.
When the SS pin is discharged below 0.2V, a new cycle
is initiated. This is referred as hiccup mode operation. If
the fault still exists when SS crosses below 0.2V, then a
full SS charge/discharge cycle has to complete before
switching is enabled.
If a resistor is placed between the VREF pin and SS pin
to hold SS pin higher than 0.2V during a fault, then the
LT3795 will enter latchoff mode with GATE pin low, and
TG pin high. To exit latchoff mode, the EN/UVLO pin must
be toggled low to high.
Board Layout
The high speed operation of the LT3795 demands careful
attention to board layout and component placement. The
exposed pad of the package is the GND terminal of the IC
and is also important for thermal management of the IC. It
is crucial to achieve a good electrical and thermal contact
between the exposed pad and the ground plane of the
board. To reduce electromagnetic interference (EMI), it is
important to minimize the area of the high dV/dt switching
node between the inductor, switch drain and anode of the
Schottky rectifier. Use a ground plane under the switching
node to eliminate interplane coupling to sensitive signals.
The lengths of the high dI/dt traces: 1) from the switch
node through the switch and sense resistor to GND, and
2) from the switch node through the Schottky rectifier and
filter capacitor to GND should be minimized. The ground
points of these two switching current traces should come
to a common point then connect to the ground plane under
the LT3795. Likewise, the ground terminal of the bypass
capacitor for the INTVCC regulator should be placed near
the GND of the switching path. Typically, this requirement
results in the external switch being closest to the IC,
along with the INTVCC bypass capacitor. The ground for
the compensation network and other DC control signals
should be star connected to the underside of the IC. Do not
extensively route high impedance signals such as FB, RT
and VC, as they may pick up switching noise. Since there
is a small variable DC input bias current to the ISN and
ISP inputs, resistance in series with these pins should be
minimized to avoid creating an offset in the current sense
threshold. Likewise, minimize resistance in series with the
SENSE input to avoid changes (most likely reduction) to
the switch current limit threshold.
Figure 13 is a suggested two sided layout for a boost
converter. Note that the 4-layer layout is recommended
for best performance. Please contact the factory for the
reference layout design.
LT3795
23
3795fc
For more information www.linear.com/LT3795
Figure 13. Boost Converter Suggested Layout
COMPONENT DESIGNATIONS REFER TO PAGE 23 CIRCUIT
VIN VIAX
CIN CIN CIN
3795 F13
VIAS TO GROUND PLANE
ROUTING ON THE 2nd LAYER
LT3795
2
3
1
4
5
6
7
8
9
10
11
12
13
14
21
20
22
19
18
17
16
15
26
27
28
23
24
25
M2
LED+
VIA FROM ISP
VIA FROM VIN
INTVCC VIA
GATE VIA
VIA FROM ISN
VIA FROM INTVCC
PWM
VIA FROM TG
X
X
X
X X
29
X
X
X
X
X
X X ISP VIA
ISN VIA
TG VIA
M1
C4
C2
RINSNS
RSNS
R3
R1
R2
R7R8
R10
R5
R9
CC
C1
RT
C3
VIA FROM
ISP
VREF VIA
VIA FROM
VREF
COUT
COUT
COUT
COUT
C5
L1
D1
2
3
1
4
6
7
8
5
6
7
5
8
2
3
4
1
RLED
D2
R4
VIN
X
X
X
X
RC
APPLICATIONS INFORMATION
LT3795
24
3795fc
For more information www.linear.com/LT3795
TYPICAL APPLICATIONS
Short-Circuit Robust Boost LED Driver with Input Current Limit and Spread Spectrum Frequency Modulation
Short LED Protection without R6: Hiccup Mode Short LED Protection with R6: Latchoff Mode
IM2
1A/DIV
SHORTLED
10V/DIV
3796 TA02b
50ms/DIV
SS
2V/DIV
LED+
50V/DIV
IM2
5A/DIV
SHORTLED
10V/DIV
3796 TA02c
50ms/DIV
LED+
50V/DIV
SS
2V/DIV
IVINPVIN IVINN
RTVCIVINCOMPRAMP
87V LED
400mA
LT3795
3795 TA02a
CTRL2
OVLO
PWMPWM
M1: INFINEON BSC190N12NS3G
M2: VISHAY SILICONIX Si7115DN
L1: COOPER HC9-220
D1: DIODES INC PDS5100
D2: VISHAY ES1C
LED: CREE XLAMP XR-E
VREF
SS
CTRL1
ISMONLED CURRENT REPORTING
SHORTLED
OPENLED
SHORTLED
OPENLED
EN/UVLO
GND
FB
ISP
ISN
TG
INTVCC
INTVCC
INTVCC
GATE
SENSE
CC
6.8nF
L1
22µH
RINSNS
15mΩ
8V TO 60V
110V (TRANSIENT)
63V OVLO
D1
RT
31.6k
250kHz
RC
10k
C3
6.8nF
C5
4.7µF
C1
0.1µF
R7
100k R8
100k
R1
499k
4A MAXIMUM
R3
12.4k
R2
115k
CIN
2.2µF
×3
100V
VIN
COUT
2.2µF
×4
100V
R10
13.3k
RSNS
15mΩ
RLED
620mΩ
M2
M1
D2
R6(OPT)
402k
R4
12.4k
R5
NTC
10k
R9
1M
C4
10nF
C2
0.1µF
~1kHz TRIANGLE
SPREAD SPECTRUM
MODULATION
LT3795
25
3795fc
For more information www.linear.com/LT3795
TYPICAL APPLICATIONS
SEPIC LED Driver with Input Current Limit
Efficiency
VIN (V)
0
75
100
3796 TA03b
10 20 4030 50
80
70
85
95
90
EFFICIENCY (%)
IVINPVIN IVINN
RTVCIVINCOMPRAMP
25V
LED
LT3795
3795 TA03a
CTRL1
CTRL2
OVLO
PWM
ISMON
PWM
LED CURRENT
REPORTING
VREF
EN/UVLO
GND
FB
ISP
ISN
TG
INTVCC INTVCC
GATE
SENSE
CC
10nF
L1A
22µH
RINSNS
20mΩ
8V TO 60V
D1
C3
10nF
RT
19.6k
400kHz
RC
4.99k
C4
4.7µF
C6
6.8nF
C1
0.1µF
C2
0.1µF
R1
499k
R3
12.4k
R2
115k
CIN
2.2µF
×3
100V
VIN
COUT
10µF
×3
35V
R8
40.2k
C5
2.2µF
100V
×2
RSNS
15mΩ
RLED
250mΩ
M2
1A
3A MAXIMUM
M1
L1B
R4(OPT)
402k
R7
1M
SS
SHORTLED
OPENLED
SHORTLED
OPENLED
INTVCC
R5
100k R6
100k
R9
OPTION
FOR
DISABLING
SSFM
M1: INFINEON BSC160N10NS3G
M2: VISHAY SILICONIX Si7415DN
L1: COILTRONICS DRQ127-220
D1: DIODES INC PDS5100
LED: CREE XLAMP XR-E
LT3795
26
3795fc
For more information www.linear.com/LT3795
Buck Mode LED Driver
TYPICAL APPLICATIONS
VIN (V)
20
75
100
3796 TA04b
30 40 50 7060 80
80
70
85
95
90
EFFICIENCY (%)
Efficiency
IVINPVIN IVINN
RTVCRAMP SS
18V LED
2.5A
LT3795
3795 TA04a
CTRL1
CTRL2
OVLO
PWMPWM
LED CURRENT
REPORTING
M1: VISHAY SILICONIX Si7454DP
M2: VISHAY SILICONIX Si7113DN
D1: DIODES INC PDS3100
L1: COILTRONICS HC9-220
LED: CREE XLAMP XM-L
Q1: ZETEX FMMT593
VREF
IVINCOMP
ISMON
EN/UVLO
TG
FB
SENSE
GND
GATE
INTVCC
ISP
ISN
CC
4.7nF
RINSNS
50mΩ
CIN
0.47µF
100V
RLED
100mΩ
INTVCC
D1
RT
19.6k
400kHz
RC
10k
C4
4.7µF
C3
0.1µF
C7
6.8nF
C2
10nF
R1
499k
R3
8.06k
R2
21.5k
24V TO 80V
VIN
C6
2.2µF
×3
100V
R9
10k
L1
22µH
RSNS
15mΩ
M1
M2
R5
178k
C5
10µF
×2
25V
R8
100k
R7
1M
C1
0.1µF
SHORTLED
OPENLED
SHORTLED
OPENLED
INTVCC
R4
100k R5
100k
Q1
1.2A MAXIMUM
R10
OPTION
FOR
DISABLING
SSFM
LT3795
27
3795fc
For more information www.linear.com/LT3795
Buck Mode LED Driver with 3000:1 PWM Dimming
TYPICAL APPLICATIONS
3000:1 PWM Dimming at 100Hz and VIN = 24V
ILED
1A/DIV
3796 TA05b
1µs/DIV
IL
1A/DIV
PWM
2V/DIV
IVINPVIN IVINN
RT
VCRAMP SS
8V LED
1A
LT3795
3795 TA05a
CTRL1
CTRL2
OVLO
PWMPWM
LED CURRENT REPORTING
M1: VISHAY SILICONIX Si4840BDY
M2: VISHAY SILICONIX Si7415DN
D1: ZETEX ZLLS2000TA
L1: WÜRTH 744066100
LED: CREE XLAMP XR-E
Q1: ZETEX FMMT591
VREF
IVINCOMP
ISMON
EN/UVLO
TG
FB
SENSE
GND
GATE
INTVCC
ISP
ISN
CC
4.7nF
RINSNS
50mΩ
RLED
250mΩ
D1
RT
6.65k
1MHz
RC
10k
C4
4.7µF
C2
10nF
C1
0.1µF
R1
499k
R3
17.4k
R2
26.1k
16V TO 25V
VIN
C6
2.2µF
×3
50V
R9
10k
L1
10µH
RSNS
33mΩ
INTVCC
M1
M2
R6
100k
C5
10µF
×2
25V
R8
100k
R10
1M
C3
0.1µF
SHORTLED
OPENLED
SHORTLED
OPENLED
INTVCC
R4
100k R5
100k
CIN
0.47µF
1.2A MAXIMUM
LT3795
28
3795fc
For more information www.linear.com/LT3795
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LT3795#packaging for the most recent package drawings.
FE28 (EB) TSSOP REV K 0913
0.09 – 0.20
(.0035 – .0079)
0° – 8°
0.25
REF
0.50 – 0.75
(.020 – .030)
4.30 – 4.50*
(.169 – .177)
1 3 4 5678 9 10 11 12 13 14
192022 21 151618 17
9.60 – 9.80*
(.378 – .386)
4.75
(.187)
2.74
(.108)
28 27 26 2524 23
1.20
(.047)
MAX
0.05 – 0.15
(.002 – .006)
0.65
(.0256)
BSC 0.195 – 0.30
(.0077 – .0118)
TYP
2
RECOMMENDED SOLDER PAD LAYOUT
EXPOSED
PAD HEAT SINK
ON BOTTOM OF
PACKAGE
0.45 ±0.05
0.65 BSC
4.50 ±0.10
6.60 ±0.10
1.05 ±0.10
4.75
(.187)
2.74
(.108)
MILLIMETERS
(INCHES) *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
SEE NOTE 4
4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
6.40
(.252)
BSC
FE Package
28-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663 Rev K)
Exposed Pad Variation EB
LT3795
29
3795fc
For more information www.linear.com/LT3795
REVISION HISTORY
REV DATE DESCRIPTION PAGE NUMBER
A 03/14 Clarified Spread Spectrum Description and Figure 10
Clarified Schematic, Graphs
17
24, 25, 26, 30
B 05/14 Clarified Typical Application schematic.
Clarified the Electrical Characteristics section.
Clarified the Typical Application schematic.
1
2, 3, 4
30
C 06/16 Clarified Typical Application schematic
Clarified Electrical Characteristics
Clarified Typical Application schematic
1
2, 3, 4
30
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LT3795
30
3795fc
For more information www.linear.com/LT3795
RELATED PARTS
TYPICAL APPLICATION
Buck-Boost Mode LED Driver
Efficiency vs VIN
VIN (V)
100
3796 TA07b
0 10 20 30 40 50
80
75
70
85
90
95
EFFICIENCY (%)
PWM = VREF
IVINPVIN IVINNEN/UVLO
RTVCSS
36V LED
1A
LT3795
3795 TA07a
CTRL2
CTRL1
PWMPWM
LED CURRENT
REPORTING
VREF
ISMON
IVINCOMP
OVLO
GND
FB
ISP
ISN
TG
INTVCC
GATE
SENSE
RC
4.99k
RT
19.6k
400kHz
L1
22µH D1
LED-
LED
LED-
RINSNS
20mΩ
8V TO 50V
CC
10nF
C4
4.7µF
C2
22nF
C1
0.1µF
R1
499k
CIN
4.7µF
50V
R3
14.3k
R2
90.9k
VIN
C5
F
100V
R7
10k
RSNS
15mΩ
RLED
250mΩ
INTVCC
M2
M1 Q1
R6
357k
VIN
COUT
2.2µF
×4
50V
M1: VISHAY SILICONIX Si7454DP
M2: VISHAY SILICONIX Si7113DN
L1: COOPER HC9-220
D1: DIODES INC PDS5100
Q1: ZETEX FMMT593
LED: CREE XLAMP XR-E
C3
0.1µF
C6
6.8nF
SHORTLED
OPENLED
SHORTLED
OPENLED
INTVCC R4
100k R5
100k
3A MAXIMUM
RAMP
R8
OPTION
FOR
DISABLING
SSFM
PART NUMBER DESCRIPTION COMMENTS
LT3791 60V, Synchronous Buck-Boost 1MHz LED
Controller VIN: 4.7V to 60V, VOUT Range: 0V to 60V, True Color PWM, Analog = 100:1, ISD < 1µA,
TSSOP-38E Package
LT3796/LT3796-1 100V Constant Current and Constant
Voltage Controller with Dual Current Sense VIN: 6V to 100V, VOUT(MAX) = 100V, True Color PWM Dimming = 3000:1, ISD < 1µA,
28-Lead TSSOP Package
LT3755/LT3755-1/
LT3755-2 High Side 60V, 1MHz LED Controller with
True Color 3,000:1 PWM Dimming VIN: 4.5V to 40V, VOUT Range: 5V to 60V, True Color PWM, Analog = 3000:1, ISD < 1µA,
3mm × 3mm QFN-16, MSOP-16E Packages
LT3756/LT3756-1/
LT3756-2 High Side 100V, 1MHz LED Controller with
True Color 3,000:1 PWM Dimming VIN: 6V to 100V, VOUT Range: 5V to 100V, True Color PWM, Analog = 3000:1, ISD < 1µA,
3mm × 3mm QFN-16, MSOP-16E Packages
LT3743 Synchronous Step-Down 20A LED Driver
with Three-State LED Current Control VIN: 5.5V to 36V, VOUT Range: 5.5V to 35V, True Color PWM, Analog = 3000:1, ISD < 1µA,
4mm × 5mm QFN-28, TSSOP-28E Packages
LT3517 1.3A, 2.5MHz High Current LED Driver
with 3,000:1 Dimming VIN: 3V to 30V, True Color PWM, Analog = 3000:1, ISD < 1µA, 4mm × 4mm QFN-16
Package
LT3518 2.3A, 2.5MHz High Current LED Driver
with 3,000:1 Dimming VIN: 3V to 30V, True Color PWM, Analog = 3000:1, ISD < 1µA, 4mm × 4mm QFN-16
Package
LT3474/LT3474-1 36V, 1A (ILED), 2MHz, Step-Down LED
Driver VIN: 4V to 36V, VOUT Range = 13.5V, True Color PWM = 400:1, ISD < 1µA, TSSOP-16E
Package
LT3475/LT3475-1 Dual 1.5A(ILED), 36V, 2MHz, Step-Down
LED Driver VIN: 4V to 36V, VOUT Range = 13.5V, True Color PWM, Analog = 3000:1, ISD < 1µA,
TSSOP-20E Package
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507 www.linear.com/LT3795
LINEAR TECHNOLOGY CORPORATION 2013
LT 0616 REV C • PRINTED IN USA