REVISIONS LTR DESCRIPTION DATE (YR MO DAY) APPROVED A Add one vendor, CAGE 65786. Add device types 03 and 04. Add margin test, programming procedure, waveform, and flowchart for method B. Add case outline letter K. 88-10-25 M. A. Frye B Add "Changes in accordance with NOR 5962-R103-92." 91-12-24 M. A. Frye C Redraw with changes. Add device type 05 for vendor CAGE 65786. Changes to margin methods A and B. Add vendor CAGE 66759 as a source of supply for device types 01JX, 01LX, and 013X with vendor similar part number changes. Editorial changes throughout. 93-03-23 M. A. Frye D Made correction to paragraph 1.2.2 for case outline 3, under package style change rectangular to square. Updated drawing to the latest format. Redrew entire document. -sld 02-10-30 Raymond Monnin E Made correction to paragraph 1.2.1 and added additional vendor similar PIN numbers for device types 03 and 05 on the Standard Microcircuit Drawing Bulletin. -sld 02-12-16 Raymond Monnin F Boilerplate update and part of five year review. tcr 07-11-01 Robert M. Heber THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED REV SHEET REV SHEET REV STATUS OF SHEETS PMIC N/A STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY All DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A REV SHEET F F F F F F F F F F F 1 2 3 4 5 6 7 8 9 10 11 PREPARED BY Rick Officer DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http://www.dscc.dla.mil CHECKED BY Charles Reusing APPROVED BY Michael. A. Frye DRAWING APPROVAL DATE 88-01-04 REVISION LEVEL F MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 2K x 8 UV ERASABLE PROM, MONOLITHIC SILICON SIZE CAGE CODE A 67268 5962-87650 SHEET 1 OF DSCC FORM 2233 APR 97 11 5962-E035-08 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-87650 01 J A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type 01 02 03 04 05 Generic number WS57C191-50, CY7C291-50 WS57C191-55 7C291-35, CY7C291-35, WS57C291C-35 WS57C191B-45 7C291A-25, WS57C291C-25 Circuit function Access time 2K x 8 UV EPROM 2K x 8 UV EPROM 2K x 8 UV EPROM 2K x 8 UV EPROM 2K x 8 UV EPROM 50 ns 55 ns 35 ns 45 ns 25 ns 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter J K L 3 Descriptive designator Terminals GDIP1-T24 or CDIP2-T24 GDFP2-F24 or CDFP3-F24 GDIP3-T24 or CDIP4-T24 CQCC1-N28 24 24 24 28 Package style 1/ Dual-in-line Flat package Dual-in-line Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range (VCC) ............................................................ Storage temperature range ........................................................... Voltages on any pin with respect to ground ................................... VPP with respect to ground .............................................................. Power dissipation (PD) .................................................................... Lead temperature (soldering, 10 seconds) .................................... Thermal resistance, junction-to-case (JC) ..................................... Endurance ..................................................................................... Data retention ................................................................................ +4.5 V dc to +5.5 V dc -65C to +150C -0.6 V dc to +7.0 V dc -0.6 V dc to +14.0 V dc 550 mW 2/ +300C See MIL-STD-1835 50 cycles/byte, minimum 10 years, minimum 1.4 Recommended operating conditions. Case operating temperature range (TC) ........................................ -55C to +125C 1/ Lid shall be transparent to permit ultraviolet light erasure. 2/ Must withstand the added PD due to short circuit test (e.g., IOS). STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87650 A REVISION LEVEL F SHEET 2 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 MIL-STD-1835 - Test Method Standard Microcircuits. Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 MIL-HDBK-780 - List of Standard Microcircuit Drawings. Standard Microcircuit Drawings. (Copies of these documents are available online at http://assist.daps.dla.mil/quicksearch/ or http://assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for nonJAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MILPRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A "Q" or "QML" certification mark in accordance with MILPRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table(s). See 3.2.3.1 and 3.2.3.2. 3.2.3.1 Unprogrammed or erased devices. The truth table for unprogrammed devices shall be as specified on figure 2. 3.2.3.2 Programmed devices. The requirements for supplying programmed devices are not part of this drawing. 3.2.4 Block diagram. The block diagram shall be as specified on figure 3. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87650 A REVISION LEVEL F SHEET 3 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. 3.5.1 Certification/compliance mark. A compliance indicator "C" shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator "C" shall be replaced with a "Q" or "QML" certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Processing EPROMS. All testing requirements and quality assurance provisions herein shall be satisfied by the manufacturer prior to delivery. 3.6.1 Erasure of EPROMS. When specified, devices shall be erased in accordance with the procedures and characteristics specified in 4.4. 3.6.2 Programmability of EPROMS. When specified, devices shall be programmed to the specified pattern using the procedures and characteristics specified in 4.5. 3.6.3 Verification of erasure or programmability of EPROMS. When specified, devices shall be verified as either programmed to the specified pattern or erased. As a minimum, verification shall consist of performing a functional test (subgroups 7 and 8) to verify that all bits are in proper state. Any bit that does not verify to be in the proper state shall constitute a device failure and shall be removed from the lot. 3.7 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturer's product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.8 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.9 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing 3.10 Verification and review. DSCC, DSCC's agent, and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.11 Data retention. A data retention stress test shall be completed as part of the vendor's reliability monitors. This test shall be done for initial characterization and after any design or process change which may affect data retention. The methods and procedures may be vendor specific, but shall guarantee the number of years listed in section 1.3 herein over the full military temperature range. The vendor's procedure shall be kept under document control and shall be made available upon request of the acquiring or preparing activity, along with test data. 3.12 Endurance. A reprogrammability test shall be completed as part of the vendor's reliability monitors. This test shall be done for initial characterization and after any design or process change which may affect the reprogrammability of the device. The methods and procedures may be vendor specific, but shall guarantee the number of program/erase endurance cycles listed in section 1.3 herein over the full military temperature range. The vendor's procedure shall be kept under document control and shall be made available upon request of the acquiring or preparing activity, along with test data. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87650 A REVISION LEVEL F SHEET 4 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TC +125C 4.5 V dc VCC 5.5 V dc unless otherwise specified Group A subgroups Device types Unit Limits Min Max Input low voltage VIL VCC = 4.5 V and 5.5 V 1,2,3 All -0.5 2/ 0.8 V Input high voltage VIH VCC = 4.5 V and 5.5 V 1,2,3 All 2.0 VCC +0.5 2/ V Output low voltage 3/ VOL IOL = 16 mA, VCC = 4.5 V, VIL = 0.8 V, VIH = 2.0 V 1,2,3 All 0.45 V Output high voltage 3/ VOH IOH = -4 mA, VCC = 4.5 V, VIL = 0.8 V, VIH = 2.0 V 1,2,3 All Output short circuit current IOS VCC = 4.5 V and 5.5 V, VOUT = GND 1,2,3 All 200 mA Input load current 4/ ILI VIN = 5.5 V and GND 1,2,3 All 10 A Output leakage ILO VOUT = 5.5 V and GND 1,2,3 All 10 A Operating current, TTL inputs 5/ 6/ 7/ ICC TTL CS1 = VIL, VCC = 5.5 V, O0 to O7 = 0 mA, CS2 = CS3 = VIH, addresses cycling between 0 V and 3 V 1,2,3 All 120 mA Operating current , CMOS inputs 2/ 7/ 8/ ICC CMOS CS1 = VIL, VCC = 5.5 V, O0 to O7 = 0 mA, CS2 = CS3 = VIH 1,2,3 All 120 mA Input capacitance CIN VIN = 0, see 4.3.1c 4 All 10 pF Output capacitance COUT VOUT = 0, see 4.3.1c 4 All 12 pF Address to output delay tACC CS1 = VIL, CS2 = CS3 = VIH, See figures 4 and 5 9,10,11 01 50 ns 02 55 03 35 04 45 05 25 01,03, 04 25 02 30 05 20 01,02, 03,04 25 05 20 2/ All chip selects to output delay All chip selects high to output float 2/ Address to output hold 2/ tCS tDF tOH 9,10,11 Either CS1 , CS2 or CS3 9/ See figures 4 and 5 9,10,11 Either CS1 , CS2 or CS3 9/ See figures 4 and 5 9,10,11 CS1 = VIL, CS2 = CS3 = VIH, See figures 4 and 5 2.4 All V ns ns 0 ns See footnotes at top of next page. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87650 A REVISION LEVEL F SHEET 5 TABLE I. Electrical performance characteristics -Continued. 1/ All electrical performance characteristics are 100 percent tested unless otherwise specified. 2/ May not be tested, but shall be guaranteed to the limits specified in table I. 3/ These are absolute voltages with respect to device ground pin and include all over shoots due to system and/or tester noise. Do not attempt to test these values without suitable equipment. 4/ Output shall be loaded in accordance with figure 4. 5/ TTL inputs: VIL 0.8 V, VIH 2.0 V. 6/ The frequency equals 1/tACC (maximum). 7/ The addresses, (A0 - A10 pins), are toggling between VIL and VIH. 8/ CMOS inputs: VIL = GND 0.3 V, VIH = VCC 0.3 V. 9/ Worst case of output control signal lines CS1 , CS2, or CS3. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87650 A REVISION LEVEL F SHEET 6 Device types Case outlines Terminal number All J, K, L 3 Terminal symbol 1 A7 NC 2 A6 A7 3 A5 A6 4 A4 A5 5 A3 A4 6 A2 A3 7 A1 A2 8 A0 A1 9 O0 A0 10 O1 NC 11 O2 O0 12 GND O1 13 O3 O2 14 O4 GND 15 O5 NC 16 O6 O3 17 O7 O4 18 CS3 O5 19 CS2 O6 20 CS1 /VPP O7 21 A10 NC 22 A9 CS3 23 A8 CS2 24 VCC CS1 /VPP 25 --- A10 26 --- A9 27 --- A8 28 --- VCC FIGURE 1. Terminal connections. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87650 A REVISION LEVEL F SHEET 7 Mode CS1 /VPP CS2 CS3 I/O pins Program VPP X X Data in Read VIL VIH VIH Data out Deselect VIH X X High-Z Deselect X VIL X High-Z Deselect X X VIL High-Z NOTE: X means the input is a "don't care". FIGURE 2. Truth table for unprogrammed devices. FIGURE 3. Block diagram. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87650 A REVISION LEVEL F SHEET 8 High impedance test systems only * tDF is tested with CL = 5 pF. FIGURE 4. Output load (suggested). FIGURE 5. AC read timing diagram. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87650 A REVISION LEVEL F SHEET 9 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition C or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA = +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. c. A data retention stress test shall be included as part of the screening procedure. Margin methods shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 5 and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroup 4 (CIN and COUT measurements) shall be measured only for the initial test and after process or design changes which may affect input capacitance. A minimum sample of five (5) devices with zero failures shall be required. d. All devices selected for testing shall be programmed with a checkerboard pattern or equivalent. After completion of all testing, the devices shall be erased and verified (except devices submitted for groups C and D testing). 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as specified in table II herein. b. Steady-state life test conditions, method 1005 of MIL-STD-883. (1) Test condition C or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. (2) TA = +125C, minimum. (3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. 4.4 Erasing procedure. The device is erased by exposure to high intensity shortwave ultraviolet light at a wavelength of 253.7 nm. The recommended integrated dose (i.e., UV intensity X exposure time) is 15 W-s/cm2. An example of an ultraviolet source which can erase the device in 30 minutes is the model S52 shortwave ultraviolet lamp. The lamp should be used without short wave filters and the EPROM should be placed about one inch from the lamp tubes. After erasure, all bits are in the high state. 4.5 Programming procedures. The programming procedures shall be as specified by the device manufacturer and shall be made available upon request. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87650 A REVISION LEVEL F SHEET 10 TABLE II. Electrical test requirements. 1/ 2/ 3/ 4/ 5/ MIL-STD-883 test requirements Subgroups (in accordance with MIL-STD-883, method 5005, table I) Interim electrical parameters (method 5004) --- Final electrical test parameters (method 5004) Group A test requirements (method 5005) 1*, 2, 3, 7*, 8A, 8B, 9 1, 2, 3, 4**, 7, 8A, 8B, 9, 10, 11 Groups C and D end-point electrical parameters (method 5005) 1/ 2/ 3/ 4/ 5/ 2, 3, 7, 8A, 8B * PDA applies to subgroup 1 and 7. ** See 4.3.1c. Any or all subgroup may be combined when using a high speed tester. Subgroup 7, 8A, and 8B shall consist of verifying the pattern specified. For all electrical tests, the device shall be programmed to the pattern specified. 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535, appendix A. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. 6.2 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor-prepared specification or drawing. 6.3 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal. 6.4 Record of users. Military and industrial users shall inform Defense Supply Center Columbus (DSCC) when a system application requires configuration control and the applicable SMD. DSCC will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronics devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0544. 6.5 Comments. Comments on this drawing should be directed to DSCC-VA, Columbus, Ohio 43218-3990, or telephone (614) 692-0547. 6.6 Approved sources of supply. Approved sources of supply are listed in MIL-HDBK-103. The vendors listed in MILHDBK-103 have agreed to this drawing and a certificate of compliance (see 3.7 herein) has been submitted to and accepted by DSCC-VA. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-87650 A REVISION LEVEL F SHEET 11 STANDARD MICROCIRCUIT DRAWING BULLETIN DATE: 07-11-01 Approved sources of supply for SMD 5962-87650 are listed below for immediate acquisition information only and shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by DSCC-VA. This information bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. DSCC maintains an online database of all current sources of supply at http://www.dscc.dla.mil/Programs/Smcr/. Standard microcircuit drawing PIN 1/ 5962-8765001JA 5962-8765001KA 5962-8765001LA 5962-87650013A 5962-87650013C 5962-8765002JA 5962-8765002KA 5962-8765002LA 5962-87650023A 5962-87650023C 5962-8765003KA Vendor CAGE number 0C7V7 0C7V7 0C7V7 0C7V7 3/ 0C7V7 0C7V7 0C7V7 0C7V7 0C7V7 0C7V7 0C7V7 Vendor similar PIN 2/ WS57C191C-50DMB QP7C292A-50WMB WS57C291C-50FMB QP7C291A-50TMB CY7C291-50WMB WS57C291C-50TMB QP7C291A-50WMB 7C291A-50/LA WS57C291C-50CMB QP7C291A-50QMB WS57C291C-50CMB 0C7V7 QP7C292A-55WMB WS57C291C-55FMB QP7C291A-55TMB WS57C291C-55TMB QP7C291A-55WMB WS57C291C-55CMB QP7C291A-55QMB WS57C291C-55CMB WS57C191C-55DMB 0C7V7 0C7V7 0C7V7 0C7V7 0C7V7 0C7V7 0C7V7 0C7V7 WS57C291C-35FMB 0C7V7 7C291-35/KA 0C7V7 5962-87650033C 0C7V7 0C7V7 0C7V7 65786 0C7V7 0C7V7 0C7V7 0C7V7 QP7C291A-35TMB WS57C291C-35TMB 7C291A-35/LA QP7C291A-35WMB CY7C291-35WMB WS57C291C-35CMB 7C291-35/3A QP7C291A-35QMB WS57C291C-35CMB 5962-8765003JA 5962-8765004JA 0C7V7 0C7V7 WS57C191C-45DMB 5962-8765003LA 5962-87650033A QP7C292A-35WMB 0C7V7 5962-8765004KA QP7C292A-45WMB WS57C291C-45FMB QP7C291A-45TMB 0C7V7 0C7V7 See footnotes at end of table. Page 1 of 2 STANDARD MICROCIRCUIT DRAWING BULLETIN - CONTINUED. DATE: 07-11-01 Standard microcircuit drawing PIN 1/ 5962-8765004LA 5962-87650043A 5962-87650043C 5962-8765005KA 5962-8765005LA 5962-87650053A 5962-87650053C 5962-8765005JA Vendor CAGE number 0C7V7 0C7V7 0C7V7 0C7V7 0C7V7 0C7V7 0C7V7 0C7V7 Vendor similar PIN 2/ WS57C291C-45TMB QP7C291A-45WMB WS57C291C-45CMB 7C291A-45/3A QP7C291A-45QMB WS57C291C-45CMB WS57C291C-25FMB 0C7V7 0C7V7 0C7V7 0C7V7 0C7V7 0C7V7 0C7V7 0C7V7 0C7V7 QP7C291A-25TMB WS57C291C-25TMB 7C291A-25/LA QP7C291A-25WMB WS57C291C-25CMB 7C291A-25/3A QP7C291A-25QMB WS57C291C-25CMB QP7C292A-25WMB 7C291A-25/KA 1/ The lead finish shown for each PIN representing a hermetic package is the most readily available from the manufacturer listed for that part. If the desired lead finish is not listed contact the vendor to determine its availability. 2/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. 3/ Not available from an approved source. Vendor CAGE number Vendor name and address 0C7V7 QP Semiconductor 2945 Oakmead Village Court Santa Clara, CA 95051 65786 Cypress Semiconductor Corporation 3901 North First Street San Jose, CA 95134 2 of 2 The information contained herein is disseminated for convenience only and the Government assumes no liability whatsoever for any inaccuracies in the information bulletin.