FA7700V, FA7701V
1
■ Block diagram
FA7700V FA7701V
FA7700V, FA7701V
■ Dimensions, mm
TSSOP-8
±0.2
4.4±0.3
6.4
10 to 0˚
±0.3
3.1
±0.1
0.15
±0.05
0.1
1.30 max
±0.1
0.22
±0.2
0.5
0.65
0.575 typ
■ Description
FA7700V/FA7701V are the PWM type DC to DC converter
control ICs with 1ch output that can directly driv e po wer
MOSFETs. CMOS devices with high breakdown voltage are
used in these ICs and low po w er consumption is achie ved.
These ICs have not only the functions equivalent to those of
FA76XX series but also the functions of directly driving Nch/Pch
MOSFETs, lo wer power consumption, higher frequency
operation, and less e xternal components.
■ Features
• Wide range of supply v oltage: VCC=2.5 to 20V
• FA7700V: For boost, flyback converter
(Maximum output duty cycle is 80%)
• FA7701V: For buck con v erter
(Maximum output duty cycle is 100%)
• Output stage consist of CMOS push-pull circuit, and achieves
a high speed switching of external MOSFETs. (FA7700V: For
Nch-MOSFET driving, FA7701V: For Pch-MOSFET driving)
• High accuracy reference voltage (Error amplifier): 0.88V±2%
• Soft start function
• Adjustab le b uilt-in timer latch for short-circuit protection
• Output ON/OFF control function
• Less e xternal discrete components needed (2 components
less than con v entional version of the equivalent products)
• Low power consumption
Stand-by current: 40µA typ.
Operating current: 1.2mA typ . (Including error amplifier output
current and oscillator current)
• High frequency operation: 50kHz to 1MHz
• P ackage: TSSOP-8, thin and small
Pin No. Pi n symbol Description
1 RT Oscillator timing resistor
2 REF Inter nal bias voltage
3 IN (–) Error amplifier inverting input
4 FB Error amplifier output
5 GND Ground
6 OUT Output for driving switching device
7 VCC Power supply
8 CS ON/OFF, soft start, timer latched short
circuit protection
RT
REF
VREF
OSC
BIAS
UVLO
5.5V
–
+
OFF
4
FB
IN–
+
–
+
PWM
–
+
ON/OFF
S.C.DET
0.3V
1.5V
1.5V
–
+
S.C.P
2.2V
VREF
Power Good Signal
ON/OFF
1
2
3
8
7
6
5
CS
VCC
OUT
GND
–
+
0.88V
ER.AMP
+
2.2V
+
–
+
PWM
–
+
ER.AMP
ON/OFF
VREF
OSC
BIAS
UVLO
5.5V
–
+
–
+
ON/OFF
S.C.DET
0.3V
1.5V
1.5V
–
+
S.C.P
2.2V
OFF
RT
REF
4
FB
IN–
1
2
3
8
7
6
5
CS
VCC
OUT
GND
0.88V
Power Good Signal
VREF
2.2V
CMOS IC
For Switching Power Supply Control
FA7700V, FA7701V
2
■ Absolute maximum ratings
Maximum power dissipation curve
Item Symbol Rating Unit
Power supply voltage Vcc 20 V
REF terminal output current IREF 2mA
OUT terminal source current ISO peak –400 (peak) mA
ISO cont –50 (continuos)
OUT terminal sink current ISI peak +150 (peak) mA
ISI cont +50 (continuos)
RT, REF, IN–, FB terminal voltage VRT, VREF +2.5 (max.) V
VIN–, VFB –0.3 (min.)
CS terminal voltage VCS Self limitingⱌ5.5 (max.) V
–0.3 (min.)
CS terminal sink current ICS 200 µA
Power dissipation Pd 250 (Ta⬉25˚C) mW
Operating ambient temperature Ta –30 to +85 ˚C
Operating junction temperature Tj +125 ˚C
Storage temperature Tstg –40 to +150 ˚C
–30 30 90600125 150
0
Ambient temperature [˚C]
Max. power
dissipation [mW]
50
100
150
200
250
300
■ Recommended operating condition
Item Symbol Min. Typ. Max. Unit
Supply voltage VCC 2.5 6 18 V
DC feedback resistor of error amplifier RNF 100 kΩ
VCC terminal capacitance CVCC 0.1 µF
REF terminal capacitance CREF 0.047 0.1 1 µF
CS terminal capacitance CS0.01 10 µF
CS terminal sink current Icsin 1* 50 µA
Oscillation frequency fosc 50 1000 kHz
* Lower limit of ICSIN does not include leak current “IL” for capacitor Cs . Set a
resistor “RCS [MΩ]” connected between VCC terminal and CS terminal to
satisfy the equation.
VCC – 1.5 ⬍ RCS [MΩ] ⬍VCC – 1.5
50µA + IL1µA + IL
FA7700V, FA7701V
3
Pulse width modulation (PWM) section (FB terminal voltage and duty cycle)
Item Symbol Test condition Min. Typ. Max. Unit
FB 0% threshold VFB0 Duty cycle = 0% 0.560 0.660 0.760 V
FB 50% threshold VFB50 Duty cycle = 50% 0.880 V
Maximum duty cycle FA7700 DMAX1 RT=100kΩ, f=50kHz 85 90 95 %
DMAX2 RT=22kΩ, fⱌ185kHz 83 88 93 %
DMAX3 RT=3kΩ, fⱌ1MHz 80 86 92 %
FA7701 DMAX 100 %
Error amplifier section (IN- terminal, FB terminal)
Item Symbol Test condition Min. Typ. Max. Unit
Reference voltage VBIN- terminal, FB terminal: 0.863 0.880 0.897 V
Shorted (voltage follower)
Input current IIN–-500 +500 nA
VB line regulation VBLINE Vcc=2.5 to 20V ±1±5mV
VB variation with temperature VBTC1 Ta=–30 to 25°C±0.3 %
VBTC2 Ta=25 to 85°C±0.3 %
Open loop gain AVO 70 dB
Unity gain bandwidth fT1.5 MHz
Output current Source IOHE FB terminal=VREF– 0.5V –220 –160 –100 µA
Sink IOLE FB terminal=0.5V 3 6 12 mA
Oscillator section (Frequency set by RT terminal)
Item Symbol Test condition Min. Typ. Max. Unit
Oscillation frequency fosc RT=22kΩ155 185 215 kHz
Line regulation fLINE Vcc=2.5 to 20V ±0.1 %
Variation with temperature fTC1 Ta=–30 to 25°C, 50k to 1MHz ±2%
fTC2 Ta=25 to 85°C, 50k to 1MHz ±3%
■ Electrical characteristics (Ta=25˚C, VCC=6V, RT=22kΩ)
Internal bias section (REF terminal voltage)
Item Symbol Test condition Min. Typ. Max. Unit
Output voltage VREF REF terminal source current 2.16 2.23 2.30 V
IREF=0mA
Line regulation VLINE Vcc=2.5 to 20V, IREF=0mA ±2±14 mV
Load regulation VLOAD IREF=0 to 2mA ±2±12 mV
Variation with temperature VTC1 Ta=–30 to 25°C±0.3 %
VTC2 Ta=25 to 85°C±0.3 %
Undervoltage lock-out section (VCC terminal voltage)
Item Symbol Test condition Min. Typ. Max. Unit
ON threshold VCCON 2.07 2.30 V
OFF threshold VCCOF 1.60 1.93 V
Hysteresis voltage VCCHY 0.04 0.14 0.24 V
Variation with temperature VCCHY Ta= –30 to 25°C +0.2 mV/°C
Ta= 25 to 85°C–0.2 mV/°C
FA7700V, FA7701V
4
Soft start section (CS terminal voltage)
Item Symbol Test condition Min. Typ. Max. Unit
Threshold voltage 1 VCS0 Duty cycle=0% 0.560 0.660 0.760 V
Threshold voltage 2 VCS50 Duty cycle=50% 0.880 V
ON/OFF section (CS terminal voltage)
Item Symbol Test condition Min. Typ. Max. Unit
ON/OFF threshold VONOF 0.150 0.300 0.450 V
Threshold variation with temperature VONTC Ta = –30 to 85°C +0.5 mV/°C
Timer latched short circuit protection section (FB terminal, CS terminal)
Item Symbol Test condition Min. Typ. Max. Unit
Short detection threshold voltage VFBTH FB terminal voltage 1.350 1.500 1.650 V
Latched mode threshold voltage VCSTH CS terminal voltage 2.050 2.200 2.350 V
Latched mode reset voltage VCSRE CS terminal voltage 1.700 2.030 2.300 V
Latched mode hysteresis VCSHY CS terminal voltage 50 170 350 mV
CS terminal clamped voltage VCSCL1 FB terminal<1.35V, CS sink current= +1µA 1.400 1.500 1.600 V
VCSCL2 FB terminal>1.65V, CS sink current= +150µA 4.500 5.500 6.500 V
Overall section (Supply current to VCC terminal)
Item Symbol Test condition Min. Typ. Max. Unit
OFF mode supply current ICCST1 CS terminal=0V 40 100 µA
Operating mode supply current ICC0 Duty cycle=0%, OUT:Open, IN–=0V, FB:Open 0.9 1.5 mA
ICC1 Duty cycle=50%, OUT:Open, IN–, FB:Shorted 1.2 2.0 mA
Latched mode supply current ICCLAT CS terminal >2.35V, IN–=0V, FB:Open 0.9 1.5 mA
Output stage section (OUT terminal)
Item Symbol Test condition Min. Typ. Max. Unit
High side on resistance RONH VCC=6V, source current= –50mA 10 20 Ω
RONH VCC=2.5V, source current= –50mA 18 36 Ω
Low side on resistance RONL VCC=6V, sink current= +50mA 5 10 Ω
RONL VCC=2.5V, sink current= +50mA 5 10 Ω
Rise time FA7700 tr 330pF load to GND terminal 20 ns
FA7701 330pF load to VCC terminal 25 ns
Fall time FA7700 tf 330pF load to GND terminal 45 ns
FA7701 330pF load to VCC terminal 40 ns
FA7700V, FA7701V
5
■ Characteristic curves
Oscillation frequency (fOSC) vs. Oscillation frequency (fOSC) vs. ambient temperature
timing resistor resistance (RT)
Duty cyc le vs. FB terminal v oltage Duty cycle vs. CS terminal voltage
FA7700 FA7700
Duty cyc le vs. FB terminal v oltage Duty cycle vs. CS terminal voltage
FA7701 FA7701
110
100
10
100
1000
10000
Timing resisitor R
T
[kΩ]
Oscillation frequency [kHz]
Ambient temperature Ta [˚C]
Oscillation frequency variation [%]
–40 –20 020 40 60 80 100
–5
–4
–3
–2
–1
0
1
2
3
4
5
fosc=1MHz
fosc=50kHz fosc=185kHz
FB terminal voltage [V]
Duty cycle [%]
0.5 0.7 0.9 1.1 1.3
100
90
80
70
60
50
40
30
20
10
0
fosc=1MHz
fosc=185kHz
CS terminal voltage [V]
Duty cycle [%]
0.5 0.7 0.9 1.1 1.3
100
90
80
70
60
50
40
30
20
10
0
fosc=1MHz
fosc=185kHz
Duty cycle [%]
0.5 0.7 0.9 1.1 1.3
100
90
80
70
60
50
40
30
20
10
0
FB terminal voltage [V]
fosc=1MHz
fosc=185kHz
Duty cycle [%]
0.5 0.7 0.9 1.1 1.3
100
90
80
70
60
50
40
30
20
10
0
CS terminal voltage [V]
fosc=1MHz
fosc=185kHz
FA7700V, FA7701V
6
Maximum duty cycle vs. ambient temperature Err or amp. reference v oltage vs. ambient temperature
FA7700
Internal bias v olta ge vs. ambient temperature Undervoltage lock-out vs. ambient temperarure
CS terminal ON/OFF threshold vs. CS terminal voltage vs. CS terminal sink current
ambient temperature
–40 –20 020 40 60 80 100
94
92
90
88
86
84
82
80
Ambient temperature Ta [˚C]
Max. duty cycle [%]
fosc=1MHz
fosc=50kHz
fosc=185kHz
0.86
–40 –20 020 40 60 80 100
Ambient temperature Ta [˚C]
Reference voltage [V]
0.87
0.88
0.89
0.90
2.18 –20
–40 020 40 60 80 100
Ambient temperature Ta [˚C]
Internal bias voltage [V]
2.20
2.22
2.24
2.26
2.28
Vcc ON
Vcc OFF
1.80 –20
–40 020 40 60 80 100
Ambient temperature Ta [˚C]
Vcc terminal ON/OFF threshold
1.85
1.90
1.95
2.00
2.20
2.15
2.10
2.05
0.15 –20
–40 020 40 60 80 100
Ambient temperature Ta [˚C]
CS terminal ON/OFF threshold
0.20
0.25
0.30
0.35
0.40
20
01234567
CS terminal voltage [V]
40
60
80
100
120
0
140
160
180
200
CS terminal sink current [ A]
–30˚C
Ta=–30˚C
Ta=25˚C
Ta=25˚C
85˚C
Ta=85˚C
FB
>
1.65V
FB
<
1.35V
FA7700V, FA7701V
7
Operating mode supply current vs. VCC Operating mode supply current vs. VCC
OFF mode supply current vs. temperature Operating mode supply current vs. temperature
Latched mode supply current vs. temperature Oscillation frequency vs. operating mode supply current
0Vcc [V]
2
Operating mode supply current [mA]
fosc=185kHz
fosc=1MHz
Duty=50%
IN(–)–FB:shorted
0.5 11.5 22.5 3
1.5
1
0.5
0
fosc=185kHz
fosc=1MHz
Duty=50%
IN(–)–FB:shorted
4Vcc [V]
3
Operating mode supply current [mA]
6810 12 14 16
2.5
2
1.5
018 20
1
0.5
CS=0V
Vcc=20V
Vcc=6V
–40 Temperature Ta [˚C]
60
–20 020 40 60 80
55
50
45
40
35
30 100
OFF mode supply current [ A]
RT=22kΩ
Vcc=20V (Duty=50%)
Vcc=6V (Duty=50%)
Vcc=6V (Duty=0%)
1.2
Operating mode supply current [mA]
1.1
1
0.9
0.6
0.8
0.7
–40 Temperature Ta [˚C]
–20 020 40 60 80 100
1.3
1.4
1.5
Vcc=6V
RT=22kΩ
CS
>
2.35V
0.85
Operating mode supply current [mA]
0.8
0.75
0.7
–40 Temperature Ta [˚C]
–20 020 40 60 80 100
0.9
0.95
1
Vcc=6V
Duty=50%
1.5
Operating mode supply current [mA]
1
0.5
0
Oscillation frequency [kHz]
10 100 1000
2
2.5
3
FA7700V, FA7701V
8
OUT terminal source current vs. OUT terminal voltage OUT terminal sink current vs. OUT terminal volta ge
Err or amplifier gain and phase vs. frequency
0OUT terminal voltage [V]
300
510 15 20 25
250
200
150
100
50
0
OUT terminal source current [mA]
350
400
450
Vcc=12V
Vcc=20V
Vcc=6V
Vcc=2.5V
0OUT terminal voltage [V]
0.5 11.5
OUT terminal source current [mA]
100
50
0
150
200
1MΩ
390Ω+
–
+
0
Frequency [Hz]
1k 10k 100k 1M 10M
80 180
60
40
20
0
–20
Gain [dB]
Gain
Phase
Phase [deg]
3636363636
160
140
120
100
80
60
40
20
0
FA7700V, FA7701V
9
■ Description of each circuit
1. Reference voltage circuit
This circuit consists of the ref erence voltage circuit using band
gap ref erence , and also serves as the po w er supply of the
internal circuit. The precision of output is 2.23V±3%.
It is stabilized under the supply voltage of 2.5V or over.
The precision of ref erence voltage of error amplifier circuit is
0.88V±2%, and the reference voltage circuit is connected to the
non-inverting input of the error amplifier circuit.
2. Oscillator
The oscillator generates a triangular wa veform by charging and
discharging the built-in capacitor. A desired oscillation
frequency can be determined by the v alue of the resistor “RT”
connected to the R T terminal (Fig. 1).
The built-in capacitor voltage oscillates between appro ximately
0.66V and 1.1V with almost the same charging and discharging
gradients . You can set the desired oscillation frequency by
changing the gradients using the resistor connected to the RT
terminal. (Large R T: Low frequency, small RT: High frequency)
The oscillator wavef orm cannot be observed from the outside
because a terminal for this purpose is not provided. The
oscillator output is connected to the PWM compar ator.
3. Error amplifier circuit
The IN(–) terminal (Pin 3) is an inv erting input terminal.
The non-inverting input is internally connected to the reference
voltage (0.88V ±2%; 25˚C). The FB terminal (Pin 4) is the
output of the error amplifier. Gain setting and phase
compensation setting is done by connecting a capacitance and
a resistor between the FB terminal and the IN(–) terminal. Vout
which is the output v oltage of DC to DC converter can be
calculated by:
Gain AV between the Vout and the FB terminal can be
calculated by:
Vout = VB ⫻ R1 + R2
R2
AV = – RNF
R1
Fig. 1
Fig. 2
OSC
R
T
0.66V
1.1V RT value: small RT value: large
–
+
+
+PMW output
Oscillation output
CS terminal voltage
Error amplifier output
DT voltage
VB
R
NF
Vout
R2
R1
IN(–)
PWM
FB
Er. AMP
34
(0.88V)
Fig. 3
Fig. 4
Fig. 5
PWM
output pulse
Oscillation output
Error amplifier output CS terminal voltage
DT voltage
4. PWM comparator
The PWM comparator has 4 input terminals. (Fig. 4)
The oscillator output is compared with the CS terminal v oltage ,
and the error amplifier voltage , then, the low er voltage between
and is pref erred.
While the pref erred voltage is lo wer than the oscillator output, the
PWM comparator output is Lo w . While the pref erred voltage is higher
than the oscillator output, the PWM comparator output is High (Fig.
5). When the IC starts , the capacitor connected to the CS terminal is
charged through the resistor connected to the po wer supply, and
then the output pulses begin to widen gr adually as the operation of
soft start.
In steady operation, the pulse width is determined based on the
voltage of the error amplifier , and then the output v oltage is
stabilized. The Dead Time control v oltage ( DT v oltage) of F A7700
and FA7701 has diff erent characteristics to adjust the ICs to v arious
types of power supply circuits being controlled and also to reduce
e xternal discrete components as man y as possible . F A7700 is
de veloped f or fly-back circuits , and boost circuits, and the DT v oltage
is set in the IC so that the maximum output duty cycle is fix ed to 80%
min.. (Maximum output duty cycle changes according to oper ation
frequencies. ––See page 6 “Maximum output duty vs . temperature”.)
It pre vents magnetic saturation of the tr ansformer or the like when a
short-circuit in the output circuit occurs . FA7701 is developed f or
buc k circuits, and it is designed f or the maximum output duty cycle of
100%. The timing chart of PWM comparator is described in Fig. 5.
FA7700V, FA7701V
10
tp [ms] ⱌ Cs ⫻ RCS ⫻ 1n Vcc – 1.5
Vcc – 2.2
()
Fig. 8
0
1
2
3
4
5
6
Time
tp
Soft start
Start-up
Lower value of either 5.5V or Vcc terminal voltage
CS terminal voltage [V]
Momentary short circuit
Short circuit protection
Short circuit
2.2V
1.5V
Vcc – 1.5 ⬍ Rcs [M Ω] ⬍Vcc – 1.5
50µA + IL1µA + IL
VCC
VCC – 0.88
()
5. Soft start function
As described in Fig. 6, RCS is connected between CS terminal
and VCC terminal, and Cs is connected betw een CS terminal
and GND. The voltage of CS terminal rises when starting the
pow er supply, because Cs is charged by Vcc through Rcs. The
soft start function starts by charging a capacitor Cs connected
to PWM comparator. To estimate the soft start period, the time
(ts) between the start and the moment when the width of output
pulse reaches 50% is calculated b y:
ts [ms] ⱌ Cs ⫻ RCS ⫻ 1n
Cs : Capacity of Cs [µF]
Rcs : Resistance of Rcs [kΩ]
Vcc : Supply voltage [V]
The maximum current flo wing in Rcs should be within the
recommended value (50µA max.).
(IL: leak current of capacitor Cs)
Note: This IC operates ON/OFF function by the CS terminal (CS < 0.3V
typ. : OFF), then it turns off the internal bias voltage VREF (off
mode). Therefore, you can not connect the resistor “Rcs” between
CS terminal and REF terminal, and can connect the resistor only
to VCC terminal.
6. ON/OFF circuit
The ON/OFF function can be controlled b y external signal to
the CS terminal, the IC becomes off mode. When the CS
terminal voltage is below 0.30V(typ.), the output of ON/OFF
comparator C3 is set to LOW, and the internal power source
VREF is shut off, then the IC is switched to the off mode .
The pow er consumption in the off mode is 40 µA(typ.). A
sample circuit is giv en in Fig. 7.
7. Timer latc h short-circuit protection circuit
The short-circuit protection circuit consists of tw o compar ators
C1, C2 (Fig. 6). In steady operation, the output of S.C.DET
comparator C2 is set to High, and the CS terminal is clamped
by the 1.5V Zener diode, because the output of error amplifier
is about 1V. If the converter output voltage drops due to a
short-circuit, when the output voltage of error amplifier rises
e xcesses 1.5V, the output of S .C.DET comparator C2 is set to
low, and then the clamp of Zener diode is turned off.
As a result, the v oltage of CS terminal rises up to the lower
v alue of either 5.5 V or the v oltage of VCC terminal.
If the v oltage of CS terminal excesses 2.2V, the output of S .C.P
comparator C1 is set to high, and the circuit shuts down the
output circuit of the IC. When it occurs, the current
consumption of the IC is 0.9mA (typ.) because the IC is set to
OFF latch mode . The period (tp) between the occurrence of a
short-circuit in the converter output and the triggering of the
short-circuit protection function can be calculated by the
f ollo wing expression:
Cs : Capacitance of Cs [µF]
Rcs : Resistance of Rcs [kΩ]
Vcc : Supply voltage [V]
Note: When the IC is used in a product with lo w VCC voltage, the
period (tp) of the triggering of the short-circuit protection
described abov e fluctuates significantly. Therefore, sufficient
care should be taken in such cases .
Example When Rcs=750kΩ, Cs=0.1µF: Vcc=2.5V: tp ⱌ 90ms
Vcc=3.6V : tp ⱌ 30ms
Fig. 7
+
+
Output
off
FB
1.5V
2.2V
1.5V
5.5V
CS
R
CC
Cs
Rcs
S.C.P
S.C.DET
C1
C2
+
0.3 V
REF OFF
ON/OFF
C3
8
Fig. 6
CS
Cs
ON/OFF
Vcc
FA7700V, FA7701V
11
You can reset the off latch mode operation of the short-circuit
protection by either of the following ways: lowering the CS
voltage belo w 2.03V (typ.); lowering the Vcc voltage belo w the
Off threshold v oltage of undervoltage loc k out; 1.93V (typ.);
low ering the v oltage of FB terminal below 1.5V (typ.)
The off latch mode action cannot be triggered by externally
applying voltage of over 2.2V forcibly to the CS terminal (1.5V,
ZD clamped). Characteristics of the current and the v oltage of
CS terminal is shown in the characteristic curve (CS terminal
voltage vs . CS terminal sink current) on page 6. Be sure to use
the IC up to the recommended CS terminal current of 50µA.
8. Output circuit
The IC contains a push-pull output stage and can directly driv e
MOSFETs (FA7700: N ch, FA7701: P ch). The maxim um peak
current of the output stage is a sink current of +150mA, and a
source current of –400mA. The IC can also drive NPN, and
PNP transistors. The maxim um peak current in such cases is
±50mA. Be sure to design the output current considering the
rating of pow er dissipation.
9. Po wer good signal circuit/ Undervoltage loc kout circuit
The IC contains a protection circuit against undervoltage
malfunctions to protect the circuit from the damage caused b y
malfunctions when the supply v oltage drops. When the supply
voltage rises from 0V, the circuit starts to operate at VCC of
2.07V (typ .) and outputs generate pulses. If a drop of the
supply voltage occurs, it stops output at VCC of 1.93V (typ.).
when it occurs, the CS terminal is turned to Low lev el and then
it is reset. The power good signal circuit monitors the voltage of
REF terminal, and stops output until the voltage of REF
terminal excesses approximately 2V to prevent malfunctions.
■ Design advice
1 . Setting the oscillation frequency
As described in item 2 “Oscillator” of “Description of each
circuit”, a desired oscillation frequency can be determined by
the v alue of the resistor connected to the RT terminal. When
designing an oscillation frequency, you can set any frequency
between 50kHz and 1MHz. You can roughly obtain the
oscillation frequency from the characteristic curve “Oscillation
frequency (fosc) vs. timing resistor resistance(RT)” or the v alue
can be calculated by the following expression.
fOSC: Oscillation frequency [kHz]
RT: Timing resistor [kΩ]
This e xpression, ho wev er, can be used for rough calculation,
the v alue obtained is not guar anteed. The oper ation frequency
v aries due to the conditions such as tolerance of the
characteristics of the ICs, influence of noises, or external
discrete components. When determining the v alues , be sure to
v erify the effectiveness of the v alues of the components in an
actual circuit.
2. Operation around the maxim um or the minimum output
duties
As described in characteristic curves on page 5, “output duty
cycle vs. FB terminal voltage (V FB)” and “output duty cycle vs.
CS terminal voltage (Vcs)”, the linearity of the output duty of
this IC drops around the minim um output duty and the
maximum output duty (FA7701 only). This phenomena are
conspicuous when operating in a high frequency (when the
pulse width is narrow). Therefore be careful when using high
frequency.
3. Restriction of external discrete components
To achiev e a stable operation of the ICs, the v alue of external
discrete components connected to Vcc, REF, CS , FB terminals
should be within the recommended oper ational conditions .
4. Loss calculation
Since it is difficult to measure IC loss directly, the calculation to
obtain the appro ximate loss of the IC connected directly to a
MOSFET is described below.
When the supply v oltage is Vcc, the current consumption of the
IC is Icc, the total input gate charge of the driven MOSFET is
Qg, the s witching frequency is fsw, the total loss Pd of the IC
can be calculated b y:
Pd ⱌ Vcc ⫻ (Icc + Qg ⫻ fs w).
The v alues in this expression is influenced by the effects of the
dependency of supply v oltage, the characteristics of
temperature , or toler ance. Therefore, be sure to verify
appropriateness of the v alue considering the f actors abo ve
under all applicab le conditions.
Example:
When VCC = 6V, in the case of a typical IC, from the
characteristic curve, Icc=1.2mA. When operating in Qg = 6nC,
fs w = 500kHz, Pd should be:
Pd ⱌ 6 ⫻ (1.2mA + 6nC ⫻ 500kHz) ⱌ 25.2mW
fOSC = 3000 ⫻ RT –0.9
RT = 3000 1.11
fOSC
()
FA7700V, FA7701V
12
■ Application circuit
FA7700
ON /OFF
FA7700
RT REF IN- FB
1234
8 7 65
GNDOUTVCC
CS
Vout
12V/0.2A
Vin
2.5~11V
ON /OFF
FA7700
RT REF IN- FB
1 2 3 4
8 7 65
GNDOUTVCC
CS
VoutVin
FA7700V, FA7701V
13
■ Application circuit
FA7701
Parts tolerances characteristics are not defined in the circuit design
sample shown above. When designing an actual circuit for a
product, you must determine parts tolerances and characteristics for
safe and economical operation.
FA7701
RT REF IN- FB
12 3 4
8 7 65
GNDOUTVCC
CS
ON /OFF
Vin
7~18V Vout
5V/0.5A
