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74LVT16373A
3.3V LVT 16-bit transparent D-type latch
(3-State)
Product specification
Supersedes data of 1994 Dec 15
IC23 Data Handbook
1998 Feb 19
INTEGRATED CIRCUITS
Philips Semiconductors Product specification
74LVT16373A3.3V 16-bit transparent D-type latch (3-State)
2
1998 Feb 19 853-1780 18989
FEATURES
•16-bit transparent latch
•3-State buffers
•Output capability: +64mA/-32mA
•TTL input and output switching levels
•Input and output interface capability to systems at 5V supply
•Bus-hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
•Live insertion/extraction permitted
•Power-up reset
•Power-up 3-State
•No bus current loading when output is tied to 5V bus
•Latch-up protection exceeds 500mA per JEDEC Std 17
•ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
DESCRIPTION
The 74LVT16373A is a high-performance BiCMOS product
designed for VCC operation at 3.3V.
This device is a 16-bit transparent D-type latch with non-inverting
3-State bus compatible outputs. The device can be used as two
8-bit latches or one 16-bit latch. When enable (E) input is High, the
Q outputs follow the data (D) inputs. When enable is taken Low, the
Q outputs are latched at the levels of the D inputs one setup time
prior to the High-to-Low transition.
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS
Tamb = 25°CTYPICAL UNIT
tPLH
tPHL Propagation delay
nDx to nQx CL = 50pF;
VCC = 3.3V 1.9 ns
CIN Input capacitance VI = 0V or 3.0V 3 pF
COUT Output capacitance Outputs disabled; VO = 0V or 3.0V 9 pF
ICCZ Total supply current Outputs disabled; VCC = 3.6V 70 µA
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER
48-Pin Plastic SSOP Type III –40°C to +85°C74LVT16373A DL VT16373A DL SOT370-1
48-Pin Plastic TSSOP Type II –40°C to +85°C74LVT16373A DGG VT16373A DGG SOT362-1
LOGIC SYMBOL
32
1Q0 1Q1 1Q2
65
1Q3
47 46 44 43
1D0 1D1 1D2 1D3
48
1
98
1Q4 1Q5 1Q6
1211
1Q7
41 40 38 37
1D4 1D5 1D6 1D7
1LE
1OE
1413 1716
36 35 33 32
25
24
2019 2322
30 29 27 26
2Q0 2Q1 2Q2 2Q3
2D02D212D2 2D3
2Q4 2Q5 2Q6 2Q7
2D4 2D5 2D6 2D7
2LE
2OE
SA00044
PIN DESCRIPTION
PIN NUMBER SYMBOL FUNCTION
47, 46, 44, 43, 41, 40, 38, 37,
36, 35, 33, 32, 30, 29, 27, 26 1D0 – 1D7
2D0 – 2D7 Data inputs
2, 3, 5, 6, 8, 9, 11, 12, 13,
14, 16, 17, 19, 20, 22, 23 1Q0 – 1Q7
2Q0 – 2Q7 Data outputs
1, 24 1OE, 2OE Output enable
inputs
(active-Low)
48, 25 1E, 2E Enable inputs
(active-High)
4, 10, 15, 21, 28, 34, 39, 45 GND Ground (0V)
7, 18, 31, 42 VCC Positive
supply voltage
Philips Semiconductors Product specification
74LVT16373A3.3V 16-bit transparent D-type latch (3-State)
1998 Feb 19 3
LOGIC SYMBOL (IEEE/IEC)
48
1EN
1 ∇
46
44
43
41
40
38
37
36
C3
2EN
C4
2 ∇
1
24
25
47
35
33
32
30
29
27
26
3
2
5
6
8
9
11
12
13
14
16
17
19
20
22
23
SW00010
1OE
1LE
2OE
2LE
1D1
1D2
1D3
1D4
1D5
1D6
1D7
2D1
2D2
2D3
2D4
2D5
2D6
2D7
2D8
1Q1
1Q2
1Q3
1Q4
1Q5
1Q6
1Q7
1Q8
2Q1
2Q2
2Q3
2Q4
2Q5
2Q8
1D8
2Q6
2Q7
3D
4D
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1OE
1Q0
1Q1
GND
1Q2
1Q3
1Q4
1Q5
GND
1Q6
1Q7
2Q0
2Q1
GND
2Q3
VCC
2Q4
VCC
2Q2
2Q5
GND
2Q7
2OE
2Q6
1LE
1D0
1D1
GND
1D2
1D3
1D4
1D5
GND
1D6
1D7
2D0
2D1
GND
2D3
VCC
2D4
VCC
2D2
2D5
GND
2D7
2LE
2D6
SA00043
LOGIC DIAGRAM
E Q
D
nD0
nQ0
EQ
D
nD1
EQ
D
nD2
EQ
D
nD3
EQ
D
nD4
EQ
D
nD5
EQ
D
nD6
EQ
D
nD7
nQ1 nQ2 nQ3 nQ4 nQ5 nQ6 nQ7
nLE
nOE
SA00046
Philips Semiconductors Product specification
74LVT16373A3.3V 16-bit transparent D-type latch (3-State)
1998 Feb 19 4
FUNCTION TABLE
INPUTS INTERNAL OUTPUTS
OPERATING MODE
nOE nE nDx REGISTER nQ0 – nQ7
OPERATING
MODE
L
LH
HL
HL
HL
HEnable and read register
L
L↓
↓l
hL
HL
HLatch and read register
L L X NC NC Hold
H
HL
HX
nDx NC
nDx Z
ZDisable outputs
H = High voltage level
h = High voltage level one set-up time prior to the High-to-Low E transition
L = Low voltage level
l = Low voltage level one set-up time prior to the High-to-Low E transition
NC= No change
X = Don’t care
Z = High impedance “off” state
↓= High-to-Low E transition
ABSOLUTE MAXIMUM RATINGS1, 2
SYMBOL PARAMETER CONDITIONS RATING UNIT
VCC DC supply voltage –0.5 to +4.6 V
IIK DC input diode current VI < 0 –50 mA
VIDC input voltage3–0.5 to +7.0 V
IOK DC output diode current VO < 0 –50 mA
VOUT DC output voltage3Output in Off or High state –0.5 to +7.0 V
IO
DC out
p
ut current
Output in Low state 128
mA
I
OUT
DC
o
u
tp
u
t
c
u
rrent
Output in High state –64
mA
Tstg Storage temperature range –65 to +150 °C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMITS
UNIT
SYMBOL
PARAMETER
MIN MAX
UNIT
VCC DC supply voltage 2.7 3.6 V
VIInput voltage 0 5.5 V
VIH High-level input voltage 2.0 V
VIL Input voltage 0.8 V
IOH High-level output current –32 mA
IOL Low-level output current 32 mA
Low-level output current; current duty cycle ≤ 50%; f ≥ 1kHz 64
∆t/∆vInput transition rise or fall rate; Outputs enabled 10 ns/V
Tamb Operating free-air temperature range –40 +85 °C
Philips Semiconductors Product specification
74LVT16373A3.3V 16-bit transparent D-type latch (3-State)
1998 Feb 19 5
DC ELECTRICAL CHARACTERISTICS LIMITS
SYMBOL PARAMETER TEST CONDITIONS Temp = -40°C to +85°C UNIT
MIN TYP1MAX
VIK Input clamp voltage VCC = 2.7V; IIK = –18mA –.85 –1.2 V
VCC = 2.7 to 3.6V ; IOH = –100µA VCC-0.2 VCC
VOH High-level output voltage VCC = 2.7V ; IOH = –8mA 2.4 2.5 V
VCC = 3.0V ; IOH = –32mA 2.0 2.3
VCC = 2.7V ; IOL = 100µA 0.07 0.2
VCC = 2.7V ; IOL = 24mA 0.3 0.5
VOL Low–level output voltage VCC = 3.0V ; IOL = 16mA 0.25 0.4 V
VCC = 3.0V ; IOL = 32mA 0.3 0.5
VCC = 3.0V ; IOL = 64mA 0.4 0.55
VRST Power-up output Low voltage5VCC = 3.6V ; IO = 1mA; VI = GND or VCC 0.1 0.55 V
VCC = 3.6V ; V I = VCC or GND Control pins 0.1 ±1
II
In
p
ut leakage current
VCC = 0 or 3.6V ; V I = 5.5V 0.4 10
µA
I
I
In ut
leakage
current
VCC = 3.6V ; V I = VCC
Data
p
ins4
0.1 1
µA
VCC = 3.6V ; V I = 0
Data
ins4
-0.4 -5
IOFF Output off current VCC = 0V ; VI or VO = 0 to 4.5V 0.1 ±100 µA
7
VCC = 3V ; VI = 0.8V 75 135
IHOLD Bus Hold current D inputs
7
VCC = 3V ; VI = 2.0V –75 -135 µA
VCC = 0V to 3.6V ; V CC = 3.6V ±500
IEX Current into an output in the
High state when VO > VCC VO = 5.5V ; V CC = 3.0V 50 125 µA
IPU/PD Power up/down 3-State output
current3VCC ≤ 1.2V; VO = 0.5V to VCC; VI = GND or VCC;
OE/OE = Don’t care 1±100 µA
IOZH 3-State output High current VCC = 3.6V ; V O = 3.0V; VI = VIH or VIL 0.5 5
µA
IOZL 3-State output Low current VCC = 3.6V ; V O = 0.5V; VI = VIH or VIL 0.5 –5
µA
ICCH VCC = 3.6V ; Outputs High, VI = GND or VCC, IO = 0 0.07 0.12
ICCL Quiescent supply current VCC = 3.6V ; Outputs Low, VI = GND or VCC, IO = 0 4.0 6 mA
ICCZ VCC = 3.6V ; Outputs Disabled; VI = GND or VCC, IO = 060.07 0.12
∆ICC Additional supply current per
input pin2VCC = 3V to 3.6V ; One input at V CC-0.6V,
Other inputs at VCC or GND 0.1 0.2 mA
NOTES:
1. All typical values are at VCC = 3.3V and Tamb = 25°C.
2. This is the increase in supply current for each input at the specified voltage level other than VCC or GND.
3. This parameter is valid for any VCC between 0V and 1.2V with a transition time of up to 10msec. From VCC = 1.2V to VCC = 3.3V ±0.3V a
transition time of 100µsec is permitted. This parameter is valid for Tamb = 25°C only.
4. Unused pins at VCC or GND.
5. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power.
6. ICCZ is measured with outputs pulled to VCC or GND.
7. This is the bus hold overdrive current required to force the input to the opposite logic state.
Philips Semiconductors Product specification
74LVT16373A3.3V 16-bit transparent D-type latch (3-State)
1998 Feb 19 6
AC CHARACTERISTICS
GND = 0V ; tR = tF = 2.5ns; CL = 50pF; RL = 500Ω; Tamb = –40°C to +85°C. LIMITS
SYMBOL PARAMETER WAVEFORM VCC = 3.3V ±0.3V VCC = 2.7V UNIT
MIN TYP1MAX MAX
tPLH
tPHL Propagation delay
nDx to nQx 20.5
0.5 1.8
1.9 3.9
3.9 4.5
4.5 ns
tPLH
tPHL Propagation delay
nE to nQx 10.5
0.5 2.1
2.2 4.8
4.8 5.4
5.4 ns
tPZH
tPZL Output enable time
to High and Low level 4
50.1
0.1 2.8
2.6 4.5
4.3 5.1
4.7 ns
tPHZ
tPLZ Output disable time
from High and Low Level 4
50.1
0.1 3.3
3.0 4.5
4.3 5.1
4.7 ns
NOTE:
1. All typical values are at VCC = 3.3V and Tamb = 25°C.
AC SETUP REQUIREMENTS
GND = 0V ; tR = tF = 2.5ns; CL = 50pF; RL = 500Ω; Tamb = –40°C to +85°C. LIMITS
SYMBOL PARAMETER WAVEFORM VCC = 3.3V ±0.3V VCC = 2.7V UNIT
MIN TYP MIN
tS(H)
tS(L) Setup time
nDx to nE 31.5
2.0 0.1
0.2 1.0
2.0 ns
th(H)
th(L) Hold time
nDx to nE 31.0
1.5 0
01.0
2.0 ns
tW(H) nE pulse width
High 1 1.5 0.5 1.5 ns
AC WAVEFORMS
For all waveforms, VM = 1.5V.
VMVMVM
VMVM
tw(H)
tPHL tPLH
nE
nQx
SW00011
2.7V
0V
VOH
VOL
W aveform 1. Propagation Delay, Enable to
Output, and Enable Pulse Width
nDx VM
tPLH tPHL
nQx VM
VM
VM
SW00012
2.7V
0V
VOH
VOL
W aveform 2. Propagation Delay for Data to Outputs
NOTE: The shaded areas indicate when the input is per-
mitted to change for predictable output performance.
ÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
VM
nDx
VMVM
VMVM
nE
ts(H) th(H) ts(L) th(L)
SW00013
VM
2.7V
0V
2.7V
0V
Waveform 3. Data Setup and Hold Times
nOE VM
tPZH tPHZ
0V
nQx VM
VM
SW00014
2.7V
0V
VOH -0.3V
VOH
W aveform 4. 3-State Output Enable time to High Level
and Output Disable Time from High Level
Philips Semiconductors Product specification
74LVT16373A3.3V 16-bit transparent D-type latch (3-State)
1998 Feb 19 7
nOE
tPZL tPLZ
0V
nQx
VM
VM
VM
SW00015
2.7V
3V
VOL
VOL +0.3V
W aveform 5. 3-State Output Enable Time to Low Level
and Output Disable Time from Low Level
TEST CIRCUIT AND WAVEFORMS
PULSE
GENERATOR
RT
VIN
D.U.T.
VOUT
CLRL
VCC
RL
OPEN VMVM
tWAMP (V)
NEGATIVE
PULSE 10% 10%
90% 90%
0V
VMVM
tW
AMP (V)
POSITIVE
PULSE
90% 90%
10% 10% 0V
tTHL (tF)
tTLH (tR)t
THL (tF)
tTLH (tR)
VM = 1.5V
Input Pulse Definition
DEFINITIONS
RL = Load resistor; see AC CHARACTERISTICS for value.
CL = Load capacitance includes jig and probe capacitance;
see AC CHARACTERISTICS for value.
RT = Termination resistance should be equal to ZOUT of
pulse generators.
GND
6V
SW00003
Test Circuit for 3-State Outputs
TEST SWITCH
tPHZ/tPZH GND
tPLZ/tPZL 6V
tPLH/tPHL open
SWITCH POSITION
INPUT PULSE REQUIREMENTS
FAMILY Amplitude Rep. Rate tWtRtF
74LVT16 2.7V ≤10MHz 500ns ≤2.5ns ≤2.5ns
Philips Semiconductors Low Voltage Products Product specification
74LVT16373A
3.3V LVT 16-bit transparent D-type latch
(3-State)
1998 Feb 19 8
SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm SOT370-1
Philips Semiconductors Low Voltage Products Product specification
74LVT16373A
3.3V LVT 16-bit transparent D-type latch
(3-State)
1998 Feb 19 9
TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1mm SOT362-1
Philips Semiconductors Product specification
74LVT16373A
3.3V LVT 16-bit transparent D-type latch
(3-State)
yyyy mmm dd 10
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may af fect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code Date of release: 05-96
Document order number: 9397-750-03554
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Data sheet
status
Objective
specification
Preliminary
specification
Product
specification
Product
status
Development
Qualification
Production
Definition [1]
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
Data sheet status
[1] Please consult the most recently issued datasheet before initiating or completing a design.
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The 74LVT16373A is a high-performance BiCMOS product designed for Vcc operation at 3.3V.
This device is a 16-bit transparent D-type latch with non-inverting 3-State bus compatible outputs. The device can be used as two 8-bit latches or one 16-bit latch. When enable (E) input is
High, the Q outputs follow the data (D) inputs. When enable is taken Low, the Q outputs are latched at the levels of the D inputs one setup time prior to the High-to-Low transition.
16-bit transparent latch
3-State buffers
Output capability: +64mA/-32mA
TTL input and output switching levels
Input and output interface capability to systems at 5V supply
Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs
Live insertion/extraction permitted
Power-up reset
Power-up 3-State
No bus current loading when output is tied to 5V bus
Latch-up protection exceeds 500mA per JEDEC Std 17
ESD protection exceeds 2000V per MIL STD 883 Method 3015 and 200V per Machine Model
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3.3V LVT 16-bit transparent D-type latch (3-State)
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The variants in the table below are discontinued. See the table Discontinued information for more information.
The variants in the table below are discontinued. See the table Discontinued information for more information.
Quality and reliability disclaimer
74LVT16373ADGG 74LVT16373ADGG,112 9352 030 90112 Volume production SOT362-1
(TSSOP48) Tube Standard Marking
74LVT16373ADGG 74LVT16373ADGG,118 9352 030 90118 Volume production SOT362-1
(TSSOP48) Reel Pack, SMD, 13" Standard Marking
74LVT16373ADL 74LVT16373ADL,112 9351 831 10112 Volume production SOT370-1
(SSOP48) Tube Standard Marking
74LVT16373ADL 74LVT16373ADL,118 9351 831 10118 Volume production SOT370-1
(SSOP48) Tape reel smd Standard Marking
Type number Orderable part number Ordering code (12NC) Product status Package Packing Marking ECCN
74LVT16373ADGG 74LVT16373ADGG,512 9352 030 90512 Withdrawn
Replacement product
SOT362-1
(TSSOP48) Tube Dry Pack Standard Marking
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Type number Orderable part number Chemical content RoHS Leadfree conversion date RHF IFR (FIT) MTBF (hours) MSL Lead-free
74LVT16373ADGG 74LVT16373ADGG,112 74LVT16373ADGG Always Pb-free 1,33 7,52E+08 1
74LVT16373ADGG 74LVT16373ADGG,118 74LVT16373ADGG Always Pb-free 1,33 7,52E+08 1
74LVT16373ADL 74LVT16373ADL,112 74LVT16373ADL week 13, 2005 1,33 7,52E+08 1
74LVT16373ADL 74LVT16373ADL,118 74LVT16373ADL week 13, 2005 1,33 7,52E+08 1
Type number Orderable part number Chemical content RoHS Leadfree conversion date RHF IFR (FIT) MTBF (hours) MSL Lead-free
74LVT16373ADGG 74LVT16373ADGG,512 74LVT16373ADGG week 14, 2005 1,33 7,52E+08 1
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74LVT16373ADGG 9352 030 90112 74LVT16373ADGG,112 JAPAN CHIP ONE
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74LVT16373ADGG 9352 030 90118 74LVT16373ADGG,118 JAPAN CHIP ONE
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74LVT16373ADL 9351 831 10112 74LVT16373ADL,112 1.1400 JAPAN CHIP ONE
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Application Notes
LVT (Low Voltage Technology) and ALVT (Advanced LVT) (1998-01-01)
Simulation Support for Philips' Advanced BiCMOS Products (1993-11-01)
Test Fixtures for High Speed Logic (1998-04-02)
The Behavior Of Integrated Bus Hold Circuits (1996-03-01)
Transmission Lines and Terminations with Philips Advanced Logic Families (1998-02-01)
Similar products
74LVT16373A links to the similar products page containing an overview of products that are similar in function or related to the type number(s) as listed on this page. The similar products
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Discontinued information Hide
Type number Ordering code (12NC) Last-time buy date Last-time delivery date Replacement product DN Notice Status Comments
74LVT16373ADGG 935203090512 DN
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Block dia
g
rams/
p
innin
g
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Desi
g
n su
pp
ort Hide
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Parametrics/similar
p
roducts Hide
Type number Package Description Propagation Delay
(ns)
Voltage No. of
Pins
Logic Switching
Levels
Output Drive
Capability
74LVT16373ADGG SOT362-1
(TSSOP48)
3.3V 16-Bit D-Type Transparent Latch (3-
State) 1.9@3.3V 2.7-3.6
V48 TTL -32/+64 mA
74LVT16373ADL SOT370-1
(SSOP48)
3.3V 16-Bit D-Type Transparent Latch (3-
State) 1.9@3.3V 2.7-3.6
V48 TTL -32/+64 mA
Pa
g
e 3 of 43.3V LVT 16-
b
it trans
p
arent D-t
yp
e latch
(
3-State
)
from NXP Semiconductors
22-Ma
r
-2010http://www.nxp.com
/
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Quality and reliability disclaimer
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©2006-2010 NXP Semiconductors. All rights reserved.
Pa
g
e 4 of 43.3V LVT 16-
b
it trans
p
arent D-t
yp
e latch
(
3-State
)
from NXP Semiconductors
22-Ma
r
-2010http://www.nxp.com
/