W742S82A
4BIT MICROCONTROLLER, 16K×16ROM, 2K×4RAM
DTMF, 160-DOT LCD, 3-OPS
Publication Release Date: June 1, 2005
- 1 - Revision A1
Table of Contents-
1. GENERAL DESCRIPTION ......................................................................................................... 2
2. FEATURES ................................................................................................................................. 2
3. PIN CONFIGURATION ...............................................................................................................4
4. PIN DESCRIPTION..................................................................................................................... 5
5. BLOCK DIAGRAM ...................................................................................................................... 6
6. ABSOLUTE MAXIMUM RATINGS ............................................................................................. 7
7. DC CHARACTERISTICS ............................................................................................................ 7
7.1 DC CHARACTERISTICS: VDD-VSS=3.0V .................................................................... 7
7.2 DC CHARACTERISTICS: VDD-VSS=3.6V.................................................................. 10
8. AC CHARACTERISTICS .......................................................................................................... 11
9. APPLICATIONS INFORMATION.............................................................................................. 12
9.1 Operating Voltage......................................................................................................... 12
9.2 FSK Signal Detection and FSK Demodulation ............................................................. 12
9.2.1 FSK Signal Detection ....................................................................................................12
9.2.2 FSK demodulation.........................................................................................................12
10. REVISION HISTORY ................................................................................................................13
W742S82A
- 2 -
1. GENERAL DESCRIPTION
The W742S82A is a high-performance 4-bit microcontroller (µC) that provides an LCD driver. The
device contains a 4-bit ALU, two 8-bit timers, two dividers (for two oscillators) in dual-clock operation,
a 40 × 4 LCD driver, six 4-bit I/O ports (including 1 output port for LED driving), and one channel
DTMF generator. There are also five interrupt sources and 16-levels subroutine nesting for interrupt
applications. The W742S82A operates on very low current and has two power reduction modes, that
is the dual-clock slow operation and STOP mode, which help to minimize power dissipation.
2. FEATURES
y Operating voltage:
- 2.2V-5.5V (Ffast1:3.60MHz mode)
- 3.2V-5.5V (Ffast2:7.20MHz mode)
y Dual-clock operation mode (Connect to 32768 Hz crystal only)
- Fslow(sub) oscillator : 32768Hz OSC
- Ffast1 clock: PLL ( Phase Lock Loop ) outputs 3.60MHz enable
- Ffast2 clock: PLL ( Phase Lock Loop ) outputs 7.20MHz enable
y Memory
- 16384 x 16 bits program ROM (including 64K x 4 bit look-up table)
- 2048 x 4 bits data RAM (including 16 nibbles x 16 pages working registers)
- 40 x 4 LCD data RAM
y 24 input/output pins
- Port for input only: 1 ports/4 pins (RC)
- Input/output ports: 3 ports/12 pins (RA, RB & RD). RA,RB can be configured with or without
internal pull-up resistors with ram mapping registers in input mode.
- High sink current output port for LED driving: 1 port /4 pins (RE)
- Port for output only: 1 port/ 4 pins (RF)
y Power-down mode
- Hold function: no operation (main-oscillator and sub-oscillator still operate)
- Stop function: no operation (main-oscillator and sub-oscillator are stopped)
- Slow operation mode: system is operated by the sub-oscillator (FOSC=Fs and Fm is stopped)
y Five types of interrupts
- Four internal interrupts (Divider0, Divider1, Timer0, Timer1)
- One external interrupts (RC Port)
y • LCD driver output
- 40 segments x 4 commons
- 1/4 duty 1/3 bias driving mode
W742S82A
Publication Release Date: June 1, 2005
- 3 - Revision A1
y MFP output pin
- Output is software selectable as modulating or non-modulating frequency
- Works as frequency output specified by Timer 1
y DTMF output pin (PLL should be enabled)
- Output is one channel Dual Tone Multi-Frequency signal for dialing
- Either in Ffast1 or Ffast2 clock mode.
- Three OpAmps(Operational Amplifiers)
- Three general purpose with internal circuit for application.
y Two built-in 14-bit frequency dividers
- Divider0: the clock source is the output of the main-oscillator
- Divider1: the clock source is the output of the sub-oscillator (dual-clock mode) or the Fosc/128
(single-clock mode)
y Two built-in 8-bit programmable countdown timers
- Timer 0: one of two internal clock frequencies (FOSC/4 or FOSC/1024) can be selected
- Timer 1: with auto-reload function and one of three internal clock frequencies (FOSC, FOSC/64
or Fs) can be selected by MR1 register; and the specified frequency can be delivered to MFP
pin
y Built-in 18/15-bit watchdog timer selectable for system reset; enable the watch dog timer or not is
determined by code option
y Powerful instruction set
y 16-levels subroutine (include interrupt) nesting
W742S82A
- 4 -
3. PIN CONFIGURATION
123456 89101112137 141516171819 21222324252620 27 28 29 30
64 64 63 62 60 59 58 57 56 5561 54 53 52 5180 79 78 77 75 74 73 72 71 7076 69 68 67 66
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
RE3
RF 1
RB0
RB1
RB2
RB3
RE0
RF 0
RC2
RC3
RD0
RD1
RD2
RD3
RE1
RE 2
SEG38
SEG30
SEG28
N
C
N
C
S
E
G
2
1
S
E
G
1
9
S
E
G
2
2
S
E
G
1
8
V
S
S
S
E
G
0
S
E
G
2
0
S
E
G
1
S
E
G
2
S
E
G
1
5
S
E
G
1
6
S
E
G
1
7
S
E
G
3
S
E
G
4
S
E
G
5
S
E
G
6
S
E
G
7
S
E
G
8
S
E
G
9
S
E
G
1
0
S
E
G
1
1
S
E
G
1
2
S
E
G
1
3
S
E
G
1
4
SEG39
SEG25
SEG26
SEG27
SEG29
SEG31
SEG32
SEG33
SEG34
SEG35
C
O
M
1
C
O
M
0
X
O
U
T
X
I
N
V
D
D
V
F
V
X
X
F
D
T
M
F
/
R
E
S
T
E
S
T
M
F
P
SEG24
SEG37
SEG36
N
C
N
C
N
C
N
C
O
P
P
3
O
P
N
3
O
P
O
3
O
P
N
2
O
P
P
1
O
P
P
2
N
C
N
C
N
C
C
O
M
2
R
A
0
R
A
3
R
A
1
R
A
2
N C
N C
RF 3
RF 2
N
C
N
C
N
C
S
E
G
2
3
N C
N C
N C
N C
C
O
M
3
W742S82A
Publication Release Date: June 1, 2005
- 5 - Revision A1
4. PIN DESCRIPTION
SYMBOL I/O FUNCTION
XIN I Input pin for oscillator. Connected to 32.768 KHz crystal only.
XOUT O
Output pin for oscillator with internal oscillation capacitor. Connected to
32.768 KHz crystal only.
VXXF I Regulator for PLL circuit. Connected capacitor (10 uF) to VSS.
VF I Low pass filter for PLL circuit. Connected capacitor 0.022uF to VSS.
RA0-RA3 I/O
Input/Output port with internal pull-up resistors.
Input/output mode specified by port mode 1 register (PM1).
Internal pull-up resistors are controlled by RAM mapping registers.
RB0-RB3 I/O
Input/Output port with internal pull-up resistor.
Input/output mode specified by port mode 2 register (PM2).
Internal pull-up resistors are controlled by RAM mapping registers.
RC2-RC3 I 4-bit port for input only. Each pin has an independent interrupt capability.
RD0-RD3 I/O
Input/Output port. Input/output mode specified by port mode 5 register
(PM5).
RE0-RE3 O Output port only. With high sink current capacity for the LED application.
RF0-RF3 O Output port only.
MFP O
Output pin only.
This pin can output modulating or non-modulating frequency, or Timer 1
specified frequency. It can be selected by bit 0 of BUZCR (BUZCR.0).
DTMF O This pin can output dual tone multi frequency signal for dialing.
RES I System reset pin with pull-high resistor.
SEG0-
SEG39 O LCD segment output pins.
COM0-
COM3 O LCD common signal output pins.
The LCD alternating frequency can be selected by code option.
OPP1~3 I OpAmp1~3 positive input pins
OPN2~3 I OpAmp1~3 negative input pins
OPO3 O OpAmp1~3 output pins
TEST I For IC testing. Connected to Vss in normal usage.
VDD I Positive power supply (+).
VSS I Negative power supply (-).
W742S82A
- 6 -
5. BLOCK DIAGRAM
COM0~COM3SEG0~SEG39
LCD
PC
STACK
(16 Levels)
RAM
(2048*4)
A
LU
Timer 0
(8 Bit)
Timing Generator
PORT
PORT
PORT
Modulation
Frequency
RA0-3
RB0-3
RC2-3
RD0-3
MFP
XIN
XOUT
VDD
VSS
ROM
(16384*16
(look_up table
64K*4)
Timer 1
(8 Bit)
A
CC
RES
Divider 0
(14 Bit)
Watch Dog
(4 Bit)
HCF
PEFHEFIEF
Central Control
Unit
EVF SEF
PSR0 SCR PR
MR0 MR1
. . .
PORT
MUX
SEL
+1(+2)
PORT
PM0
Divider 1
(
12/14 Bit
)
RE0-3
DTMF
Generator DTMF
PM1 DTMF DTCR
PLL
+
_
-
+
-
+
OPP2 OPN2 OPP3 OPN3 OPO3
1.15V
OPP1
RC1
RE3
RC0
VDD
VSS
PORT RF0-3
W742S82A
Publication Release Date: June 1, 2005
- 7 - Revision A1
6. ABSOLUTE MAXIMUM RATINGS
PARAMETER RATING UNIT
Supply Voltage to Ground Potential -0.3 to +7.0 V
Applied Input/Output Voltage -0.3 to +7.0 V
Power Dissipation 120 mW
Ambient Operating Temperature 0 to +70 °C
Storage Temperature -55 to +150 °C
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability
of the device.
7. DC CHARACTERISTICS
7.1 DC CHARACTERISTICS: VDD-VSS=3.0V
(VDD-VSS = 3.0 V, Fm = 3.60MHz, Fs = 32.768 KHz, Ta = 25° C, LCD on; unless otherwise specified)
PARAMETER SYM. CONDITIONS MIN. TYP. MAX. UNIT
VDD1 Slow mode and normal
mode operation(3.60Mhz) 2.2 - 5.5
Op. Voltage
VDD2 Slow mode and normal
mode operation(7.20Mhz) 3.2 - 5.5
V
Op. Current (Crystal type) IOP1
No load
All OpAmps disabled
In dual-clock normal
operation(3.60Mhz).
- 0.7 1.0 mA
Op. Current (Crystal type) IOP2
No load
All OpAmps disabled
In dual-clock normal
operation(7.20Mhz).
- 1.1 1.5 mA
Op. Current (Crystal type) IOP3
No load
All OpAmps disabled
In dual-clock Fslow
operation and Ffast is
stopped
- 45 65 µA
Op. Current (Crystal type) IOP4
No load All OpAmps
enabled
In dual-clock Fslow
operation and Ffast is
stopped
- 70 80 µA
W742S82A
- 8 -
DC CHARACTERISTICS: VDD-VSS=3.0V, continued.
PARAMETER SYM. CONDITIONS MIN. TYP. MAX. UNIT
Hold Current (Crystal
type) IHM1
Hold mode No load All
OpAmps disabled
In dual-clock normal
operation
- 310 450 µA
Hold Current (Crystal
type) IHM3
Hold mode No load
All OpAmps disabled
In dual-clock Fslow
operation and Ffast is
stopped
- 45 55 µA
Hold Current (Crystal
type) IHM4
Hold mode No load
All OpAmps enabled
In dual-clock Fslow
operation and Ffast is
stopped
- 70 80 µA
Stop Current (Crystal
type) ISM1
Stop mode No load
All OpAmps disabled
LVR enabled
LCD driver should be
turned off
- 12 15 µA
Stop Current (Crystal
type) ISM2
Stop mode No load
All OpAmps disabled
LVR disabled
LCD driver should be
turned off
- - 1 µA
Input Low Voltage VIL - VSS - 0.3VDD V
Input High Voltage VIH - 0.7V
DD - VDD V
MFP Output Low Voltage VML IOL = 3.5mA - - 0.4 V
MFP Output High Voltage VMH IOH = 3.5mA 2.4 - - V
Port RA, RB, RD and RF
Output Low Voltage VABL IOL = 2.0mA - - 0.4 V
Port RA, RB, RD and RF
Output high Voltage VABH IOH = 2.0mA 2.4 - - V
LCD Supply Current ILCD All Seg. ON - - 6 µA
Port RE Sink Current IEL VOL = 0.9V 9 - - mA
Port RE Source Current IEH VOH = 2.4V 0.4 1.2 - mA
DTMF Output DC level VTDC RL=5KΩ, VDD=2.5 to 3.8V 1.1 - 2.8 V
W742S82A
Publication Release Date: June 1, 2005
- 9 - Revision A1
DC CHARACTERISTICS: VDD-VSS=3.0V, continued.
PARAMETER SYM. CONDITIONS MIN. TYP. MAX. UNIT
DTMF Distortion THD RL=5KΩ, VDD=2.5 to 3.8V - -30 -23 dB
DTMF Output Voltage VTO Low group, RL=5KΩ 130 150 170 mVrms
Pre-emphasis Col/Row 1 2 3 dB
Pull-up Resistor RC Port RC 100 350 1000 KΩ
Pull-up Resistor RA Port RA 100 350 1000 KΩ
Pull-up Resistor RB Port RB 100 350 1000 KΩ
RES Pull-up Resistor RRES - 100 350 1000 KΩ
Input Leakage
Current IIN Vss≤VIN ≤VDD - - 1 µA
Input Resistance RIN 10 - - MΩ
OP-
AMPs
Input Offset
Voltage VOS - - 25 mV
Maximum
Capacitive Load CL - - 20 pF
OP3
Minimum
Resistive Load RL 1000 - - KΩ
W742S82A
- 10 -
7.2 DC CHARACTERISTICS: VDD-VSS=3.6V
(VDD-VSS = 3.6 V, Ffast = 3.60MHz, Fslow = 32.768 KHz, Ta = 25° C, LCD on; Power-on reset circuit
active, unless otherwise specified)
PARAMETER SYM. CONDITIONS MIN. TYP. MAX. UNIT
Op. Current (Crystal type) IOP1
No load (Ext-V)
All OpAmps disabled
In dual-clock normal
operation.
- 0.8 1.0 mA
Op. Current (Crystal type) IOP2
No load
All OpAmps disabled
In dual-clock normal
operation(7.20Mhz).
- 1.3 1.8 mA
Op. Current (Crystal type) IOP3
No load (Ext-V)
All OpAmps disabled
In dual-clock Fslow
operation and Ffast is
stopped
- 45 65
µA
Op. Current (Crystal type) IOP4
No load (Ext-V)
All OpAmps enabled
In dual-clock Fslow
operation and Ffast is
stopped
- 80 85
µA
Hold Current (Crystal
type) IHM1
Hold mode No load
(Ext-V)
All OpAmps disabled
In dual-clock normal
operation
- 360 450
µA
Hold Current (Crystal
type) IHM3
Hold mode No load
(Ext-V)
All OpAmps disabled
In dual-clock Fslow
operation and Ffast is
stopped
- 55 65
µA
Hold Current (Crystal
type) IHM4
Hold mode No load
(Ext-V)
All OpAmps enabled
In dual-clock Fslow
operation and Ffast is
stopped
- 80 85
µA
W742S82A
Publication Release Date: June 1, 2005
- 11 - Revision A1
DC CHARACTERISTICS:VDD-VSS=3.6V, continued.
PARAMETER SYM. CONDITIONS MIN. TYP. MAX. UNIT
Stop Current (Crystal
type) ISM1
Stop mode No load
All OpAmps disabled
LVR enabled
LCD driver should be
turned off
- 12 15
µA
Stop Current (Crystal
type) ISM2
Stop mode No load
All OpAmps disabled
LVR disabled
LCD driver should be
turned off
- - 1
µA
8. AC CHARACTERISTICS
PARAMETER SYM. CONDITIONS MIN. TYP. MAX. UNIT
Op. Frequency FOSC PLL type - 3.6/7.2 - MHz
Instruction cycle time TI One machine cycle - 4/FOSC - S
Reset Active Width TRAW FOSC=32.768 KHz 1 - - µS
Interrupt Active Width TIAW FOSC=32.768 KHz 1 - - µS
W742S82A
- 12 -
9. APPLICATIONS INFORMATION
9.1 Operating Voltage
The chip can be operated from 2.2V-5.5V(Ffast1:3.60Mhz). If users have much consideration for low
power operation, lower voltage supply system can be a better choice.
9.2 FSK Signal Detection and FSK Demodulation
9.2.1 FSK Signal Detection
Figure 9-1 is a typical application circuit for FSK signal detection and FSK demodulation. For purpose
of signal detection, user should enable both OP2 and OP3, output low to control and sense the signal
by RC.n.
9.2.2 FSK demodulation
For purpose of FSK demodulation, user should enable both OP2 and OP3, output high to control, and
sense the FSK signal by RC.n. and demodulate FSK by software.
Figure 9-1 Application Circuit for FSK Signal Detection and FSK demodulation
W742S82A
Publication Release Date: June 1, 2005
- 13 - Revision A1
10. REVISION HISTORY
VERSION DATE PAGE DESCRITION
A1 Jun 1, 2005 - Initial Issued
Important Notice
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use or sales.
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No. 4, Creation Rd. III,
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TEL: 886-3-5770066
FAX: 886-3-5665577
http://www.winbond.com.tw/
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TEL: 886-2-8177-7168
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Please note that all data and specifications are subject to change without notice.
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200336 China
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