IRF520NPbF
HEXFET® Power MOSFET
PD - 94818
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power
MOSFETs are well known for, provides the designer
with an extremely efficient and reliable device for use
in a wide variety of applications.
The TO-220 package is universally preferred for all
commercial-industrial applications at power dissipation
levels to approximately 50 watts. The low thermal
resistance and low package cost of the TO-220
contribute to its wide acceptance throughout the
industry.
S
D
G
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 9.7
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 6.8 A
IDM Pulsed Drain Current 38
PD @TC = 25°C Power Dissipation 48 W
Linear Derating Factor 0.32 W/°C
VGS Gate-to-Source Voltage ± 20 V
EAS Single Pulse Avalanche Energy91 mJ
IAR Avalanche Current5.7 A
EAR Repetitive Avalanche Energy4.8 mJ
dv/dt Peak Diode Recovery dv/dt 5.0 V/ns
TJOperating Junction and -55 to + 175
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
°C
Mounting torque, 6-32 or M3 srew 10 lbf•in (1.1N•m)
Absolute Maximum Ratings
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 3.1
RθCS Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W
RθJA Junction-to-Ambient ––– 62
Thermal Resistance
VDSS = 100V
RDS(on) = 0.20Ω
ID = 9.7A
T
O
-22
0
AB
Advanced Process Technology
Dynamic dv/dt Rating
175°C Operating Temperature
Fast Switching
Fully Avalanche Rated
Description
11/5/03
Lead-Free
IRF520NPbF
Parameter Min. Typ. Max. Units Conditions
ISContinuous Source Current MOSFET symbol
(Body Diode) ––– ––– showing the
ISM Pulsed Source Current integral reverse
(Body Diode) ––– ––– p-n junction diode.
VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 5.7A, VGS = 0V
trr Reverse Recovery Time ––– 99 150 ns TJ = 25°C, IF = 5.7A
Qrr Reverse RecoveryCharge ––– 390 580 nC di/dt = 100A/µs
Source-Drain Ratings and Characteristics
S
D
G
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 100 ––– ––– V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJBreakdown Voltage Temp. Coefficient ––– 0.11 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– ––– 0.20 ΩVGS = 10V, ID = 5.7A
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
gfs Forward Transconductance 2.7 ––– ––– S VDS = 50V, ID = 5.7A
––– ––– 25 µA VDS = 100V, VGS = 0V
––– ––– 250 VDS = 80V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -100 nA VGS = -20V
QgTotal Gate Charge ––– ––– 25 ID = 5.7A
Qgs Gate-to-Source Charge ––– ––– 4.8 nC VDS = 80V
Qgd Gate-to-Drain ("Miller") Charge ––– ––– 11 VGS = 10V, See Fig. 6 and 13
td(on) Turn-On Delay Time ––– 4.5 ––– VDD = 50V
trRise Time ––– 23 ––– ID = 5.7A
td(off) Turn-Off Delay Time ––– 32 ––– RG = 22Ω
tfFall Time ––– 23 ––– RD = 8.6Ω, See Fig. 10
Between lead,
––– ––– 6mm (0.25in.)
from package
and center of die contact
Ciss Input Capacitance ––– 330 ––– VGS = 0V
Coss Output Capacitance ––– 92 ––– pF VDS = 25V
Crss Reverse Transfer Capacitance ––– 54 ––– ƒ = 1.0MHz, See Fig. 5
nH
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
LDInternal Drain Inductance
LSInternal Source Inductance ––– –––
S
D
G
IGSS
ns
4.5
7.5
IDSS Drain-to-Source Leakage Current
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
ISD ≤ 5.7A, di/dt ≤ 240A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
Notes:
VDD = 25V, starting TJ = 25°C, L = 4.7mH
RG = 25Ω, IAS = 5.7A. (See Figure 12)
Pulse width ≤ 300µs; duty cycle ≤ 2%.
9.7
38
A
IRF520NPbF
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 2. Typical Output Characteristics
1
10
100
0.1 1 10 100
I , Drain-to-Source Current (A)
D
V , Drain-to-Source Voltage (V)
DS
VGS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4. 5V
20µs PULSE WIDTH
T = 25°C
C
A
4.5V
1
10
100
0.1 1 10 100
4.5V
I , Drain-to-Source Current (A)
D
V , Drain-to-Source Voltage (V)
DS
VGS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
20µs PULSE WIDTH
T = 175°C
C
A
1
10
100
45678910
T = 25°C
J
GS
V , Gate-to-Source Voltage (V)
D
I , Drain-to-Source Current (A)
V = 50V
20µs PULSE WIDTH
DS
T = 175°C
J
A
0.0
0.5
1.0
1.5
2.0
2.5
3.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
J
T , Junction Temperature (°C)
R , Drain-to-Source On Resistance
DS(on)
(Normalized)
V = 10V
GS
A
I = 9.5A
D
IRF520NPbF
Fig 7. Typical Source-Drain Diode
Forward Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
0
100
200
300
400
500
600
1 10 100
C, Capacitance (pF)
DS
V , Drain-to-Source Voltage (V)
A
V = 0V, f = 1MHz
C = C + C , C SHORTED
C = C
C = C + C
GS
iss gs gd ds
rss gd
oss ds gd
C
iss
C
oss
C
rss
0
4
8
12
16
20
0 5 10 15 20 25
Q , Total Gate Charge (nC)
G
V , Gate-to-Source Voltage (V)
GS
V = 80V
V = 50V
V = 20V
DS
DS
DS
A
FOR TEST CIRCUIT
SEE FIGURE 13
I = 5.7A
D
1
10
100
0.4 0.6 0.8 1.0 1.2 1.4
T = 25°C
J
V = 0V
GS
V , Source-to-Drain Voltage (V)
I , Reverse Drain Current (A)
SD
SD
A
T = 175°C
J
0.1
1
10
100
1 10 100 1000
V , Drain-to-Source Voltage (V)
DS
I , Drain Current (A)
OPERATION IN THIS AREA LIMITED
BY R
D
DS(on)
10µs
100µs
1ms
10ms
T = 25°C
T = 175°C
Single Pulse
C
J
IRF520NPbF
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10a. Switching Time Test Circuit
VDS
90%
10%
VGS
t
d(on)
t
r
t
d(off)
t
f
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10b. Switching Time Waveforms
RD
VGS
RG
D.U.T.
10V
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
+
-
VDD
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
1 2
JDM thJC C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response (Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
25 50 75 100 125 150 175
0.0
2.0
4.0
6.0
8.0
10.0
T , Case Temperature ( C)
I , Drain Current (A)
°
C
D
IRF520NPbF
Fig 12a. Unclamped Inductive Test Circuit
V
DS
L
D.U.T.
V
DD
I
AS
t
p
0.01Ω
R
G
+
-
tp
VDS
IAS
VDD
V(BR)DSS
10 V
Fig 12b. Unclamped Inductive Waveforms
D.U.T. V
DS
I
D
I
G
3mA
V
GS
.3µF
50KΩ
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
Fig 13b. Gate Charge Test Circuit
Q
G
Q
GS
Q
GD
V
G
Charge
10 V
Fig 13a. Basic Gate Charge Waveform
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
0
40
80
120
160
200
25 50 75 100 125 150 175
J
E , Single Pulse Avalanche Energy (mJ)
AS
A
Starting T , Junction Temperature (°C)
V = 25V
I
TOP 2.3A
4.0A
BOTTOM 5.7A
DD
D
IRF520NPbF
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P. W .
Period
+
-
+
+
+
-
-
-
Fig 14. For N-Channel HEXFETS
* VGS = 5V for Logic Level Devices
Peak Diode Recovery dv/dt Test Circuit
RG
VDD
• dv/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
*
IRF520NPbF
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.11/03
Data and specifications subject to change without notice.
LEAD ASSIGNMENTS
1 - GATE
2 - DRA IN
3 - SOURCE
4 - DRA IN
- B -
1.32 (.052)
1.22 (.048)
3X 0.55 (.022)
0.46 (.018)
2.92 (.115)
2.64 (.104)
4.69 (.185)
4.20 (.165)
3X 0.93 (.037)
0.69 (.027)
4.06 (.160)
3.55 (.140)
1.15 (.045)
MIN
6.47 (.255)
6.10 (.240)
3.78 (.149)
3.54 (.139)
- A -
10.54 (.415)
10.29 (.405)
2.87 (.113)
2.62 (.103)
15.24 (.600)
14.84 (.584)
14.09 (.555)
13.47 (.530)
3X 1.40 (.055)
1.15 (.045)
2.54 (.100)
2X
0.36 (.014) M B A M
4
1 2 3
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
HEXFET
1- GATE
2- DRAIN
3- SOURCE
4- DRAIN
LEAD ASSIGNMENTS
IGBTs, CoPACK
1- GATE
2- COLLECTOR
3- EMITTER
4- COLLECTOR
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
TO-220AB Part Marking Information
EXAMPLE:
IN THE ASSEMBLY LINE "C"
THIS IS AN IRF1010
LOT CODE 1789
ASSEMBLED ON WW 19, 1997 PART NUMBER
ASSEMBLY
LOT CODE
DATE CODE
YEAR 7 = 1997
LINE C
WEEK 19
LOGO
RECTIFIER
IN TERN ATIO N AL
Note: "P" in assembly line
position indicates "Lead-Free"
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/