International Rectifier HEXFET Power MOSFET Surface Mount @ Available in Tape & Reel @ Dynamic dv/dt Rating Repetitive Avalanche Rated 175C Operating Temperature Fast Switching Ease of Paralleling Description Third Generation HEXFETs from International Rectifier provide the designer with the best combination of fast switching, ruggedized device design, low PD-9.898 IRF540S Voss = 100V Rpsion) = 0.0772 Ip = 28A on-resistance and cost-effectiveness. The SMD-220 is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The SMD-220 is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. Absolute Maximum Ratings SMD-220 Parameter Max. Units lp @ Tc=25C _| Continuous Drain Current, Ves @ 10 V 28 Ip @ Tc = 100C | Continuous Drain Current, Veg @ 10 V 20 A lom Pulsed Drain Current 110 Pp @ Tc =25C__| Power Dissipation 150 Ww Po @ Ta=25C_ | Power Dissipation (PCB Mount)** 3.7 Linear Derating Factor 1.0 wre Linear Derating Factor (PCB Mount)** 0.025 Vas Gate-to-Source Voltage +20 Vv Eas Single Pulse Avalanche Energy 230 mJ lar Avalanche Current 28 A Ear Repetitive Avalanche Energy 15 mJ dv/dt Peak Diode Recovery dv/dt @ 5.5 Vins Tu, Tsta Junction and Storage Temperature Range -5 to +175 C Soldering Temperature, for 10 seconds 300 (1.6mm from case) Thermal Resistance Parameter Min. Typ. Max. | Units Resc Junction-to-Case _ _ 1.0 Resa Junetion-to-Ambient (PCB mount)** _ _ 40 CW | Rea Junction-to-Ambient _ = 62 * When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994., 155IRF540S Electrical Characteristics @ T) = 25C (unless otherwise specified) Parameter Min. | Typ. | Max. | Units | Test Conditions Vierybss Drain-to-Source Breakdown Voltage 100 | _ V__ | Ves=0V, In= 250A AV(erypss/ATy| Breakdown Voltage Temp. Coefficient _| 0.13 | | V/C | Reference to 25C, ip= 1mA Rosjon) Static Drain-to-Source On-Resistance _- |0.077) Q | Ves=10V, lb=17A @ Vesith) Gate Threshold Voltage 2.0 _ 4.0 V__ | Vops=Ves, lo= 250nA is Forward Transconductance 8.7 _ => S| Vps=50V, Ip=17A ipss Drain-to-Source Leakage Current =} | 28 pA Voe=100V, Vas=0V _ _ 250 Vos=80V, Vas=0V, Ty=150C less Gate-to-Source Forward Leakage _ | 100 nA Ves=20V Gate-to-Source Reverse Leakage = | -100 Ves=-20V Qg Total Gate Charge . _ _ 72 Ip=17A Qgs Gate-to-Source Charge | [| 11 | nC | Vps=s0v Qga Gate-to-Drain ("Miller") Charge _ _ 32 Vas=10V See Fig. 6 and 13 td(on) Turn-On Delay Time = 11 = Vpp=50V t, Rise Time 44 ns Ilp=17A tayorty Turn-Off Delay Time => 53 _ Ra=9.12 tr Fall Time _ 43 _ Ro=2.90 See Figure 10 Lo internal Drain Inductance _- 4.5 Baio. peas ) g nH | from package (fa Ls Internal Source Inductance | 75] and center of die contact $ Ciss Input Capacitance |1700| Ves=0V Coss Output Capacitance | 560} PF | Vps=25V Coss Reverse Transfer Capacitance | 120; f=1.0MHz See Figure 5 Source-Drain Ratings and Characteristics Parameter Min. | Typ. | Max. | Units Test Conditions Is Continuous Source Current _ _ 28 MOSFET symbol o (Body Diode) A showing the Ism Pulsed Source Current _ | 410 integral reverse a (Body Diode) p-n junction diode. 8 Vsp Diode Forward Voltage _ _ 2.5 Vi | Ty=25C, Ig=28A, Ves=0V ter Reverse Recovery Time | 180 | 360 | ns | Ty=25C, IF=17A Qn Reverse Recovery Charge = 1.3 | 2.8 | pO | di/dt=100A/is ton Forward Turn-On Time Intrinsic turn-on time is neglegible (turn-on is dominated by Ls+Lp) Notes: Repetitive rating; pulse width limited by Isps28A, di/dts170A/us, Vop<V(BR)pss, max. junction temperature (See Figure 11) Tys175C Vop=25V, starting Ti=25C, L=440uH @ Pulse width < 300 ys; duty cycle <2%. Re=25Q, las=28A (See Figure 12) 156lp, Drain Current (Amps) Ip, Drain Current (Amps) 20us PULSE WIDTH Te = 25C 1074 104 Vps, Drain-to-Source Voltage (volts) Fig 1. Typical Output Characteristics, Tc=25C Vpg = SOV 20us_ PULSE WIDTH Veg, Gate-to-Source Voltage (volts) Fig 3. Typical Transfer Characteristics Roscon); Drain-to-Source On Resistance lp, Drain Current (Amps) (Normalized) w 2 ~ me i IRF540S 20us WIDTH Te = 175C Vos, Drain-to-Source Voltage (volts) Fig 2. Typical Output Characteristics, To=175C Veg = 10V 100 120 140-160 180 Ty, Junction Temperature (C) Fig 4. Normalized On-Resistance Vs. Temperature 157IRF540S | 600 3000 - 20 Cgg + Cg, Cag SHORTED C Cod o Cas + = 16 o om i x & 1600 Ciss > 12 8 2 c = s 5 5 6 1200 O 4 2. 8 s * Oo 2 ws oO a oO > Cag SEE FIGURE 13 : 0 0 i 400 10! 10 Vps, Drain-to-Source Voltage (volts) Qg, Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs. Drain-to-Source Voltage Gate-to-Source Voltage 103 _~ GPEAATION IN THIS AREA LIMITED e 5 BY A Q DS (ON) E < Q@ 2 < g <= 102 B Oo o & & oO ~ Aa Oe c 8 S ped 10 & Oo 3 a 5 Ka + Aa g T e Tys1759C SINGLE Vgg = OV i . 1 6 0 42 5 1 2 Ss 10 ry 5 1072 5 4032 5 404 Vsp, Source-to-Drain Voltage (volts) Vps, Drain-to-Source Voltage (volts) Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area Forward Voltage 158IRF540S Ip, Drain Current (Amps) \Tiov Pulse Width < tps Outy Factor < 0.1% eg 50 75 100 125 450 175 Tc, Case Temperature (C) Fig 9. Maximum Drain Current Vs. Fig 10b. Switching Time Waveforms Case Temperature 10 Thermal Response (Zp,jc) O.1 FO LD free SINGLE PULSE OTES: D NOTES: (THERMAL RESPONSE) 4. DUTY FACTOR, D=t1/t2 2. PEAK Ty=Ppw x Zthyc + To 410 406 1074 103 1078 0.4 4 10 t;, Rectangular Pulse Duration (seconds) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 159IRF540S | Vary tp to obtain YDS > required las 600 > 500 => > 400 wo c 1 wi . . Ata it @ 300 Fig 12a. Unclamped Inductive Test Circuit 3 a 2 200 = ao Q 100 Ww = 25v Vos 0 25 50 75 100 125 150 175 Starting Tj, Junction Temperature(C) lag ee Fig 12e. Maximum Avalanche Energy Fig 12b. Unclamped Inductive Waveforms Vs. Drain Current Current Regulator tov ae aaa on tbe tg K [ [Ses yr See . i Ve ama ff] + Vps Pt Ig 3 Ip Charge > Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit Appendix A: Figure 14, Peak Diode Recovery dv/dt Test Circuit - See page 1505 Appendix B: Package Outline Mechanical Drawing - See page 1507 Appendix C: Part Marking Information See page 1515 International Appendix D: Tape & Reel Information See page 1519 Rectifier 160