MAX1232 Microprocessor Monitor General Description The MAX1232 microprocessor (uP) supervisory circuit provides pP "housekeeping" and power-supply super- vision functions while consuming only 1/10th the power of the DS1232. The MAX1232 enhances circuit reliability in uP systems by monitoring the power supply, monitoring software execution, and providing a debounced manual reset input. The MAX1232 is a plug-in upgrade of the Dallas DS1232. A reset pulse of at least 250ms duration is supplied on power-up, power-down, and low-voltage brown-out con- ditions (5% or 10% supply tolerances can be selected digitally). Also featured is a debounced manual reset input that forces the reset outputs to their active states for a minimum of 250ms. A digitally-programmable watchdog timer monitors software execution and can be programmed for timeout settings of 150ms, 600ms, or 1.2sec. The MAX1232 requires no external components. Applications Computers Controllers Intelligent Instruments Automotive Systems Critical u4P Power Monitoring Block Diagram PAAXLAA MAX1232 Vec 7 5%/10% AST ToL| | TOLERANCE RESET B HL_SELECT | GENERATOR REF [AST +) DEBOUNCE 7D] |waTcHDOG ST H| TIMEBASE warepos SELECT GND L MA AAL/VI Features @ Consumes 1/10th the Power of the DS1232 @ Precision Voltage Monitor - Adjustable +4.5V or +4.75V @ Power Ok/Reset Pulse Width - 250ms Min @ No External Components @ Adjustable Watchdog Timer - 150ms, 600ms, or 1.2sec @ Debounced Manual Reset Input for External Overide @ Available in 8-pin DIP/Small Outline and 16-pin Wide Small Outline Packages Ordering Information PART TEMP. RANGE PIN-PACKAGE MAX1232CPA OC to +70C 8 Plastic DIP MAX1232CSA 0C to +70C 8S0 MAX1232CWE 0C to +70C 16 Wide SO MAX1232C/D 0C to +70C Dice* MAX1232EPA -40C to +85C 8 Plastic DIP MAX1232ESA -40C to +85C 8S0 MAX1232EWE -40C to +85C 16 Wide SO MAX 1232MJA -55C to +125C 8 CERDIP * Contact factory for dice specifications. Pin Configuration | 5 | TOP VIEW oS PBRST [4 LM re} vec (2) maxizse [2] ToL [3] [6] RST GND [4] Bis DIP/SO ne [a] He] NC PORST 2) An avcian [15] Yoo NC. [3] MAX1232 [14] NC To [4] 13] ST NC. [5] 12] NC. ToL [6| 4] RST NC. [7] HO] N.C. GND [a [9] Rst WIDE SO MA XIV mUAxzxtitsvi is a registered trademark of Maxim integrated Products. Maxim Integrated Products 5-11 cEclXVNMAX1232 MAX1232 Microprocessor Monitor ABSOLUTE MAXIMUM RATINGS Voltage on any pin (with respect to GND) ......... -1V to +7V Operating Temperature Ranges: MAXK1232C_ ees O'C to +70C MAX1232E_ ee ee -40C to +85C MAX1232M__ oe eee -55C to +125C Storage Temperature Range Lead Temperature (Soldering, 10 sec.) cee ee 65C to +160C .. 300C. Stresses beyond those listed under Absolute Maximum Ratings* may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. RECOMMENDED D.C. OPERATING CONDITIONS (Ta = TMIN to TMAX) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Supply Voltage Voc 45 5.0 5.5 Vv ST and PB RST input High Level (Note 1) Vin 2.0 Vec +03) ov ST and PB RST Input Low Level ViL -0.3 +0.8 Vv D.C. ELECTRICAL CHARACTERISTICS (TA = TMIN to TMAx: Vcc = +4.5V to +.5V) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Input Leakage ST, TOL Me -1.0 +1.0 pA Output Current RST loH VOH = 2.4V -1.0 -12 mA Output Current RST, RST lou VoL = 0.4V 2.0 10 mA Operating Current (Note 2) Icc 50 200 pA Voc 5% Trip Point (Note 3) Vecte TOL = GND 4.50 4.62 4.74 Vv Vcc 10% Trip Point (Note 3) Vecte TOL = Vcc 4.25 4.37 4.49 Vv 5-12 MAKI svMAX1232 Microprocessor Monitor CAPACITANCE (Note 4) = (Ta = +25C) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS > input Capacitance ST, TOL CIN 5 pF mh, Output Capacitance RST, RST Cout 7 pF N A.C. ELECTRICAL CHARACTERISTICS N (TA = TMIN to Tmax: Voc = +5V to 10%) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS PB RST (Note 5) PB Figure 3 20 ms PB RST Delay tpBD Figure 3 1 4 20 ms Reset Active Time tAST 250 610 1000 ms ST Pulse Width tsT Figure 4 75 ns Figure 4 _. ; TD pin = OV 62.5 150 250 ST Timeout Period tTp 7 ms TD pin = open 250 600 1000 TO pin = Vcc 500 1200 2000 Vcc Fall Time (Note 4) tr Figure 5 10 us Vcc Rise Time (Note 4) tR Figure 6 0 ps Vc Detect to RST High tRPD Figure 7, Vcc falling 100 ns vee Rerun inote 6) tRPU Figure 8, Vcc rising 250 610 1000 ms Note 1: PB RST is internally pulled up to Vcc with an internal impedance of typically 40kQ. Note 2: Measured with outputs open. Note 3: All voltages referenced to GND. Note 4: Guaranteed by design. Note 5: PB RST must be held tow for a minimum of 20ms to guarantee a reset. Note 6: ta = Sus. IWAKISVI 5-13MAX1232 MAX1232 Microprocessor Monitor Pin Description NAME FUNCTION Pushbutton Reset Input. A debounced active-low PB RST input that ignores pulses less than ims in duration and is guaranteed to recognize inputs of 20ms or greater. Time Delay Set. The watchdog timebase select TD input (tip = 150ms for TD = OV, trp = 600ms for TD = open, ttp = 1.2sec for TD = Vcc). TOL Tolerance input. Connect to GND for 5% tolerance or to Vcc for 10% tolerance. GND | Ground Reset Output (Active High) - goes active: If Vcc falls below the selected reset voltage threshold RST 2. If PB RST is forced low 3. If ST is not strobed within the minimum timeout period 4. During power-up RST Reset Output (Active Low, Open Drain) - see RST. ST Strobe Input. Input for watchdog timer. Vcc The +5V Power-Supply Input NC. No Connect Detailed Description Power Monitor A voltage detector monitors Vcc and holds the reset outputs (RST and RST) in their active states whenever Vcc is below the selected 5% or 10% tolerance (4.62V or 4.37V typically). To select the 5% level, connect TOL to ground. To select the 10% level, connect TOL to Vcc. The reset outputs will remain in their active states until Vcc has been continuously in-tolerance for a minimum of 250ms (the reset active time) to allow the power supply and pP to stabilize. The RST output both sinks and sources current, while the RST output, an open-drain MOSFET, sinks current only and must be pulled high. Pushbutton Reset Input The MAX1232's debounced manual reset input (PB RST) manually forces the reset outputs into their active states. The reset outputs go active after PB RST has been held low for a time tpBD, the pushbutton reset delay time. The reset outputs remain in their active states for a minimum of 250ms after PB RST rises above VIH (Figure 3). 5-14 A mechanical pushbutton or an active logic signal can drive the PB RST input. The debounced input ignores input pulses less than 1ms and is guaranteed to recog- nize pulses of 20ms or greater. The PB RST input has an internal pull-up to Vcc of about 100pA; therefore, an external pull-up resistor is not necessary. Watchdog Timer The pP drives the ST input with an Input/Output (I/O) line. The pP must toggle the ST input within a set period (as determined by TD) to verify proper software execution. If a hardware or software failure keeps ST from toggling within the minimum timeout period - ST is activated only by falling edges (a high-to-iow transition) - the MAX1232 reset outputs are forced to their active states for 250ms (Figure 2). This typically initiates the pPs power-up routine. If the interruption continues, new reset pulses are generated each timeout period until ST is strobed. The timeout period is determined by the TD input connection. This timeout period is typically 150ms with TD connected to GND, 600ms with TD floating, or 1200ms with TD connected to Vcc. The software routine that strobes ST is critical. The code must be in a section of software that executes frequently enough so the time between toggles is less than the watchdog timeout period. One common technique con- trols the pP I/O line from two sections of the program. The software might set the I/O line high while operating in the foreground made and set it low while in the background or interrupt mode. If both modes do not execute correctly, the watchdog timer issues reset pulses. Voc 1D O] PRRST aT yo AAAXIAA MICROPROCESSOR MAX, 282 RST RESET GND TOL Figure 1. Pushbutton Reset SAA AKI SVIMAX 1232 Microprocessor Monitor +5V +8V 7805 5V {acteamna, Fp vec RST |-#-] RESET REGULATOR = | | ana | uF MAX1232 MICROPROCESSOR STE vo TD TOL GND a tst cECLXVUN tb NOTE: tro !S THE MAXIMUM ELAPSED TIME BETWEEN ST HIGH-TO-LOW TRANSITIONS (ST IS ACTIVATED BY FALLING EDGES ONLY) WHICH WILL KEEP THE WATCHD! 06 TIMER FROM FORCING THE RESET OUTPUTS ACTIVE FOR A TIME OF trst trp |S A FUNCTION OF THE VOLTAGE AT THE TD PIN, AS TABULATED BELOW. tn CONDITON MIN Tye MAX TO pin =0V 62.5ms 150ms 250ms TO pin= open 250ms 600ms + 1000ms TO pin = Voc 500ms = 1200ms = 2000ms Figure 2. Watchdog Timer Figure 4. Watchdog Strobe Input tRST- Vec +4.7SV +4.25V A Figure 3. Pushbutton Reset.The debounced PB RST input ignores input pulses less than ims and is guaranteed to recognize pulses of 20ms or greater. MUA AKIsVI Figure 5. Power-Down Slew Rate 5-15MAX1232 MAX1232 Microprocessor Monitor +4,75V (5% TRIP POINT) i | 44.5V (10% TRIP POINT) Vec +4,75V IRPU RST +4.25V Vou Voc RST Vou Figure 6. Power-Up Slew Rate Figure 8. Vcc Detect Reset Output Delay (Power-Up) Chip Topography PB RST Vcc Vcc +4.5V (5% TRIP POINT) +4.25V (10% TRIP POINT) A Voc SLEW RATE = 1.66mVAusec (0.5V/300usec) Figure 7. Vcc Detect Reset Output Delay (Power-Down) 0.099" (2.51 mm) (178 mm) Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No citcuil patent licenses are implied. Maxim reserves the right to change the circuitry and specitications without notice at any time. 5-16 VIA KIS