LMV344MTXNOPB - NATIONAL SEMICONDUCTOR

LMV341,LMV342,LMV344

LMV341/LMV342/LMV344 Single with Shutdown/Dual/Quad General Purpose,

2.7V,Rail-to-Rail Output, 125C, Operational Amplifiers

Literature Number: SNOS990F

January 25, 2008

LMV341/LMV342/LMV344

Single with Shutdown/Dual/Quad General Purpose, 2.7V,

Rail-to-Rail Output, 125°C, Operational Amplifiers

General Description

The LMV341/LMV342/LMV344 are single, dual, and quad low

voltage, low power Operational Amplifiers. They are designed

specifically for low voltage portable applications. Other im-

portant product characteristics are low input bias current, rail-

to-rail output, and wide temperature range.

The patented class AB turnaround stage significantly reduces

the noise at higher frequencies, power consumption, and off-

set voltage. The PMOS input stage provides the user with

ultra-low input bias current of 20fA (typical) and high input

impedance.

The industrial-plus temperature range of −40°C to 125°C al-

lows the LMV341/LMV342/LMV344 to accommodate a broad

range of extended environment applications. LMV341 ex-

pands National Semiconductor's Silicon Dust™ amplifier port-

folio offering enhancements in size, speed, and power

savings. The LMV341/LMV342/LMV344 are guaranteed to

operate over the voltage range of 2.7V to 5.5V and all have

rail-to-rail output.

The LMV341 offers a shutdown pin that can be used to disable

the device. Once in shutdown mode, the supply current is re-

duced to 45pA (typical). The LMV341/LMV342/LMV344 have

29nV Voltage Noise at 10KHz, 1MHz GBW, 1.0V/μs Slew

Rate, 0.25mVos, and 0.1μA shutdown current (LMV341.)

The LMV341 is offered in the tiny 6-Pin SC70 package, the

LMV342 in space saving 8-Pin MSOP and SOIC, and the

LMV344 in 14-Pin TSSOP and SOIC. These small package

amplifiers offer an ideal solution for applications requiring

minimum PC board footprint. Applications with area con-

strained PC board requirements include portable electronics

such as cellular handsets and PDAs.

Features

(Typical 2.7V supply values; unless otherwise noted)

■Guaranteed 2.7V and 5V specifications

■Input referred voltage noise (@ 10kHz) 29nV/√Hz

■Supply current (per amplifier) 100μA

■Gain bandwidth product 1.0MHz

■Slew rate 1.0V/μs

■Shutdown Current (LMV341) 45pA

■Turn-on time from shutdown (LMV341) 5μs

■Input bias current 20fA

Applications

■Cordless/cellular phones

■Laptops

■PDAs

■PCMCIA/Audio

■Portable/battery-powered electronic equipment

■Supply current monitoring

■Battery monitoring

■Buffer

■Filter

■Driver

Sample and Hold Circuit

20030444

Silicon Dust™ is a trademark of National Semiconductor Corporation.

LMV341/LMV342/LMV344 Single with Shutdown/Dual/Quad General Purpose, 2.7V, Rail-to-Rail

Output, 125°C, Operational Amplifiers

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

ESD Tolerance (Note 2)

Machine Model 200V

Human Body Model 2000V

Differential Input Voltage ± Supply Voltage

Supply Voltage (V + -V −)6.0V

Output Short Circuit to V + (Note 3)

Output Short Circuit to V − (Note 4)

Storage Temperature Range −65°C to 150°C

Junction Temperature (Note 5) 150°C

Mounting Temperature

Infrared or Convection Reflow

(20 sec.) 235°C

Wave Soldering Lead Temp.

(10 sec.) 260°C

Operating Ratings (Note 1)

Supply Voltage 2.7V to 5.5V

Temperature Range −40°C to 125°C

Thermal Resistance (θ JA)

6-Pin SC70 414°C/W

8-Pin SOIC 190°C/W

8-Pin MSOP 235°C/W

14-Pin TSSOP 155°C/W

14-Pin SOIC 145°C/W

2.7V DC Electrical Characteristics (Note 10)

Unless otherwise specified, all limits guaranteed for TJ = 25°C, V+ = 2.7V, V− = 0V, VCM = V+/2, VO = V+/2 and RL > 1MΩ. Boldface

limits apply at the temperature extremes.

Symbol Parameter Conditions Min

(Note 7)

Typ

(Note 6)

Max

(Note 7)

Units

VOS Input Offset Voltage LMV341 0.25 4

4.5 mV

LMV342/LMV344 0.55 5

5.5

TCVOS Input Offset Voltage Average

Drift

1.7 µV/°C

IBInput Bias Current 0.02 120

250

IOS Input Offset Current 6.6 fA

ISSupply Current Per Amplifier 100 170

230

μA

Shutdown Mode, VSD = 0V

(LMV341)

45pA 1μA

1.5μA

CMRR Common Mode Rejection Ratio 0V ≤ VCM ≤ 1.7V

0V ≤ VCM ≤ 1.6V

80 dB

PSRR Power Supply Rejection Ratio 2.7V ≤ V+ ≤ 5V 65

82 dB

VCM Input Common Mode Voltage For CMRR ≥ 50dB 0 −0.2 to 1.9

(Range)

1.7 V

AVLarge Signal Voltage Gain RL = 10kΩ to 1.35V 78

113

RL = 2kΩ to 1.35V 72

103

VOOutput Swing RL = 2kΩ to 1.35V 24 60

RL = 10kΩ to 1.35V 5.0 30

5.3

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LMV341/LMV342/LMV344

Symbol Parameter Conditions Min

(Note 7)

Typ

(Note 6)

Max

(Note 7)

Units

IOOutput Short Circuit Current Sourcing

LMV341/LMV342

20 32

mASourcing

LMV344

18 24

Sinking 15 24

ton Turn-on Time from Shutdown (LMV341) 5 μs

VSD Shutdown Pin Voltage Range ON Mode (LMV341) 1.7 to 2.7 2.4 to 2.7 V

Shutdown Mode (LMV341) 0 to 1 0 to 0.8

2.7V AC Electrical Characteristics (Note 10)

Unless otherwise specified, all limits guaranteed for TJ = 25°C, V+ = 2.7V, V− = 0V, VCM = V+/2, VO = V+/2 and RL > 1MΩ.

Boldface limits apply at the temperature extremes.

Symbol Parameter Conditions Min

(Note 7)

Typ

(Note 6)

Max

(Note 7)

Units

SR Slew Rate RL = 10kΩ, (Note 9) 1.0 V/μs

GBW Gain Bandwidth Product RL = 100kΩ, CL = 200pF 1.0 MHz

ΦmPhase Margin RL = 100kΩ 72 deg

GmGain Margin RL = 100kΩ 20 dB

enInput-Referred Voltage Noise f = 1kHz 40 nV/

inInput-Referred Current Noise f = 1kHz 0.001 pA/

THD Total Harmonic Distortion f = 1kHz, AV = +1

RL = 600Ω, VIN = 1VPP

0.017 %

5V DC Electrical Characteristics (Note 10)

Unless otherwise specified, all limits guaranteed for TJ = 25°C, V+ = 5V, V− = 0V, VCM = V+/2, VO = V+/2 and R L > 1MΩ. Bold-

face limits apply at the temperature extremes.

Symbol Parameter Conditions Min

(Note 7)

Typ

(Note 6)

Max

(Note 7)

Units

VOS Input Offset Voltage LMV341 0.025 4

4.5 mV

LMV342/LMV344 0.70 5

5.5

TCVOS Input Offset Voltage Average

Drift

1.9 µV/°C

IBInput Bias Current 0.02 200

375

IOS Input Offset Current 6.6 fA

ISSupply Current Per Amplifier 107 200

260

μA

Shutdown Mode, VSD = 0V

(LMV341)

0.033 1

1.5

μA

CMRR Common Mode Rejection Ratio 0V ≤ VCM ≤ 4.0V

0V ≤ VCM ≤ 3.9V

86 dB

PSRR Power Supply Rejection Ratio 2.7V ≤ V+ ≤ 5V 65

82 dB

VCM Input Common Mode Voltage For CMRR ≥ 50dB 0 −0.2 to 4.2

(Range)

4 V

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LMV341/LMV342/LMV344

Symbol Parameter Conditions Min

(Note 7)

Typ

(Note 6)

Max

(Note 7)

Units

AVLarge Signal Voltage Gain (Note

RL = 10kΩ to 2.5V 78

116

RL = 2kΩ to 2.5V 72

107

VOOutput Swing RL = 2kΩ to 2.5V 32 60

95 mV

RL = 10kΩ to 2.5V 7 30

40 mV

IOOutput Short Circuit Current Sourcing 85 113 mA

Sinking 50 75

ton Turn-on Time from Shutdown (LMV341) 5 µs

VSD Shutdown Pin Voltage Range ON Mode (LMV341) 3.1 to 5 4.5 to 5.0 V

Shutdown Mode (LMV341) 0 to 1 0 to 0.8

5V AC Electrical Characteristics (Note 10)

Unless otherwise specified, all limits guaranteed for TJ = 25°C, V+ = 5V, V− = 0V, VCM = V+/2, VO = V+/2 and R L > 1MΩ. Bold-

face limits apply at the temperature extremes.

Symbol Parameter Conditions Min

(Note 7)

Typ

(Note 6)

Max

(Note 7)

Units

SR Slew Rate RL = 10kΩ, (Note 9) 1.0 V/µs

GBW Gain-Bandwidth Product RL = 10kΩ, CL = 200pF 1.0 MHz

ΦmPhase Margin RL = 100kΩ 70 deg

GmGain Margin RL = 100kΩ 20 dB

enInput-Referred Voltage Noise f = 1kHz 39 nV/

inInput-Referred Current Noise f = 1kHz 0.001 pA/

THD Total Harmonic Distortion f = 1kHz, AV = +1

RL = 600Ω, VIN = 1VPP

0.012 %

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is

intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.

Note 2: Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC)

Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).

Note 3: Shorting output to V+ will adversely affect reliability.

Note 4: Shorting output to V- will adversely affect reliability.

Note 5: The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature

is PD = (TJ(MAX) – TA)/ θJA. All numbers apply for packages soldered directly onto a PC Board.

Note 6: Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will

also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material.

Note 7: All limits are guaranteed by testing or statistical analysis.

Note 8: RL is connected to mid-supply. The output voltage is GND + 0.2V ≤ VO ≤ V+ −0.2V

Note 9: Connected as voltage follower with 2VPP step input. Number specified is the slower of the positive and negative slew rates.

Note 10: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating

of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self heating where TJ >

TA.

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LMV341/LMV342/LMV344

Connection Diagrams

6-Pin SC70

20030441

Top View

8-Pin MSOP/SOIC

20030451

Top View

14-Pin TSSOP/SOIC

20030452

Top View

Ordering Information

Package Part Number Package Marking Transport Media NSC Drawing

6-Pin SC70 LMV341MG A78 1k Units Tape and Reel MAA06A

LMV341MGX 3k Units Tape and Reel

8-Pin MSOP LMV342MM A82A 1k Units Tape and Reel MUA08A

LMV342MMX 3.5k Units Tape and Reel

8-Pin SOIC LMV342MA LMV342MA 95 Units/Rail M08A

LMV342MAX 2.5k Units Tape and Reel

14-Pin TSSOP LMV344MT LMV344MT Rails MTC14

LMV344MTX 2.5k Units Tape and Reel

14-Pin SOIC LMV344MA LMV344MA 55 Units/Rail M14A

LMV344MAX 2.5k Units Tape and Reel

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LMV341/LMV342/LMV344

Typical Performance Characteristics

Supply Current vs. Supply Voltage (LMV341)

20030428

Input Current vs. Temperature

20030446

Output Voltage Swing vs. Supply Voltage

20030426

Output Voltage Swing vs. Supply Voltage

20030427

ISOURCE vs. VOUT

20030429

ISOURCE vs. VOUT

20030430

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LMV341/LMV342/LMV344

ISINK vs. VOUT

20030431

ISINK vs. VOUT

20030432

VOS vs. VCM

20030433

VOS vs. VCM

20030434

VIN vs. VOUT

20030435

VIN vs. VOUT

20030436

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LMV341/LMV342/LMV344

CMRR vs. Frequency

20030403

PSRR vs. Frequency

20030401

Input Voltage Noise vs. frequency

20030404

Slew Rate vs. VSUPPLY

20030402

Slew Rate vs. Temperature

20030422

Slew Rate vs. Temperature

20030423

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LMV341/LMV342/LMV344

THD+N vs. Frequency

20030425

THD+N vs. VOUT

20030424

Open Loop Frequency Over Temperature

20030421

Open Loop Frequency Response

20030420

Open Loop Frequency Response

20030419

Gain and Phase vs. CL

20030417

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LMV341/LMV342/LMV344

Gain and Phase vs. CL

20030418

Stability vs. Capacitive Load

20030448

Stability vs. Capacitive Load

20030449

Non-Inverting Small Signal Pulse Response

20030405

Non-Inverting Large Signal Pulse Response

20030408

Non-Inverting Small Signal Pulse Response

20030406

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LMV341/LMV342/LMV344

Non-Inverting Large Signal Pulse Response

20030409

Non-Inverting Small Signal Pulse Response

20030407

Non-Inverting Large Signal Pulse Response

20030410

Inverting Small Signal Pulse Response

20030411

Inverting Large Signal Pulse Response

20030414

Inverting Small Signal Pulse Response

20030412

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LMV341/LMV342/LMV344

Inverting Large Signal Pulse Response

20030415

Inverting Small Signal Pulse Response

20030413

Inverting Large Signal Pulse Response

20030416

Crosstalk Rejection vs. Frequency

20030454

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LMV341/LMV342/LMV344

Application Section

LMV341/LMV342/LMV344

The LMV341/LMV342/LMV344 family of amplifiers features

low voltage, low power, and rail-to-rail output operational am-

plifiers designed for low voltage portable applications. The

family is designed using all CMOS technology. This results in

an ultra low input bias current. The LMV341 has a shutdown

option, which can be used in portable devices to increase

battery life.

A simplified schematic of the LMV341/LMV342/LMV344 fam-

ily of amplifiers is shown in Figure 1. The PMOS input differ-

ential pair allows the input to include ground. The output of

this differential pair is connected to the Class AB turnaround

stage. This Class AB turnaround has a lower quiescent cur-

rent, compared to regular turnaround stages. This results in

lower offset, noise, and power dissipation, while slew rate

equals that of a conventional turnaround stage. The output of

the Class AB turnaround stage provides gate voltage to the

complementary common-source transistors at the output

stage. These transistors enable the device to have rail-to-rail

output.

20030453

FIGURE 1. Simplified Schematic

CLASS AB TURNAROUND STAGE AMPLIFIER

This patented folded cascode stage has a combined class AB

amplifier stage, which replaces the conventional folded cas-

code stage. Therefore, the class AB folded cascode stage

runs at a much lower quiescent current compared to conven-

tional folded cascode stages. This results in significantly

smaller offset and noise contributions. The reduced offset and

noise contributions in turn reduce the offset voltage level and

the voltage noise level at the input of the LMV341/LMV342/

LMV344. Also the lower quiescent current results in a high

open-loop gain for the amplifier. The lower quiescent current

does not affect the slew rate of the amplifier nor its ability to

handle the total current swing coming from the input stage.

The input voltage noise of the device at low frequencies, be-

low 1kHz, is slightly higher than devices with a BJT input

stage; However the PMOS input stage results in a much lower

input bias current and the input voltage noise drops at fre-

quencies above 1kHz.

SAMPLE AND HOLD CIRCUIT

The lower input bias current of the LMV341 results in a very

high input impedance. The output impedance when the de-

vice is in shutdown mode is quite high. These high

impedances, along with the ability of the shutdown pin to be

derived from a separate power source, make LMV341 a good

choice for sample and hold circuits. The sample clock should

be connected to the shutdown pin of the amplifier to rapidly

turn the device on or off.

Figure 2 shows the schematic of a simple sample and hold

circuit. When the sample clock is high the first amplifier is in

normal operation mode and the second amplifier acts as a

buffer. The capacitor, which appears as a load on the first

amplifier, will be charging at this time. The voltage across the

capacitor is that of the non-inverting input of the first amplifier

since it is connected as a voltage-follower. When the sample

clock is low the first amplifier is shut off, bringing the output

impedance to a high value. The high impedance of this output,

along with the very high impedance on the input of the second

amplifier, prevents the capacitor from discharging. There is

very little voltage droop while the first amplifier is in shutdown

mode. The second amplifier, which is still in normal operation

mode and is connected as a voltage follower, also provides

the voltage sampled on the capacitor at its output.

20030444

FIGURE 2. Sample and Hold Circuit

SHUTDOWN FEATURE

The LMV341 is capable of being turned off in order to con-

serve power and increase battery life in portable devices.

Once in shutdown mode the supply current is drastically re-

duced, 1µA maximum, and the output will be "tri-stated."

The device will be disabled when the shutdown pin voltage is

pulled low. The shutdown pin should never be left unconnect-

ed. Leaving the pin floating will result in an undefined opera-

tion mode and the device may oscillate between shutdown

and active modes.

The LMV341 typically turns on 2.8µs after the shutdown volt-

age is pulled high. The device turns off in less than 400ns after

shutdown voltage is pulled low. Figure 3 and Figure 4 show

the turn-on and turn-off time of the LMV341, respectively. In

order to reduce the effect of the capacitance added to the

circuit by the scope probe, in the turn-off time circuit a resistive

load of 600Ω is added. Figure 5 and Figure 6 show the test

circuits used to obtain the two plots.

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LMV341/LMV342/LMV344

20030440

FIGURE 3. Turn-on Time

20030439

FIGURE 4. Turn-off Time

20030442

FIGURE 5. Turn-on Time

20030443

FIGURE 6. Turn-off Time

LOW INPUT BIAS CURRENT

The LMV341/LMV342/LMV344 Amplifiers have a PMOS in-

put stage. As a result, they will have a much lower input bias

current than devices with BJT input stages. This feature

makes these devices ideal for sensor circuits. A typical curve

of the input bias current of the LMV341 is shown in Figure 7.

20030447

FIGURE 7. Input Bias Current vs. VCM

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LMV341/LMV342/LMV344

Physical Dimensions inches (millimeters) unless otherwise noted

6-Pin SC70

NS Package Number MAA06A

8-Pin MSOP

NS Package Number MUA08A

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LMV341/LMV342/LMV344

8-Pin SOIC

NS Package Number M08A

14-Pin TSSOP

NS Package Number MTC14

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LMV341/LMV342/LMV344

14-Pin SOIC

NS Package Number M14A

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LMV341/LMV342/LMV344

Notes

LMV341/LMV342/LMV344 Single with Shutdown/Dual/Quad General Purpose, 2.7V, Rail-to-Rail

Output, 125°C, Operational Amplifiers

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Interface interface.ti.com Security www.ti.com/security

Logic logic.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense

Power Mgmt power.ti.com Transportation and Automotive www.ti.com/automotive

Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video

RFID www.ti-rfid.com

OMAP Mobile Processors www.ti.com/omap

Wireless Connectivity www.ti.com/wirelessconnectivity

TI E2E Community Home Page e2e.ti.com

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