DATA SH EET
Product specification
Supersedes data of 2002 Feb 21 2002 Jun 06
INTEGRATED CIRCUITS
74AHC1G08; 74AHCT1G08
2-input AND gate
2002 Jun 06 2
Philips Semiconductors Product specification
2-input AND gate 74AHC1G08; 74AHCT1G08
FEATURES
•Symmetrical output impedance
•High noise immunity
•ESD protection:
– HBM EIA/JESD22-A114-A exceeds 2000 V
– MM EIA/JESD22-A115-A exceeds 200 V
– CDM EIA/JESD22-C101 exceeds 1000 V.
•Low power dissipation
•Balanced propagation delays
•Very small 5-pin package
•Output capability: standard
•Specified from −40 to +125 °C.
DESCRIPTION
The74AHC1G/AHCT1G08isahigh-speedSi-gateCMOS
device.
The 74AHC1G/AHCT1G08 provides the 2-input AND
function.
QUICK REFERENCE DATA
GND = 0 V; Tamb =25°C; tr=t
f≤3.0 ns.
Notes
1. CPD is used to determine the dynamic power dissipation (PDin µW).
PD=C
PD ×VCC2×fi+(C
L×V
CC2×fo) where:
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC = supply voltage in Volts.
2. The condition is VI= GND to VCC.
SYMBOL PARAMETER CONDITIONS TYPICAL UNIT
AHC1G AHCT1G
tPHL/tPLH propagation delay A and B to Y CL= 15 pF; VCC = 5 V 3.2 3.6 ns
CIinput capacitance 1.5 1.5 pF
CPD power dissipation capacitance CL= 50 pF; f = 1 MHz;
notes 1 and 2 17 19 pF
2002 Jun 06 3
Philips Semiconductors Product specification
2-input AND gate 74AHC1G08; 74AHCT1G08
FUNCTION TABLE
See note 1.
Note
1. H = HIGH voltage level;
L = LOW voltage level.
ORDERING INFORMATION
PINNING
INPUTS OUTPUT
AB Y
LL L
LH L
HL L
HH H
TYPE NUMBER PACKAGES
TEMPERATURE
RANGE PINS PACKAGE MATERIAL CODE MARKING
74AHC1G08GW −40 to +125 °C 5 SC-88A plastic SOT353 AE
74AHCT1G08GW −40 to +125 °C 5 SC-88A plastic SOT353 CE
74AHC1G08GV −40 to +125 °C 5 SC-74A plastic SOT753 A08
74AHCT1G08GV −40 to +125 °C 5 SC-74A plastic SOT753 C08
PIN SYMBOL DESCRIPTION
1 B data input B
2 A data input A
3 GND ground (0 V)
4 Y data output Y
5V
CC supply voltage
Fig.1 Pin configuration.
handbook, halfpage
1
2
3
5
4
MNA112
08
VCC
A
Y
GND
B
Fig.2 Logic symbol.
handbook, halfpage
MNA113
B
AY
2
14
2002 Jun 06 4
Philips Semiconductors Product specification
2-input AND gate 74AHC1G08; 74AHCT1G08
Fig.3 IEC logic symbol.
handbook, halfpage
MNA114
24
&
1
Fig.4 Logic diagram.
handbook, halfpage
MNA221
A
B
Y
RECOMMENDED OPERATING CONDITIONS
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
Note
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
SYMBOL PARAMETER CONDITIONS 74AHC1G 74AHCT1G UNIT
MIN. TYP. MAX. MIN. TYP. MAX.
VCC supply voltage 2.0 5.0 5.5 4.5 5.0 5.5 V
VIinput voltage 0 −5.5 0 −5.5 V
VOoutput voltage 0 −VCC 0−VCC V
Tamb ambient temperature see DC and AC
characteristics per
device
−40 +25 +125 −40 +25 +125 °C
tr,t
f
(∆t/∆f) input rise and fall
times VCC = 3.3 ±0.3 V −−100 −−−ns/V
VCC =5±0.5 V −−20 −−20 ns/V
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VCC supply voltage −0.5 +7.0 V
VIinput voltage −0.5 +7.0 V
IIK input diode current VI<−0.5 V −−20 mA
IOK output diode current VO<−0.5 Vor VO>V
CC + 0.5 V; note 1 −±20 mA
IOoutput source or sink current −0.5 V < VO<V
CC + 0.5 V −±25 mA
ICC VCC or GND current −±75 mA
Tstg storage temperature −65 +150 °C
PDpower dissipation per package for temperature range from −40 to +125 °C−250 mW
2002 Jun 06 5
Philips Semiconductors Product specification
2-input AND gate 74AHC1G08; 74AHCT1G08
DC CHARACTERISTICS
Family 74AHC1G
At recommended operating conditions; voltages are referenced to GND (ground=0V).
SYMBOL PARAMETER
TEST CONDITIONS Tamb (°C)
UNIT
OTHER VCC
(V) 25 −40 to +85 −40 to +125
MIN. TYP. MAX. MIN. MAX. MIN. MAX.
VIH HIGH-level input
voltage 2.0 1.5 −−1.5 −1.5 −V
3.0 2.1 −−2.1 −2.1 −V
5.5 3.85 −−3.85 −3.85 −V
VIL LOW-level input
voltage 2.0 −− 0.5 −0.5 −0.5 V
3.0 −− 0.9 −0.9 −0.9 V
5.5 −− 1.65 −1.65 −1.65 V
VOH HIGH-leveloutput
voltage VI=V
IH or VIL;
IO=−50 µA2.0 1.9 2.0 −1.9 −1.9 −V
VI=V
IH or VIL;
IO=−50 µA3.0 2.9 3.0 −2.9 −2.9 −V
VI=V
IH or VIL;
IO=−50 µA4.5 4.4 4.5 −4.4 −4.4 −V
VI=V
IH or VIL;
IO=−4.0 mA 3.0 2.58 −−2.48 −2.40 −V
VI=V
IH or VIL;
IO=−8.0 mA 4.5 3.94 −−3.8 −3.70 −V
VOL LOW-level output
voltage VI=V
IH or VIL;
IO=50µA2.0 −0 0.1 −0.1 −0.1 V
VI=V
IH or VIL;
IO=50µA3.0 −0 0.1 −0.1 −0.1 V
VI=V
IH or VIL;
IO=50µA4.5 −0 0.1 −0.1 −0.1 V
VI=V
IH or VIL;
IO= 4.0 mA 3.0 −− 0.36 −0.44 −0.55 V
VI=V
IH or VIL;
IO= 8.0 mA 4.5 −− 0.36 −0.44 −0.55 V
ILI input leakage
current VI=V
CC or GND 5.5 −− 0.1 −1.0 −2.0 µA
ICC quiescent supply
current VI=V
CC or GND;
IO=0 5.5 −− 1.0 −10 −40 µA
CIinput capacitance −1.5 10 −10 −10 pF
2002 Jun 06 6
Philips Semiconductors Product specification
2-input AND gate 74AHC1G08; 74AHCT1G08
Family 74AHCT1G
At recommended operating conditions; voltages are referenced to GND (ground=0V).
SYMBOL PARAMETER
TEST CONDITIONS Tamb (°C)
UNIT
OTHER VCC (V) 25 −40 to +85 −40 to +125
MIN. TYP. MAX. MIN. MAX. MIN. MAX.
VIH HIGH-level input
voltage 4.5 to 5.5 2.0 −−2.0 −2.0 −V
VIL LOW-level input
voltage 4.5 to 5.5 −−0.8 −0.8 −0.8 V
VOH HIGH-leveloutput
voltage VI=V
IH or VIL;
IO=−50 µA4.5 4.4 4.5 −4.4 −4.4 −V
VI=V
IH or VIL;
IO=−8.0 mA 4.5 3.94 −−3.8 −3.70 −V
VOL LOW-level output
voltage VI=V
IH or VIL;
IO=50µA4.5 −0 0.1 −0.1 −0.1 V
VI=V
IH or VIL;
IO= 8.0 mA 4.5 −−0.36 −0.44 −0.55 V
ILI input leakage
current VI=V
IH or VIL 5.5 −−0.1 −1.0 −2.0 µA
ICC quiescent supply
current VI=V
CC or GND;
IO=0 5.5 −−1.0 −10 −40 µA
∆ICC additional
quiescent supply
current per input
pin
VI= 3.4 V;
other inputs at
VCC or GND;
IO=0
5.5 −−1.35 −1.5 −1.5 mA
CIinput capacitance −1.5 10 −10 −10 pF
2002 Jun 06 7
Philips Semiconductors Product specification
2-input AND gate 74AHC1G08; 74AHCT1G08
AC CHARACTERISTICS
Type 74AHC1G08
GND = 0 V; tr=t
f≤3.0 ns.
Notes
1. Typical values are measured at VCC = 3.3 V.
2. Typical values are measured at VCC = 5.0 V.
Type 74AHCT1G08
GND = 0 V; tr=t
f≤3.0 ns.
Note
1. Typical values are measured at VCC =5V.
SYMBOL PARAMETER
TEST CONDITIONS Tamb (°C)
UNIT
WAVEFORMS CL
(pF) 25 −40 to +85 −40 to +125
MIN. TYP. MAX. MIN. MAX. MIN. MAX.
VCC = 3.0 to 3.6 V; note 1
tPHL/tPLH propagation delay
A and B to Y see Figs 5 and 6 15 −4.6 8.8 1.0 10.5 1.0 12.0 ns
50 −6.5 12.3 1.0 14.0 1.0 16.0 ns
VCC = 4.5 to 5.5 V; note 2
tPHL/tPLH propagation delay
A and B to Y see Figs 5 and 6 15 −3.2 5.9 1.0 7.0 1.0 8.0 ns
50 −4.6 7.9 1.0 9.0 1.0 10.5 ns
SYMBOL PARAMETER
TEST CONDITIONS Tamb (°C)
UNIT
WAVEFORMS CL
(pF) 25 −40 to +85 −40 to +125
MIN. TYP. MAX. MIN. MAX. MIN. MAX.
VCC = 4.5 to 5.5 V; note 1
tPHL/tPLH propagation delay
A and B to Y see Figs 5 and 6 15 −3.6 6.2 1.0 7.1 1.0 8.0 ns
50 −5.1 7.9 1.0 9.0 1.0 10.5 ns
2002 Jun 06 8
Philips Semiconductors Product specification
2-input AND gate 74AHC1G08; 74AHCT1G08
AC WAVEFORMS
Fig.5 The input (A and B) to output (Y) propagation delays.
FAMILY VI INPUT
REQUIREMENTS VM
INPUT VM
OUTPUT
AHC1G GND to VCC 50% VCC 50% VCC
AHCT1G GND to 3.0 V 1.5 V 50% VCC
handbook, halfpage
MNA116
A, B input
Y output
tPHL tPLH
VM
VM
Fig.6 Load circuitry for switching times.
Definitions for test circuit:
CL= Load capacitance including jig and probe capacitance. (See Chapter “AC characteristics”).
RT= Termination resistance should be equal to the output impedance Zo of the pulse generator.
handbook, halfpage
VCC
VIVO
MNA101
D.U.T.
CL
RT
PULSE
GENERATOR
2002 Jun 06 9
Philips Semiconductors Product specification
2-input AND gate 74AHC1G08; 74AHCT1G08
PACKAGE OUTLINES
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC EIAJ
SOT353
wBM
b
p
D
e
1
e
A
A
1
L
p
Q
detail X
HE
E
vMA
AB
y
0 1 2 mm
scale
c
X
132
45
Plastic surface mounted package; 5 leads SOT353
UNIT A1
max bpcD
E (2) e1HELpQywv
mm 0.1 0.30
0.20 2.2
1.8
0.25
0.10 1.35
1.15 0.65
e
1.3 2.2
2.0 0.2 0.10.2
DIMENSIONS (mm are the original dimensions)
0.45
0.15 0.25
0.15
A
1.1
0.8
97-02-28SC-88A
2002 Jun 06 10
Philips Semiconductors Product specification
2-input AND gate 74AHC1G08; 74AHCT1G08
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
SOT753 SC-74A
wBM
b
p
D
e
A
A
1
L
p
Q
detail X
HE
E
vMA
AB
y
0 1 2 mm
scale
c
X
132
45
Plastic surface mounted package; 5 leads SOT753
UNIT A1bpcDEH
E
L
p
Qywv
mm 0.100
0.013 0.40
0.25 3.1
2.7
0.26
0.10 1.7
1.3
e
0.95 3.0
2.5 0.2 0.10.2
DIMENSIONS (mm are the original dimensions)
0.6
0.2 0.33
0.23
A
1.1
0.9
02-04-16
2002 Jun 06 11
Philips Semiconductors Product specification
2-input AND gate 74AHC1G08; 74AHCT1G08
SOLDERING
Introduction to soldering surface mount packages
Thistextgivesaverybriefinsighttoacomplextechnology.
A more in-depth account of soldering ICs can be found in
our
“Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering can still be used for
certainsurfacemountICs,butitisnotsuitablefor fine pitch
SMDs. In these situations reflow soldering is
recommended.
Reflow soldering
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
totheprinted-circuit board by screenprinting,stencillingor
pressure-syringe dispensing before package placement.
Several methods exist for reflowing; for example,
convection or convection/infrared heating in a conveyor
type oven. Throughput times (preheating, soldering and
cooling) vary between 100 and 200 seconds depending
on heating method.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 220 °C for
thick/large packages, and below 235 °C for small/thin
packages.
Wave soldering
Conventional single wave soldering is not recommended
forsurfacemountdevices(SMDs)orprinted-circuitboards
with a high component density, as solder bridging and
non-wetting can present major problems.
To overcome these problems the double-wave soldering
method was specifically developed.
If wave soldering is used the following conditions must be
observed for optimal results:
•Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
•For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The footprint must incorporate solder thieves at the
downstream end.
•Forpackageswithleadsonfoursides,thefootprintmust
be placed at a 45°angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Manual soldering
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
2002 Jun 06 12
Philips Semiconductors Product specification
2-input AND gate 74AHC1G08; 74AHCT1G08
Suitability of surface mount IC packages for wave and reflow soldering methods
Notes
1. Formoredetailedinformation on the BGA packagesrefertothe
“(LF)BGAApplicationNote
”(AN01026);ordera copy
from your Philips Semiconductors sales office.
2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the
“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”
.
3. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder
cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side,
the solder might be deposited on the heatsink surface.
4. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
5. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not
suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
6. Wave soldering is suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
PACKAGE(1) SOLDERING METHOD
WAVE REFLOW(2)
BGA, LBGA, LFBGA, SQFP, TFBGA, VFBGA not suitable suitable
HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN,
HVSON, SMS not suitable(3) suitable
PLCC(4), SO, SOJ suitable suitable
LQFP, QFP, TQFP not recommended(4)(5) suitable
SSOP, TSSOP, VSO not recommended(6) suitable
2002 Jun 06 13
Philips Semiconductors Product specification
2-input AND gate 74AHC1G08; 74AHCT1G08
DATA SHEET STATUS
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
DATA SHEET STATUS(1) PRODUCT
STATUS(2) DEFINITIONS
Objective data Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
Preliminary data Qualification This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
Product data Production This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Changes will be
communicated according to the Customer Product/Process Change
Notification (CPCN) procedure SNW-SQ-650A.
DEFINITIONS
Short-form specification The data in a short-form
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
attheseoratanyotherconditionsabovethosegiveninthe
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Application information Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
norepresentationorwarrantythatsuch applicationswillbe
suitable for the specified use without further testing or
modification.
DISCLAIMERS
Life support applications These products are not
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductorscustomersusingorselling theseproducts
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Right to make changes Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
theuse of anyoftheseproducts,conveysnolicence or title
under any patent, copyright, or mask work right to these
products,andmakesnorepresentations or warranties that
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.
2002 Jun 06 14
Philips Semiconductors Product specification
2-input AND gate 74AHC1G08; 74AHCT1G08
NOTES
2002 Jun 06 15
Philips Semiconductors Product specification
2-input AND gate 74AHC1G08; 74AHCT1G08
NOTES
© Koninklijke Philips Electronics N.V. 2002 SCA74
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Philips Semiconductors – a worldwide company
Contact information
For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
Printed in The Netherlands 613508/05/pp16 Date of release: 2002 Jun 06 Document order number: 9397 750 09705
