BIPOLAR ANALOG INTEGRATED CIRCUIT
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µµ
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PC2756TB
MIXER+OSCILLATOR SILICON MMIC FOR FREQUENCY
DOWNCONVERTER OF L BAND WIRELESS RECEIVER
Document No. P12807EJ3V0DS00 (3rd edition)
Date Published February 2001 N CP(K)
DATA SHEET
The mark shows major revised points
DESCRIPTION
The
µ
PC2756TB is a silicon monolithic integrated circuit designed as L band frequency downconverter for receiver
stage of wireless systems. The IC consists of mixer and local oscillator. This IC operates at 3 V.
This IC is manufactured using Renesas 20GHz fT NESAT™ III silicon bipolar process. This process uses
silicon nitride passivation film and gold electrodes. These materials can protect chip surface from external
pollution and prevent corrosion/migration. Thus, this IC has excellent performance, uniformity and reliability.
FEATURES
• Wideband operation : fRFin = 0.1 to 2.0 GHz
• Supply voltage : VCC = 2.7 to 3.3 V
• Low current consumption : ICC = 6.0 mA TYP. @VCC = 3.0 V
• Minimized carrier leakage : Due to double balanced mixer
• Equable output impedance : Single-end push-pull IF amplifier
• Equable temperature-drift oscillator: Differential amplifier type oscillator
• High-density surface mounting : 6-pin super minimold package (2.0 × 1.25 × 0.9 mm)
APPLICATIONS
• Data carrier up to 2.0 GHz MAX.
• Wireless LAN up to 2.0 GHz MAX.
ORDERING INFORMATION
Part Number Package Marking Supplying Form
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PC2756TB-E3 6-pin super mini mold C1W • Embossed tape 8 mm wide
• 1, 2, 3 pins face t he perforation si de of the tape
• Qty 3 kpcs/reel
Remark To order evaluation samples, please contact your nearby sales office.
Part number for sample order:
µ
PC2756TB-A
Caution Electro-static sensitive devices
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with your nearby sales office for
availability and additional information.
PHASE-OUT
Data Sheet P12807EJ3V0DS
2
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PC2756TB
PIN CONNECTIONS
PRODUCT LINE-UP (TA = +25°C, VCC = 3.0 V, ZS = ZL = 50 Ω
ΩΩ
Ω)
Parameter VCC
(V)
ICC
(mA)
0.9 GHz
CG
(dB)
1.6 GHz
CG
(dB)
0.9 GHz
NF
(dB)
1.6 GHz
NF
(dB)
fRFin
(GHz)
fIFout
(GHz)
fOSC
(GHz) Package
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PC2756T 2. 7 t o 3 . 3 6. 0 14 14 10 13 0. 1 t o 2 . 0 10 t o 3 00 to 2. 2 6-pin minimold
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PC2756TB 6-pin super minimold
Remark Typical performance. Please refer to ELECTRICAL CHARACTERISTICS in detail.
INTERNAL BLOCK DIAGRAM
RF
input IF
output
LO
1
LO
2
V
CC
GND
Oscillator
IF amplifierMixer
Remark Oscillator tank circuit must be externally attached to LO
1
and LO
2
pins.
Pin No. Pin Name
1 RFinput
2GND
3LO
1
4LO
2
5V
CC
6 IFoutput
Part
Number
3
2
1
4
C1W
(Top View)
5
6
4
5
6
3
(Bottom View)
2
1
PHASE-OUT
Data Sheet P12807EJ3V0DS 3
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PC2756TB
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PC2756TB LOCATION EXAMPLE IN THE SYSTEM
PC2745TB
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PC2756TB
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V
T
BPF
BPF
RX
1st
MIXER
LPF
PLL frequency
synthesizer
Reference
osillator
This document is to be specified for
µ
PC2756TB. For the other part number mentioned in this document, please
refer to the data sheet of each part number.
PHASE-OUT
Data Sheet P12807EJ3V0DS
4
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PC2756TB
PIN EXPLANATION
Pin
No. Pin Name Applied
Voltage
(V)
Pin
Voltage
(V)Note Func tion and Application Equival ent Ci rcuit
1 RFinput – 1.2 This pin is RF input for m i xer designed as doubl e
balance type.
This ci rcuit contributes to suppress spurious si gnal
with mini m um LO and bi as power consum ption.
Also t hi s sym m etrical c i rcuit can keep speci f i ed
performance i nsensiti ve to proces s-conditi on
distribution.
This pin must be ext ernal l y coupled to f ront stage
with capacitor f or DC cut.
1
V
CC
2GND 0 –Must be connected t o t he system ground with
minimum i nductance. Ground pattern on the board
should be form ed as wide as pos sible.
(Track length should be kept as short as possibl e.)
3LO
1–1.2
4LO
2–1.2
These pins are both base-collector of oscillator. This
oscillator is designed as differential amplifier type.
3 pin and 4 pin should be externally equi pped wi th
tank resonator circuit in order t o oscillate with
feedback l oop. Also thi s sym m etrical c i rcuit can keep
specified performanc e i nsensiti ve to proces s-
conditi on di stributi on.
Each pin m ust be ext ernal l y coupled to t ank circ ui t
with capacitor f or DC cut.
V
CC
34
5V
CC 2.7 to 3.3 –Supply voltage 3.0 ± 0. 3 V for operation. M ust be
connect ed bypass c apacitor (e.g. 1 000 pF) to
minimize ground impedance.
6 IFoutput –1.7 This pi n i s output from IF buffer amplifier des i gned as
single-ended pus h-pul l type.
This pin is assi gned f or emitter f ol l ower output with
low-impedance. This pin must be ext ernal l y coupled
to next stage with capacitor for DC cut.
6
VCC
Note Pin voltage is measured at VCC = 3.0 V
APPLICATION
This IC is guaranteed on the test circuit constructed with 50 Ω equipment and transmission line. This IC, however,
does not have 50 Ω input/output impedance, but electrical characteristics such as conversion gain and
intermodulation distortion are described herein on these conditions without impedance matching. So, you should
understand that conversion gain and intermodulation distortion at input level will vary when you improve VS of RF
input with external circuit (50 Ω termination or impedance matching).
External circuits of the IC are explained in a following application note.
•To RF and IF port: Application Note “Usage and Application Characteristics of
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PC2757T,
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PC2758T and
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PC8112T, 3-V Power Supply, 1.9-GHz Frequency Down Converter ICs for Cellular/Cordless Telephone and
Portable Wireless Communication” (P11997E)
PHASE-OUT
Data Sheet P12807EJ3V0DS 5
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PC2756TB
ABSOLUTE MAXIMUM RATINGS
Parameter Symbol Conditions Rating Unit
Supply V ol tage VCC TA = +25 °C5.5V
Power Dissipation PDMounted on doubl e-sided copper cl ad
50 × 50 × 1.6 mm epoxy glass PWB,
TA = +85°C
270 mW
Operating Ambient Temperature TA–40 to +85 °C
Storage Temperature Tstg –55 to +150 °C
RECOMMENDED OPERATING RANGE
Parameter Symbol MIN. TYP. MAX. Unit
Supply V ol tage VCC 2.7 3.0 3.3 V
ELECTRICAL CHARACTERISTICS (TA = +25°C, VCC = 3.0 V, ZS = ZL = 50 Ω
ΩΩ
Ω, Test circuit)
Parameter Symbol Conditions MIN. TYP. MAX. Unit
Circuit Current ICC No signal s 3.5 6.0 8.0 mA
RF Input Frequency fRFin CG ≥ (CG1 –3 dB ),
fIFout = 150 MHz constant 0.1 –2.0 GHz
IF Output Frequenc y fIFout CG ≥ (CG1 –3 dB),
fRFin = 0.9 GHz constant 10 –300 MHz
Conversion Gai n 1 CG1 fRFin = 0.9 GHz, fIFout = 150 MHz,
PRFin = –40 dBm 11 14 17 dB
Conversion Gai n 2 CG2 fRFin = 1.6 GHz, fIFout = 20 MHz,
PRFin = –40 dBm 11 14 17 dB
SSB Noise Figure 1 SSB•NF1 fRFin = 0. 9 GHz , fIFout = 150 MHz,
SSB mode –10 13 dB
SSB Noise Figure 2 SSB•NF2 fRFin = 1. 6 GHz , fIFout = 20 MHz,
SSB mode –13 16 dB
Saturated Output Power 1 PO(sat) 1 fRFin = 0.9 GHz, fIFout = 150 MHz ,
PRFin = –10 dBm –11 –8 – dBm
Saturated Output Power 2 PO(sat) 2 fRFin = 1.6 GHz, fIFout = 20 MHz ,
PRFin = –10 dBm –15 –12 –dBm
STANDARD CHARACTERISTICS FOR REFERENCE
(Unless otherwise specified, TA = +25°C, VCC = 3.0 V, ZS = ZL = 50 Ω
ΩΩ
Ω)
Parameter Symbol Conditions Reference Unit
Output 3rd Order Intercept Poi nt OIP3fRFin = 0.8 to 2.0 GHz, fIFout = 0.1 GHz,
Cross point IP. +4.0 dBm
Phase Noise PN fOSC = 1.9 GHzNote –68 dBc/Hz
LO Leakage at RFinput Pin LOrf fLOin = 0.8 to 2.0 GHz –35 dB
LO Leakage at IF output Pin LOif fLOin = 0.8 to 2.0 GHz –23 dB
Maximum Oscillating Frequency fOSCMAX. V-Di: 1SV210, L: 7 nHNote 2.2 GHz
Note On application circuit example.
PHASE-OUT
Data Sheet P12807EJ3V0DS
6
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PC2756TB
SCHEMATIC SUPPLEMENT FOR RF, IF SPECIFICATIONS
CG1
CG1−3 dB
0.1 0.9 2.0
RF Input Frequency f
RFin
(GHz)
Guaranteed gain level
f
IFout
= 150 MHz
P
RFin
= − 40 dBm
RF Frequency Response
Conversion Gain CG (dB)
CG1
CG1−3 dB
10 150 300
IF Output Frequency f
IFout
(GHz)
Guaranteed gain level
f
RFin
= 0.9 GHz
P
RFin
= − 40 dBm
IF Frequency Response
Conversion Gain CG (dB)
MIN. TYP. MAX. Unit
CG1 11 14 17 dB
CG1-3 dB 8 11 14 dB
PHASE-OUT
Data Sheet P12807EJ3V0DS 7
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PC2756TB
TEST CIRCUIT
LO
1
GND
RFinput
LO
2
V
CC
IFoutput
3
2
1
4
5
6
50 Ω
1 000 pF
C
3
3 300 pF 3 V
3 300 pF
C
5
C
4
1 000 pF
C
2
C
1
1 000 pF
(Top View)
Signal Generator
50 Ω
Signal Generator
50 Ω
Spectram Analyzer
ILLUSTRATION OF THE TEST CIRCUIT ASSEMBLED ON EVALUATION BOARD
C1
C3
C4
GND VCC
LO1
RF
input
LO2
IF
output
C5
C
2
Notes
(1) 35 × 42 × 0.4 mm double copper clad polyimide board.
(2) Back side: GND pattern
(3) Solder plated on pattern
(4) : Through holes
(5) pattern should be removed on this testing.
COMPONENT LIST
Value
C1 to C31 000 pF
C4, C53 300 pF
PHASE-OUT
Data Sheet P12807EJ3V0DS
8
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PC2756TB
COMPONENT LIST
Value
C1 to C31 000 pF
C4, C53 300 pF
R1, R215 kΩ
L 5 nH to 30 nH
V-Di HVU12
APPLICATION CIRCUIT EXAMPLE
LO
1
GND
RFinput
LO
2
V
CC
IFoutput
3
2
1
4
5
6
1 000 pF
C
3
3 300 pF 3 V
3 300 pF
C
5
C
4
1 000 pF C
2
C
1
1 000 pF
(Top View)
15 kΩ
V
T
bias R
2
R
1
15 kΩL
5 nH ∼
30 nH HVU12
50 Ω
Signal Generator
50 Ω
Spectram Analyzer
ILLUSTRATION OF THE APPLICATION CIRCUIT ASSEMBLED ON EVALUATION BOARD
GND VCC
RF
input IF
output
C1
C4
R
2
R
1
VT
C5
C
3
C
2
The application circuits and their parameters are for reference only and are not intended for use in actual design-ins.
Notes
(1) 35 × 42 × 0.4 mm double copper clad polyimide board.
(2) Back side: GND pattern
(3) Solder plated on pattern
(4) : Through holes
(5) pattern should be removed on this testing.
PHASE-OUT
Data Sheet P12807EJ3V0DS 9
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PC2756TB
TYPICAL CHARACTERISTICS (Unless otherwise specified, TA = +25°
°°
°C)
−ON THE TEST CIRCUIT −
CIRCUIT CURRENT vs. SUPPLY VOLTAGE
Supply Voltage VCC (V)
Circuit Current ICC (mA)
0
CONVERSION GAIN, SSB NOISE FIGURE vs.
RF INPUT FREQUENCY
RF Input Frequency fRFin (GHz)
SSB Noise Figure SSB•NF (dB)
10
IF OUTPUT POWER, IM
3 vs.
RF INPUT POWER
RF Input Power PRFin (dBm)
−70
−80
2
2
4
6
8
10
46
20
25
1.00.5 1.5 2.0
−40
−10
+20
−40 −20 0
135
Conversion Gain CG (dB)
15
5
15
20
10
PRFin = –55 dBm
PL0in = –10 dBm
fIFout = 150 MHz
(Low-Side LO)
NF
fRFin1 = 900 MHz
fRFin2 = 905 MHz
fLOin = 800 MHz
VCC = 3.0 V
+10
0
−30
−20
−50
−60
−60
CG VCC = 3.3 V
VCC = 2.7 V
VCC = 3.0 V
CIRCUIT CURRENT vs.
OPERATING AMBIENT TEMPERATURE
Operating Ambient Temperature TA (°C)
Circuit Current ICC (mA)
−40
CONVERSION GAIN vs.
IF OUTPUT FREQUENCY
IF Output Frequency fIFout (MHz)
Conversion Gain CG (dB)
01
−20 0 +20 +80 +100
2
4
6
8
10
10
5
20
15
30
+40 +60
0
No signal
VCC = 3.0 V
25
2 5 10 20 50 100 300
VCC = 3.0 V
PRFin = –55 dBm
PL0in = –10 dBm
fRFin = 1.6 GHz
IF coupling = 0.1 F
µ
IF OUTPUT POWER, IM3 vs.
RF INPUT POWER
−70
−40
−10
+20 fRFin1 = 2.000 GHz
fRFin2 = 2.005 GHz
fLOin = 1.900 GHz
VCC = 3.0 V
+10
0
−30
−20
−50
−60
−80 −40 −20 0−60
IF
Output Power
PIFout (dBm)
3rd Order Intermodulation Distortion
IM3 (dBm)
RF Input Power PRFin (dBm)
IF Output Power P
IFout
(dBm)
3rd Order Intermodulation Distortion IM
3
(dBm)
No signal
PHASE-OUT
Data Sheet P12807EJ3V0DS
10
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PC2756TB
−ON THE APPLICATION CIRCUIT −
LO LEAKAGE AT IFoutput PIN vs.
LOCAL INPUT FREQUENCY
Local Input Frequency f
LOin
(GHz)
Local Leakage at IFoutput Pin LO
if
(dBm)
1.21.0 1.4 1.6
−60
−40
−30
−50 V
CC
= 3.0 V
P
L0in
= −10 dBm
0
−10
−20
0.8
LO LEAKAGE AT RFinput PIN vs.
LOCAL INPUT FREQUENCY
1.6 1.8
−60
−40
−30
−50
2.0
0
−10
−20
1.4
Local Input Frequency f
LOin
(GHz)
Local Leakage at RFinput Pin LO
rf
(dBm)
V
CC
= 3.0 V
P
L0in
= –10 dBm
VCO OSCILLATION FREQUENCY vs.
TUNING VOLTAGE
2.5
2.0
1.5
1.0
0.5 0 5 10 15 20 25
Tuning Voltage V
tu
(V)
VCO Oscillation Frequency f
VCO
(GHz)
L = 7 nH
L = 15 nH
L = 30 nH
L = 50 nH
PHASE-OUT
Data Sheet P12807EJ3V0DS 11
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PC2756TB
−ON THE APPLICATION CIRCUIT −
ATTEN 10 dB
RL −40.0 dBm 10 dB / MKR −53.16 dB
10.0 kHz
V
CC
= 3.0 V
Vtune = 3.0 V
T
A
= +25°C
Monitor at pin 6
MKR
10.0 kHz
−53.16 dB
CENTER 774.425 8 MHz
RBW 1.0 kHz ++ VBW 100 Hz SPAN 100.0 kHz
SWP 3.0 s
VCO Phase Noise (f
VCO
= 774.425 8 MHz center)
ATTEN 10 dB
RL –40.0 dBm 10 dB / MKR –40.34 dB
10.2 kHz
MKR
10.2 kHz
–40.34 dB
CENTER 1.639 194 2 GHz
RBW 1.0 kHz ++ VBW 100 Hz SPAN 100.0 kHz
SWP 3.0 s
VCO Phase Noise (f
VCO
= 1.639 194 2 GHz center)
V
CC
= 3.0 V
Vtune = 3.0 V
T
A
= +25°C
Monitor at pin 6
Remark The graphs indicate nominal characteristics.
PHASE-OUT
Data Sheet P12807EJ3V0DS
12
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PC2756TB
S-PARAMETERS (VCC = 3.0 V)
RFinput Pin
1 : 100 MHz 519.8 Ω − j 1.1 Ω
2 : 500 MHz 59.3 Ω − j 281.0 Ω
3 : 900 MHz 38.3 Ω − j 157.0 Ω
4 : 1 500 MHz 31.5 Ω − j 90.1 Ω
5 : 1 900 MHz 28.5 Ω − j 67.9 Ω
6 : 3 000 MHz 25.7 Ω − j 31.7 ΩSTART 0.100000000 GHz
STOP 3.100000000 GHz
3
4
65
1
2
IFoutput Pin
1 : 50 MHz 22.5 Ω + j 6.1 Ω
2 : 80 MHz 24.2 Ω + j 11.3 Ω
3 : 130 MHz 30.2 Ω + j 16.6 Ω
4 : 240 MHz 42.6 Ω + j 17.5 Ω
5 : 300 MHz 46.6 Ω + j 15.6 ΩSTART 0.050000000 GHz
STOP 0.300000000 GHz
3
24
1
5
PHASE-OUT
Data Sheet P12807EJ3V0DS 13
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PC2756TB
PACKAGE DIMENSIONS
6-PIN SUPER MINIMOLD (UNIT: mm)
0.9±0.1
0.7
0 to 0.1
0.15
+0.1
–0.05
2.0±0.2
1.3
0.650.65
0.2
+0.1
–0.05
2.1±0.1
1.25±0.1
0.1 MIN.
PHASE-OUT
Data Sheet P12807EJ3V0DS
14
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PC2756TB
NOTE ON CORRECT USE
(1) Observe precautions for handling because of electro-static sensitive devices.
(2) Form a ground pattern as widely as to minimize ground impedance (to prevent abnormal oscillation).
(3) Keep the track length between the ground pins as short as possible.
(4) Connect a bypass capacitor (example 1 000 pF) to the VCC pin.
(5) To construct oscillator, tank circuit must be externally attached to pin 3 and pin 4.
RECOMMENDED SOLDERING CONDITIONS
This product should be soldered under the following recommended conditions. For soldering methods and
conditions other than those recommended below, contact your nearby sales representative.
Soldering Method Soldering Condit i ons Recommended Condition Sym bol
Infrared Refl ow Pack age peak temperature: 235°C or bel ow
Time: 30 seconds or less (at 210°C)
Count: 3, Exposure li mit: NoneNote
IR35-00-3
VPS Pack age peak temperature: 215°C or bel ow
Time: 40 seconds or less (at 200°C)
Count: 3, Exposure li mit: NoneNote
VP15-00-3
Wave Solderi ng Soldering bath temperature: 260°C or bel ow
Time: 10 seconds or less
Count: 1, Exposure li mit: NoneNote
WS60-00-1
Partial Heating Pin tem perat ure: 300°C or below
Time: 3 s econds or less (per side of device)
Expos ure l i m i t: NoneNote
–
Note After opening the dry pack, keep it in a place below 25°C and 65% RH for the allowable storage period.
Caution Do not use different soldering methods together (except for partial heating).
For details of recommended soldering conditions for surface mounting, refer to information document
SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL (C10535E).
PHASE-OUT
NOTICE
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application examples. You are fully responsible for the incorporation of these circuits, software, and information in the design of your equipment. California
Eastern Laboratories and Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits,
software, or information.
2. California Eastern Laboratories has used reasonable care in preparing the information included in this document, but California Eastern Laboratories does
not warrant that such information is error free. California Eastern Laboratories and Renesas Electronics assumes no liability whatsoever for any damages
incurred by you resulting from errors in or omissions from the information included herein.
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PHASE-OUT
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Authorized Distributor
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UPC2756TB-EVAL