MITSUBISHI <DIGITAL ASSP>
M66291GP
Contents
USB - i Ver.1.0 Apr.9 2001
CONTENTS
1. M66291 OVERVIEW......................................................................................................................................1
1.1 Features ...................................................................................................................................................... 1
1.2 Block Diagram............................................................................................................................................. 3
1.2.1 USB-IP ................................................................................................................................................. 4
1.2.2 Bus Interface Unit (BIU) ....................................................................................................................... 4
1.2.3 FIFO Memory ....................................................................................................................................... 4
1.2.4 I/O Block............................................................................................................................................... 4
1.3 Pin Functions .............................................................................................................................................. 6
2. Registers.......................................................................................................................................................8
2.1 USB Operation Enable Register ............................................................................................................... 10
2.2 Remote Wakeup Register ......................................................................................................................... 12
2.3 Sequence Bit Clear Register..................................................................................................................... 13
2.4 USB_Address Register ............................................................................................................................. 14
2.5 Isochronous Status Register..................................................................................................................... 15
2.6 SOF Control Register................................................................................................................................ 16
2.7 Polarity Set Register ................................................................................................................................. 17
2.8 Interrupt Enable Register 0 ....................................................................................................................... 20
2.9 Interrupt Enable Register 1 ....................................................................................................................... 23
2.10 Interrupt Enable Register 2 ....................................................................................................................... 24
2.11 Interrupt Enable Register 3 ....................................................................................................................... 25
2.12 Interrupt Status Register 0 ........................................................................................................................ 26
2.13 Interrupt Status Register 1 ........................................................................................................................ 32
2.14 Interrupt Status Register 2 ........................................................................................................................ 34
2.15 Interrupt Status Register 3 ........................................................................................................................ 35
2.16 Request Register ...................................................................................................................................... 36
2.17 Value Register........................................................................................................................................... 37
2.18 Index Register ........................................................................................................................................... 38
2.19 Length Register......................................................................................................................................... 39
2.20 Control Transfer Control Register ............................................................................................................. 40
2.21 EP0 Packet Size Register ......................................................................................................................... 42
2.22 Automatic Response Control Register...................................................................................................... 43
2.23 EP0_FIFO Select Register........................................................................................................................ 44
2.24 EP0_FIFO Control Register ...................................................................................................................... 46
2.25 EP0_FIFO Data Register .......................................................................................................................... 50
2.26 EP0 Continuous Transmit Data Length Register ...................................................................................... 51
2.27 CPU_FIFO Select Register ....................................................................................................................... 52
2.28 CPU_FIFO Control Register ..................................................................................................................... 54
2.29 CPU_FIFO Data Register ......................................................................................................................... 58
2.30 SIE_FIFO Status Register......................................................................................................................... 59
2.31 Dn_FIFO Select Registers (n=0~1) .......................................................................................................... 61
2.32 Dn_FIFO Control Registers (n=0~1)......................................................................................................... 65
2.33 Dn_FIFO Data Registers (n=0~1)............................................................................................................. 67
2.34 DMAn_Transaction Count Registers (n=0~1)........................................................................................... 68
2.35 FIFO Status Register ................................................................................................................................ 69
2.36 Port Control Register................................................................................................................................. 70
2.37 Port Data Register..................................................................................................................................... 72
2.38 Drive Current Adjust Register ................................................................................................................... 73
2.39 EPi Configuration Registers 0 (i=1~6) ...................................................................................................... 74
2.40 Epi Configuration Registers 1 (i=1~6)....................................................................................................... 77
3. M66291 OPERATIONS................................................................................................................................79
3.1 Interrupt Function ...................................................................................................................................... 79
3.2 FIFO Buffer ............................................................................................................................................... 81
3.2.1 FIFO Buffer Configuration .................................................................................................................. 81