HW-MULTIPRO - Xilinx, Inc.

DS114 (v1.2) January 24, 2003 www.xilinx.com 1

Advance Product Specification 1-800-255-7778

trademarks and registered trademarks are the property of their respective owners. Al l specifications are subject to change without notice.

NOTICE OF DISCLAIMER: Xilinx is providing this design, code, or information "as is." By providing the design, code, or information as one possible implementation of this fea-

ture, appli cation, or standard, Xilinx makes no representation that this implementation is free from any claims of infringement. You are responsible for obtaining any rights you

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ranties or representations that this implementation is free from claims of infringement and any implied warranties of merchantab i lit y or fit ne s s fo r a part icu l ar pur p ose .

Features

• Supported by iMPACT download software (v5.1i SP3

or higher)

• Externally powered using +5V DC power brick

- Same power brick can be used for Parallel

Cable IV

• Download speeds up to 2.5 Megabits per second

(Mb/s)

• LED status indicators

• Uses IEEE 1284 ECP protocol for high-speed

communications

• Uses quick-connect, off-the-shelf IEEE 1284 parallel

cable

Desktop Device Programming

• Device adapters are available for:

- XC18V00 ISP PROM family

- CoolRunner-II™ CPLD family

• Automatically switches power during programming

• Automatically identifies and confirms proper adapter

selection

• Has short-circuit protection in the event of improper

device insertion

In-System Programming/Configuration

• Automatically senses and adapts to target I/O voltage

• Interfaces to devices operating at 5V (TTL), 3.3V

(LVCMOS), 2.5V, 1.8V, and 1.5V

• Supports JTAG (IEEE 1149.1), Xilinx Slave Serial and

SelectMAP modes

• Configures all Xilinx devices:

- Virtex™/Virtex-E/Virtex-II/Virtex-II Pro™

- Spartan™/XL/II/IIE

- CoolRunner™/CoolRunner-II

- XC18V00 ISP PROM family

- XC4000 XL/ XV/EX/L/E

- System ACE™ MPM

- XC9500/XL/XV

• J Drive™ compatible with IEEE 1532 Programming

Engine

• ChipScope™ ILA and ChipScope Pro compatible

• Includes high-performance ribbon cables

- 14 conductor ribbon cable can be used with

Parallel Cable IV.

MultiPRO Desktop Tool Description

The MultiPRO Desktop Tool (Figure 1) is a multi-function

programming and configuration cable. When mated with

MultiPRO device adapters, it can program individual

XC18V00 ISP PROMs and CoolRunner-II CPLD s. Alterna-

tively, it can perform in-circuit programming or FPGA config-

uration when attached to user hardware by way of the

included ribbon cables. JTAG (IEEE 1149.1), Xilinx Slave

Serial, and Xilinx SelectMAP protocols are supported in ISP

mode.

Designed for use in a desktop environment, the MultiPRO

Desktop Tool interfaces to a PC using the industry standar d

IEEE 1284 parallel port. An external AC power brick pro-

vides +5V DC to the pod. An integral power switch facili-

tates fail-safe connection to target systems.

A variety of device adapters are available for standalone

programming of Xilinx XC18V00 ISP PROMs and CoolRun-

ner-II CPLDs.

MultiPRO Desktop Tool

DS114 (v1.2) January 24, 2003 00Advance Product Specification

Figure 1: Xilinx MultiPRO Desktop Tool

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MultiPRO Desktop Tool

2www.xilinx.com DS114 (v1.2) January 24, 2003

1-800-255-7778 Advance Product Specification

Device Adapters

A separate device adapter is available for each unique

XC18V00 and XC2C000 package. Adapters attach to the

MultiPRO pod using a 20-pin keyed DIN connector

(Figure 2). Power is automatically applied to the adapter

during programming operations and removed upon comple-

tion. A power status LED is illuminated whenever power is

active. The MultiPRO pod automatically identifies any

adapter that is attached to the DIN connector.

CAUTION:

Devices should never be installed or removed from sockets

while the ACTIVE LED is illuminated.

A polycarbonate label protects the top side of the adapter

printed circuit. Text clearly identifies the device and pack-

age information, the product ordering number, and the

index pin locator needed to orient the device during inser-

tion.

An aluminum plate is attached to the bottom side of the

printed circuit board to protect circuitry. Rubber feet are

mounted on the bottom of the aluminum plate to avoid

scratching the desk top.

Over-Curren t Protection

The MultiPRO Desktop Tool monitors the current load of the

adapter when power is provided. If a fault condition exists

on the adapter (e.g., if a device is improp erly oriented in the

socket or the device is internally shorted), power is auto-

matically shut off. The MultiPRO Desktop Tool will not be

damaged if the power pins on the DIN connector are inad-

vertently shorted to ground.

Status Indicators

The MultiPRO Desktop Tool uses tri-color LEDs to indicate

the active configuration port and the presence of target

power (Table 1). A red LED indicates that the associated

port has not been selected in iM PACT. A yell ow LED indi-

cates that the port is selected but that VREF from the target

hardware is not powered. A green LED indicates that the

port is selected and VREF from the target hardware is pow-

ered.

If both the Serial/JTA G and SelectMAP STATUS LEDs are

red, then the Adapter port is active. Power is automatically

switched to adapters only during programming operations.

The adapter ’s red ACTIVE LED is illuminated w hen power

is ON. The MultiPRO Desk top Tool selects the ISP port by

default when powered up.

If both the Serial/JTAG and SelectMAP LEDs are blinking

red, an over-current condition has been detected on the

adapter port. The adapter should be removed and checked

for incorrect device insertion and/or socket damage.

Figure 2: Common Adapter Features

20-pin Keyed

DIN Connector Power

Status LED

Index Pin Locator

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MultiPRO Desktop Tool

DS114 (v1.2) January 24, 2003 www.xilinx.com 3

Advance Product Specification 1-800-255-7778

Physical Description

Table 1: Status Indicators

Serial/JTAG LED SelectMAP LED Pod Powered Active Port VREF Powered

IEEE 1284

Parallel Port

Connected

Off Off No None N/A Yes

Amber Red Yes SS/JTAG No Yes

Green Red Yes SS/JTAG Yes Yes

Red Amber Yes SelectMAP No Yes

Red Green Yes SelectMAP Yes Yes

Red Red Yes Adapter See ACTIVE LED Yes

Blinking Red Blinking Red Over-Current Adapter N/A Yes

Amber Amber Yes None N/A No

Figure 3: MultiPRO Connector Descriptions

STATUS

Gnd

TDI

TDO

TCK

TMS

Vref

DIN

DONE

CCLK

PROG

Vref

INIT

JTAG

Serial

Vref

Gnd

CS1

CS2

INIT

DONE

CS0

Gnd

GndD5

GndD0 GndCCLK GndRDWR GndBUSY

GndD4

GndPROG

SelectMAP

Made in U.S.A.

1 2 3 4 5

Serial MP -

Model DLC8

MultiPRO

Desktop Tool

Power 5V 0.3A

HW-MP-PQ208

ACTIVE

MultiPRO PQ208 Adapter

for CoolRunner - II

Power Port

IEEE-1284-C

Parallel Port

Adapter Port

Power Port

IEEE-1284-C

Parallel Port

S/JTAG

STATUSSMAP

Quick Connect IEEE 1284

Parallel Port Cable

20-Pin Keyed

DIN Connector

Socket

Adapter's red

"ACTIVE" LED

+5VDC External Power

Supply Cable

Power Switch Serial/JTAG LED

14-pin Serial/JTAG

Ribbon Cable Connector

34-pin SelectMAP

Ribbon Cable Connector

SelectMAP LED

ds114_04_090402

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MultiPRO Desktop Tool

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1-800-255-7778 Advance Product Specification

External Power Supply

The MultiPRO Desktop Tool requires an external +5V DC

power supply. The power supply is a CE approved switching

regulator that operates from an AC outlet and connects to

the MultiPRO tool using a 5.5 mm x 2.1 mm plug (Figure 4).

A power switch on the MultiPRO case is provided as a con-

venience so that all other cables can remain attached.

The standard MultiPRO power supply (CUI Stack Model

DSA-0151D-05) is capable of operating from 100VAC to

240VAC at 47 Hz to 63 Hz. The +5V DC output is rated for

2.4A. This power supply can also be used with the Xilinx

Parallel Cable IV (configuration cable) instead of the sup-

plied Power Splitter Cabl e.

IEEE 1284 Cable Specifications

Level 1 compliant host parallel ports are only designed to

operate over a maximum cable length of 10 feet. Level 2

compliant ports are designed to operate over a maximum

cable length of 33 feet. MultiPRO uses a Level 2 compliant

cable interface buffer. The MultiPRO case has an integrated

mini-centronics connector for attachment to off-the-shelf

IEEE 1284 cables.

Xilinx recommends that the MultiPRO tool be directly con-

nected to the host parallel port without the use of a switch

box. Software license "dongles" should not be at tached to the

parallel port when c ommunicating with the MultiPRO tool.

Automatic Voltage Sensing

The MultiPRO Desktop Tool continuously monitors the VREF

pin on the Serial/JTAG and SelectMAP target interface con-

nectors. The current drain from the target power supply

attached to the VREF pin is less than 10 mA at 3.3V DC. The

target system reference voltage must be regulated and can-

not have a current limiting resistor in series with the VREF

pin on the interface.

No damage will occur to the MultiPRO Desktop Tool if the

target system is powered when the MultiPRO tool is not

powered. However , when powering up a system, it is prefer-

able to apply power to the MultiPRO tool first, followed by

power to the target system. The sequence should be

reversed when powering down.

The MultiPRO Desktop Tool always puts interface signals

on inactive ports in a 3-state condition.

The MultiPRO output drive voltage levels do not linearly

track voltage changes on the VREF pin. An appropriate out-

put signal level is established for a range of VREF voltages.

For example, if VREF is any voltage from +3.0V DC to

+5.0V DC, the MultiPRO tool sets the output signals for the

respective port to +3.3V DC.

Refer to Table 2 for the relationship between VREF voltage

and MultiPRO output signal levels.

Connecting to Host Comp uter

The MultiPRO tool connects to any PC using Win98,

Win2000, or WinNT (4.0 or higher) through the standard

IEEE 1284 DB25 parallel (printer) port connector. To fully

utilize the higher speeds of this cable, the host PC must

have a parallel port that is enabled to support extended

capability port (ECP) mode. If ECP mode is not enabled, the

MultiPRO tool will default to compatibility mode and will not

run at the optimum speeds listed.

Notes:

1. Refer to host PC BIOS to see if ECP mode is enabled.

High Performance Ribbon Cable

Two insulation displacement (IDC) ribbon cables are sup-

plied and recommended for connection to target systems.

See Figure 5 and Figure 6. These cables incorporate multi-

ple signal-ground pairs and facilitate error-free connection.

A very small footprint, keyed mating connector is all that is

required on the target system. Refer to Figure 7 and

Figure 8 for the appropr iate connector pin assignments and

sample vendor part numbers. The 14 conductor ribbon

cable can also be used with Parallel Cable IV.

Figure 4: Standard External +5V DC Power Brick

Table 2: Output Signal Levels as a Function of VREF

VREF Voltage on Target

System (V DC) MultiPRO Output

Signal Levels (V DC)

0.80 to 1.65 1.5

1.65 to 2.00 1.8

2.00 to 3.00 2.5

3.00 to 5.00 3.3

Figure 5: High Performance Ribbon Cables

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Advance Product Specification 1-800-255-7778

Figure 6: Ribbon Cable Diagrams

ds097_03_100901

Notes:

1. Ribbon Cable - 14 conductor 1.0mm centers Round Conductor Flat Cable; 28 AWG (7x36) stranded copper conductors;

gray PVC with pin 1 edge marked

2. 2mm Ribbon Female Polarized Connectors - IDC connection to ribbon; contacts are beryllium copper plated; 30 micro inches

gold plating over 50 micro inches nickel; connectors mate to 0.5mm square posts on 2mm centers.

pin#1 indicator stripe

234 56 78 910 11

12 1314

Polarizing Key Polarizing Key

Notes:

1. Ribbon Cable - 34 conductor, 1.0mm centers Round Conductor Flat Cable, 28AWG (7x36) stranded copper conductors,

gray PVC with pin #1 edge marked.

2. 2mm Ribbon, Female Polarized Connectors - IDC connection to ribbon, contacts are beryllium copper plated with

30 micro inches Gold plating over 50 micro inches Nickel, connectors mate to 0.5mm square posts on 2mm centers.

16 1718 1920 2122 2324 25

26 2728 29

30 3132 3334

234 56 78 910 11

12 1314 15

16 1718 1920 2122 2324 25

26 2728 29

30 3132 3334

ds114_09_112602

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1-800-255-7778 Advance Product Specification

Figure 7: Target Interface 34-Pin Connector Signal Assignments

2x17 (34 position) 2mm CONNECTOR,

Shroulded, keyed, through-hole mount.

Comm Conn Part No. 2422-34G2

OUPIIN Part No. 3112-34GSB

Also available in surface mount or

without keyed shrould.

13 Gnd

11 Gnd

9 Gnd

7 Gnd

5 Gnd

3 Gnd

1 Gnd

D2 12

D3 10

D4 8

D5 6

D6 4

D7 2

D1 14

27 Gnd

25 Gnd

23 Gnd

21 Gnd

19 Gnd

17 Gnd

15 Gnd

INIT 26

DONE 24

BUSY 22

RDWR 20

CCLK 18

D0 16

PROG 28

33 Vref

31 NC

29 Gnd

CS1 32

CS2 30

CS0 34

0.020" sq. (0.5mm)

0.158"

SelectMAP

signals

0.220"

0.100"

1.618"

0.0787" (2mm)

0.215"

0.0787" (2mm)

0.175"

1.578"

ds114_08_112602

Figure 8: Target Interface 14-Pin Connector Signal Assignments

2x7 (14 position) 2mm CONNECTOR,

Shroulded, keyed, through-hole mount.

Comm Conn Part No. 2422-14G2

OUPIIN Part No. 3112-14GSB

Also available in surface mount or

without keyed shrould.

13 Gnd

11 Gnd

9 Gnd

7 Gnd

5 Gnd

3 Gnd

1 Gnd

NC NC 12

DIN TDI 10

DONE TDO 8

CCLK TCK 6

PROG TMS 4

Vref Vref 2

INIT NC 14

0.020" sq. (0.5mm)

0.158"

JTAG

signals

0.220"

0.100"

0.831"

0.0787" (2mm)

0.215"

0.0787" (2mm)

0.175"

0.791"

Slave

Serial

signals

ds114_10_120302

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Advance Product Specification 1-800-255-7778

Table 3 provides some third-party sources for mating connectors for 2mm pitch, 14 conductor ribbon cable..

Table 4 provides third-party sources for mating connectors for 2mm pitch, 34 conductor ribbon cable..

Interface Pin Descriptions

The interface pins for the Serial/JT AG, SelectMAP, and adapter ports are described in Table 5, Table 6, and Table 7, respec-

tively.

Table 3: Mating Connectors for 2mm pitch, 14 Conductor R ibbon Cable

Manufacturer Part Number

Comm Con 2422-14G2

OUPIIN 3112-14GSB

Notes:

1. Also available in surface mount or without keyed shroud.

Table 4: Mating Connectors for 2mm pitch, 34 Conductor R ibbon Cable

Manufacturer Part Number

Comm Con 2422-34G2

OUPIIN 3112-34GSB

Notes:

1. Also available in surface mount or without keyed shroud.

Table 5: S erial /JTAG Port: 14-Pin Ribbon Cable Connector Interface Pin Descriptions

Ribbon

Cable Pin

Number

Slave-Serial

Configuration

Mode

JTAG

Configuration

Mode Type Description

REF VREF IN Target Reference Voltage. This pin should be connected

to a voltage bus on the target system that serves the JTAG

or slave serial interface. For example, when programming a

CoolrunnerII device using the JTAG port, VREF should be

connected to the target VAUX bus.

Note: The target reference voltage must be regulated and

must not have a current limiting resistor in series with the

VREF pin.

4 PROG -- OUT Configuration Reset. This pin is used to force a

reconfiguration of the target FPGA(s). It should be

connected to the PROG_B pin of the target FPGA for a

single device system or to the PROG_B pin of all FPGAs in

parallel in a daisy-chain configuration.

6CCLK --OUTConfiguration Clock. FPGAs load one configuration bit per

CCLK cycle in slave-serial mode. CCLK should be

connected to the CCLK pin on the target FPGA for a single

device configuration or to the CCLK pin of all FPGAs in

parallel for a daisy-chain configuration.

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8DONE -- INConfiguration Done. This pin indicates to MultiPRO tool

that the target FPGA(s) have received the entire

configuration bit stream. It should be connected to the DONE

pin on all FPGAs in parallel for daisy-chained configurations.

Additional CCLK cycles are issued following the positive

transition of DONE to insure that the configuration process

is complete.

10 DIN -- OUT Configuration Data Input. This is the serial input data

stream for target F PGAs. It should be connected to the DIN

pin of the target FPGA in a single device system or to the

DIN pin of the first FPGA in a daisy-chain configuration.

12 NC NC OUT Test Driver. This pin is reserved for Xilinx diagnostics and

should not be connected to any target circuitry.

14 INIT NC BIDIR Configuration Initialize. This pin indicates that

configuration memory is being cleared. It should be

connected to the INIT_B pin of the target FPGA for a single

device system or to the INIT_B pin on all FPGAs in parallel

in a daisy-chain configuration.

4-- TMSOUTTest Mode Select. This is the JTAG mode signal that

establishes appropriate TAP state transitions for target ISP

devices. It should be connected to the TMS pin on all target

ISP devices that share the same data stream.

6-- TCKOUTTest Clock. This is the clock signal for JT AG operations and

should be connected to the TCK pin on all target ISP devices

that share the same data stream.

8-- TDOOUTTest Data Out. This is the serial output data stream for

JTAG operations and should be connected to the TDO pin

on the last ISP device in the target JTAG chain.

10 -- TDI IN Test Data In. This is the serial input data stream for JTAG

operations and should be connected to the TDI pin on the

first ISP device in the target JTAG chain.

1, 3, 5, 7,

9, 11, 13 Gnd Gnd -- Digital Ground

Table 5: S erial /JTAG Port: 14-Pin Ribbon Cable Connector Interface Pin Descriptions (Continued)

Ribbon

Cable Pin

Number

Slave-Serial

Configuration

Mode

JTAG

Configuration

Mode Type Description

Table 6: SelectMAP Port: 34-Pin Ribbon Cable Connector Interface Pin Descriptions

Ribbon Cable

Pin Number SelectMAP

Configuration Mode Type Description

16 D0 BIDIR Byte-Wide Data Bus, Bit 0

14 D1 BIDIR Byte-Wide Data Bus, Bit 1

12 D2 BIDIR Byte-Wide Data Bus, Bit 2

10 D3 BIDIR Byte-Wide Data Bus, Bit 3

8 D4 BIDIR Byte-Wide Data Bus, Bit 4

6 D5 BIDIR Byte-Wide Data Bus, Bit 5

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4 D6 BIDIR Byte-Wide Data Bus, Bit 6

2 D7 BIDIR Byte-Wide Data Bus, Bit 7

18 CCLK OUT Configuration Clock

20 RDWR OUT Configuration Read / Write Control

22 BUSY IN Configuration Flow Control

24 DONE IN Configuration Done

26 INIT BIDIR Configuration Initialize

28 PROG OUT Configuration Reset

30 CS2 OUT Chip S elect 2

32 CS1 OUT Chip S elect 1

34 CS0 OUT Chip S elect 0

33 VREF IN Target reference voltage

31 NC -- No Connection

1, 3, 5, 7, 9, 11,

13, 15, 17, 19, 21,

23, 25, 27, 29

Gnd -- Digital Ground

Table 6: SelectMAP Port: 34-Pin Ribbon Cable Connector Interface Pin Descriptions (Continued)

Ribbon Cable

Pin Number SelectMAP

Configuration Mode Type Description

Table 7: Adapter Port: 20-Pin DIN Connector Interface Pin Descriptions

DIN

Pin Number JTAG

Configuration Mode Type Description

A8 TCK OUT Tes t Clock. This is the clock signal for JTAG operations. It

is connected to the ‘TCK’ pin on the adapter socket.

A2 TMS OUT Test Mode Select. This is the JTAG mode signal that

establishes appropriate TAP state transitions for the target

device. It is connected to the ‘TMS’ pin on the adapter

socket.

A4 TDI OUT Test Data In. This is the serial input data stream for JTAG

operations and is connected to the ‘TDI’ pin on the adapter

socket.

A6 TDO IN Test Data Out. This is the serial output data stream for

JTA G operations and is connected to the ‘TDO’ pin on the

adapter socket.

A1 PEN OUT Port Enable. Reserved for future applications.

B4 ID1 IN Adapter ID1. This is the high order bit for the automatic

adapter identification circuit.

A3 ID0 IN Adapter ID0. This is the low order bit for the automatic

adapter identification circuit.

B1 VREF IN Adapter Reference V oltage. This voltage is established by

a local linear regulator on each device adapter according to

the specifications of the device family.

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10 www.xilinx.com DS114 (v1.2) January 24, 2003

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B7, B8, B9, A10,

B10 +5V DC OUT Switched Supply Voltage

A9 EGND Safety Ground

A5, B5, B6, A7 GND -- Digital Ground

Table 7: Adapter Port: 20-Pin DIN Connector Interface Pin Descriptions (Continued)

DIN

Pin Number JTAG

Configuration Mode Type Description

Figure 9: MultiPRO Pod Dimensions (inches)

STATUS

Gnd

TDI

TDO

TCK

TMS

Vref

DIN

DONE

CCLK

PROG

Vref

INIT

JTAG

Serial

Vref

Gnd

CS1

CS2

INIT

DONE

CS0

Gnd

GndD5

GndD0 GndCCLK GndRDWR GndBUSY

GndD4

GndPROG

SelectMAP

Made in U.S.A.

1 2 3 4 5

Serial MP -

Model DLC8

MultiPRO

Desktop Tool

Power 5V 0.3A

Power Port

IEEE-1284-C

Parallel Port

Adapter Port

Power Port

IEEE-1284-C

Parallel Port

S/JTAG

STATUSSMAP

5.05

5.19

3.34

1.13 0.99

3.49

MultiPRO POD

Dimensions

ds114_06_090402

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Advance Product Specification 1-800-255-7778

Operating Characteristics

Absolute Maximum Ratings

Recommended Operating Conditions

Figure 10: Typical MultiPRO Adapter Dimensions (inches)

HW-MP-PQ208

ACTIVE

MultiPRO PQ208 Adapter

for CoolRunner - II

4.10 SQ.

4.30

1.22 MAX.

ds114_07_090402

Symbol Description Value Units

VCC Supply Voltage +6.0 V DC

TAOperating Temperature Range 0° to 70° ° C

TSTG Storage Temperature Range –40° to +85° ° C

PDPower Dissipation 1.5 W

IOUT DC Output Current (Any Output) ±16 mA

Symbol Parameter Conditions Min Max Units

VCC DC Supply Voltage External Power Supply 4.75 5.25 V DC

VREF Target Reference V oltage 1.5 5.5 V DC

ICC Operating Current 130 200 mA

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12 www.xilinx.com DS114 (v1.2) January 24, 2003
1-800-255-7778 Advance Product Specification
R
Ordering Information
Revision History
The following table shows the revision history for this document.  
Part Number Description
HW-MULTIPRO MultiPRO Desktop Tool
HW-MULTIPRO-EC MultiPRO Desktop Tool with European plug
HW-MULTIPRO-UK MultiPRO Desktop Tool with UK plug
HW-MP-PC44-1 44-pin PLCC Adapter for ISP PROMs
HW-MP-VQ44-1 44-pin VQFP Adapter for ISP PROMs
HW-MP-VQ44-2 44-pin VQFP Adapter for CoolRunner-II CPLDs
HW-MP-CP56  56-ball Chip Scale Adapter for CoolRunner-II CPLDs
HW-MP-VQ100  100-pin VQFP Adapter for CoolRunner-II CPLDs
HW-MP-CP132  132-ball Chip Scale Adapter for CoolRunner-II CPLDs
HW-MP-SO20  20-pin SOIC Adapter for ISP PROMs
HW-MP-PC20  20-pin PLCC Adapter for ISP PROMs
HW-MP-PC44-2 44-pin PLCC Adapter for CoolRunner-II CPLDs
HW-MP-TQ144  144-pin TQFP Adapter for CoolRunner-II CPLDs
HW-MP-FT256  256-ball Fine Pitch Thin BGA Adapter for CoolRunner-II CPLDs
HW-MP-FG324  324-ball Fine Pitch BGA Adapter for CoolRunner-II CPLDs
HW-MP-PQ208  208-pin PQFP Adapter for CoolRunner-II CPLDs
Date Version Revision
12/10/02 1.0 Initial Xilinx release.
12/24/02 1.1 Updated Features, Status Indicators, and Adapter Port: 20-Pin DIN Connector 
Interface Pin Descriptions.
01/24/03 1.2 Updated Features, Device Adapters, Table 1, Automatic Voltage Sensing, Table 7, and 
Ordering Information. 
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