0.2 GHz to 8 GHz, GaAs, HBT MMIC, Divide by 8 Prescaler HMC434-EP Enhanced Product FUNCTIONAL BLOCK DIAGRAM Ultralow SSB phase noise: -150 dBc/Hz typical Single-ended input/outputs RF output power: -2 dBm typical Single-supply operation: 3 V Ultrasmall, surface-mount, 2.90 mm x 2.80 mm, 6-lead SOT-23 package VCC HMC434-EP IN /8 OUT ENHANCED PRODUCT FEATURES Supports defense and aerospace applications (AQEC standard) Extended industrial temperature range: -55C to +105C Controlled manufacturing baseline 1 assembly/test site 1 fabrication site Product change notification Qualification data available upon request GND 15647-001 FEATURES Figure 1. APPLICATIONS DC to C band PLL prescalers Very small aperture terminal (VSAT) radios Unlicensed national information infrastructure (UNII) and point to point radios IEEE 802.11a and high performance radio local area network (HiperLAN) WLAN Fiber optics Cellular/3G infrastructure GENERAL DESCRIPTION The HMC434-EP is a low noise, static, divide by 8 prescaler monolithic microwave integrated circuit (MMIC) utilizing indium gallium phosphide/gallium arsenide (InGaP/GaAs) heterojunction bipolar transistor (HBT) technology in an ultrasmall surface-mount 6-lead SOT-23 package. The HMC434-EP operates from near dc (square wave) or 0.2 GHz (sine wave) to 8 GHz input frequency with a single 3 V dc supply. Rev. B The HMC434-EP features single-ended inputs and outputs for reduced component count and cost. The low additive single sideband (SSB) phase noise of -150 dBc/Hz at 100 kHz offset helps the user maintain optimal system noise performance. Additional application and technical information can be found in the HMC434 data sheet. Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 (c)2017-2019 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com HMC434-EP Enhanced Product TABLE OF CONTENTS Features .............................................................................................. 1 Thermal Resistance .......................................................................4 Enhanced Product Features ............................................................ 1 ESD Caution...................................................................................4 Applications ....................................................................................... 1 Pin Configuration and Function Descriptions..............................5 Functional Block Diagram .............................................................. 1 Interface Schematics .....................................................................5 General Description ......................................................................... 1 Typical Performance Characteristics ..............................................6 Revision History ........................................................................... 2 Outline Dimensions ..........................................................................7 Specifications..................................................................................... 3 Ordering Guide .............................................................................7 Absolute Maximum Ratings ............................................................ 4 REVISION HISTORY 3/2019--Rev. A to Rev. B Changes to Figure 11 ........................................................................ 6 8/2017--Rev. 0 to Rev. A Changes to Features Section and General Description Section...... 1 Added Endnote 2 to Table 1 ............................................................ 3 3/2017--Revision 0: Initial Version Rev. B | Page 2 of 7 Enhanced Product HMC434-EP SPECIFICATIONS VCC = 3 V, TA = 25C, 50 system, unless otherwise noted. PIN is input power. Table 1. Parameter RADIO FREQUENCY (RF) INPUT Frequency 1, 2 Power RF OUTPUT SSB Phase Noise Power REVERSE LEAKAGE SUPPLY Voltage (VCC) Current (ICC) 1 2 Min Typ Max Unit Test Conditions / Comments 0.2 -10 0 0 0 8 +10 10 GHz dBm dBm Sine wave input fIN = 1.0 GHz to 3.0 GHz fIN = 3.0 GHz to 8.0 GHz dBc/Hz dBm dBm 100 kHz offset, PIN = 0 dBm, fIN = 4.0 GHz fIN = 1.0 GHz to 8.0 GHz PIN = 0 dBm, fIN = 4.0 GHz , output terminated -5 2.85 -150 -2 -25 3 62 3.15 83 V mA Below 200 MHz, a square wave input is required. For stable operation without an input signal, refer to the AN-1463 Application Note, Frequency Divider Operation and Compensation with No Input Signal. Rev. B | Page 3 of 7 HMC434-EP Enhanced Product ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 2. Parameter Supply Voltage (VCC) RF Input Power (VCC = 3 V) Temperature Operating Storage Junction, TJ Nominal (TA = 105C) Reflow ESD Sensitivity Human Body Model (HBM) Thermal performance is directly linked to printed circuit board (PCB) design and operating environment. Careful attention to PCB thermal design is required. Rating -0.3 V to +3.5 V 13 dBm JA is the natural convection junction to ambient thermal resistance measured in a one cubic foot sealed enclosure. JC is the junction to case thermal resistance. -55C to +105C -65C to +125C 135C 119C 260C Table 3. Thermal Resistance Package Type RJ-6 Class 0 1 Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. 2 JA1 359 Simulated values per JEDEC JESD51-12 standards. Junction to GND package pin. ESD CAUTION Rev. B | Page 4 of 7 JC2 70 Unit C/W Enhanced Product HMC434-EP PIN CONFIGURATION AND FUNCTION DESCRIPTIONS NIC 1 6 OUT 5 VCC 4 NIC GND 2 IN 3 TOP VIEW (Not to Scale) NOTES 1. NOT INTERNALLY CONNECTED. THESE PINS CAN BE CONNECTED TO RF AND DC GROUND WITHOUT AFFECTING PERFORMANCE. THE NIC PINS ARE TYPICALLY TIED TO GND FOR ENHANCED THERMAL PERFORMANCE (BUT NOT REQUIRED). 15647-002 HMC434-EP Figure 2. Pin Configuration Table 4. Pin Function Descriptions Pin No. 1, 4 Mnemonic NIC 2 3 5 6 GND IN VCC OUT Description Not Internally Connected. These pins can be connected to RF and dc ground without affecting performance. The NIC pins are typically tied to GND for enhanced thermal performance (but not required). Ground. This pin must be connected to both RF and dc ground. RF Input. This pin must be dc blocked. Supply Voltage (3 V). RF Output. This pin must be dc blocked. INTERFACE SCHEMATICS GND 15647-003 VCC 50 15647-005 OUT Figure 3. GND Interface Schematic Figure 5. OUT Interface Schematic 50 8pF 15647-004 IN 15647-006 VCC VCC Figure 6. VCC Interface Schematic Figure 4. IN Interface Schematic Rev. B | Page 5 of 7 HMC434-EP Enhanced Product TYPICAL PERFORMANCE CHARACTERISTICS 20 20 15 15 10 10 5 INPUT POWER (dBm) RECOMMENDED OPERATING WINDOW 0 -5 0 -5 -10 -10 MAX PIN MIN PIN 1 2 3 4 5 6 7 8 9 10 INPUT FREQUENCY (GHz) -20 0 SSB PHASE NOISE (dBc/Hz) -1 -2 TA = +105C TA = +85C TA = +25C TA = 0C TA = -40C TA = -55C -4 -5 3 4 5 6 7 8 9 INPUT FREQUENCY (GHz) 15647-008 -3 2 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 100 1k 4 5 6 7 8 9 10k 100k 1M 10M OFFSET FREQUENCY (Hz) Figure 8. Output Power vs. Frequency at Various Temperatures Figure 11. SSB Phase Noise (PIN = 0 dBm) 0 0 -5 -5 -10 -10 POWER LEVEL (dBm) -15 -20 -25 -30 -35 -40 -15 -20 -25 -30 -35 -45 -30 -50 PFEEDTHROUGH SECOND HARMONIC THIRD HARMONIC -55 -60 0 1 2 3 4 5 6 7 8 9 INPUT FREQUENCY (GHz) 10 -45 -50 15647-009 OUTPUT POWER (dBc) 3 Figure 10. Input Sensitivity Window at Various Temperatures 0 1 2 INPUT FREQUENCY (GHz) Figure 7. Input Sensitivity Window 0 1 15647-011 0 15647-007 -20 15647-010 -15 -15 OUTPUT POWER (dBm) MAX PIN, TA = +105C MAX PIN, TA = +85C MAX PIN, TA = +25C MAX PIN, TA = 0C MAX PIN, TA = -40C MAX PIN, TA = -55C MIN PIN, TA = +105C MIN PIN, TA = +85C MIN PIN, TA = +25C MIN PIN, TA = 0C MIN PIN, TA = -40C MIN PIN, TA = -55C 5 0 1 2 3 4 5 6 7 8 INPUT FREQUENCY (GHz) Figure 9. Output Harmonic Content (PIN = 0 dBm) Figure 12. Reverse Leakage (PIN = 0 dBm) Rev. B | Page 6 of 7 9 10 15647-012 INPUT POWER (dBm) In Figure 9, PFEEDTHROUGH is the power of the output spectrum at the input frequency. Enhanced Product HMC434-EP OUTLINE DIMENSIONS 3.00 2.90 2.80 1.70 1.60 1.50 6 5 4 1 2 3 3.00 2.80 2.60 PIN 1 INDICATOR 0.95 BSC 1.90 BSC 1.45 MAX 0.95 MIN 0.15 MAX 0.05 MIN 0.50 MAX 0.30 MIN 0.20 MAX 0.08 MIN SEATING PLANE 10 4 0 0.60 BSC COMPLIANT TO JEDEC STANDARDS MO-178-AB 0.55 0.45 0.35 12-16-2008-A 1.30 1.15 0.90 Figure 13. 6-Lead Small Outline Transistor Package [SOT-23] (RJ-6) Dimensions shown in millimeters ORDERING GUIDE Model 1 HMC434SRJZ-EP-PT HMC434SRJZ-EP-R7 1 Temperature Range -55C to +105C -55C to +105C Package Description 6-Lead Small Outline Transistor Package [SOT-23] 6-Lead Small Outline Transistor Package [SOT-23] Z = RoHs Compliant Part. (c)2017-2019 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D15647-0-3/19(B) Rev. B | Page 7 of 7 Package Option RJ-6 RJ-6 Marking Code 34P 34P