0.2 GHz to 8 GHz, GaAs, HBT MMIC,
Divide by 8 Prescaler
Enhanced Product
HMC434-EP
Rev. B Document Feedback
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FEATURES
Ultralow SSB phase noise: −150 dBc/Hz typical
Single-ended input/outputs
RF output power: −2 dBm typical
Single-supply operation: 3 V
Ultrasmall, surface-mount, 2.90 mm × 2.80 mm, 6-lead SOT-23
package
ENHANCED PRODUCT FEATURES
Supports defense and aerospace applications (AQEC standard)
Extended industrial temperature range: −55°C to +105°C
Controlled manufacturing baseline
1 assembly/test site
1 fabrication site
Product change notification
Qualification data available upon request
APPLICATIONS
DC to C band PLL prescalers
Very small aperture terminal (VSAT) radios
Unlicensed national information infrastructure (UNII) and
point to point radios
IEEE 802.11a and high performance radio local area network
(HiperLAN) WLAN
Fiber optics
Cellular/3G infrastructure
FUNCTIONAL BLOCK DIAGRAM
Figure 1.
GENERAL DESCRIPTION
The HMC434-EP is a low noise, static, divide by 8 prescaler
monolithic microwave integrated circuit (MMIC) utilizing
indium gallium phosphide/gallium arsenide (InGaP/GaAs)
heterojunction bipolar transistor (HBT) technology in an
ultrasmall surface-mount 6-lead SOT-23 package.
The HMC434-EP operates from near dc (square wave) or
0.2 GHz (sine wave) to 8 GHz input frequency with a single 3 V dc
supply.
The HMC434-EP features single-ended inputs and outputs for
reduced component count and cost. The low additive single
sideband (SSB) phase noise of −150 dBc/Hz at 100 kHz offset
helps the user maintain optimal system noise performance.
Additional application and technical information can be found
in the HMC434 data sheet.
OUTIN ÷8
VCC
GND
HMC434-EP
15647-001
HMC434-EP Enhanced Product
Rev. B | Page 2 of 7
TABLE OF CONTENTS
Features .............................................................................................. 1
Enhanced Product Features ............................................................ 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ........................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 4
Thermal Resistance .......................................................................4
ESD Caution...................................................................................4
Pin Configuration and Function Descriptions ..............................5
Interface Schematics .....................................................................5
Typical Performance Characteristics ..............................................6
Outline Dimensions ..........................................................................7
Ordering Guide .............................................................................7
REVISION HISTORY
3/2019—Rev. A to Rev. B
Changes to Figure 11 ........................................................................ 6
8/2017—Rev. 0 to Rev. A
Changes to Features Section and General Description Section...... 1
Added Endnote 2 to Table 1 ............................................................ 3
3/2017—Revision 0: Initial Version
Enhanced Product HMC434-EP
Rev. B | Page 3 of 7
SPECIFICATIONS
VCC = 3 V, TA = 25°C, 50 Ω system, unless otherwise noted. PIN is input power.
Table 1.
Parameter Min Typ Max Unit Test Conditions / Comments
RADIO FREQUENCY (RF) INPUT
Frequency1, 2 0.2 8 GHz Sine wave input
Power –10 0 +10 dBm fIN = 1.0 GHz to 3.0 GHz
0 0 10 dBm fIN = 3.0 GHz to 8.0 GHz
RF OUTPUT
SSB Phase Noise −150 dBc/Hz 100 kHz offset, PIN = 0 dBm, fIN = 4.0 GHz
Power –5 –2 dBm fIN = 1.0 GHz to 8.0 GHz
REVERSE LEAKAGE −25 dBm PIN = 0 dBm, fIN = 4.0 GHz , output terminated
SUPPLY
Voltage (VCC) 2.85 3 3.15 V
Current (ICC) 62 83 mA
1 Below 200 MHz, a square wave input is required.
2 For stable operation without an input signal, refer to the AN-1463 Application Note, Frequency Divider Operation and Compensation with No Input Signal.
HMC434-EP Enhanced Product
Rev. B | Page 4 of 7
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
Supply Voltage (VCC) −0.3 V to +3.5 V
RF Input Power (V
CC
= 3 V)
13 dBm
Temperature
Operating −55°C to +105°C
Storage −65°C to +125°C
Junction, TJ 135°C
Nominal (TA = 105°C) 119°C
Reflow 260°C
ESD Sensitivity
Human Body Model (HBM) Class 0
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
THERMAL RESISTANCE
Thermal performance is directly linked to printed circuit board
(PCB) design and operating environment. Careful attention to
PCB thermal design is required.
θJA is the natural convection junction to ambient thermal
resistance measured in a one cubic foot sealed enclosure. θJC is
the junction to case thermal resistance.
Table 3. Thermal Resistance
Package Type θJA1 θJC2 Unit
RJ-6 359 70 °C/W
1 Simulated values per JEDEC JESD51-12 standards.
2 Junction to GND package pin.
ESD CAUTION
Enhanced Product HMC434-EP
Rev. B | Page 5 of 7
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1, 4 NIC Not Internally Connected. These pins can be connected to RF and dc ground without affecting performance.
The NIC pins are typically tied to GND for enhanced thermal performance (but not required).
2 GND Ground. This pin must be connected to both RF and dc ground.
3 IN RF Input. This pin must be dc blocked.
5
Supply Voltage (3 V).
6
RF Output. This pin must be dc blocked.
INTERFACE SCHEMATICS
Figure 3. GND Interface Schematic
Figure 4. IN Interface Schematic
Figure 5. OUT Interface Schematic
Figure 6. VCC Interface Schematic
NIC 1
GND 2
IN 3
OUT
6
VCC
5
NIC
4
HMC434-EP
TOP VIEW
(No t t o Scal e)
NOTES
1. NO T I NTERNALLY CONNECTED. THES E P INS CAN
BE CONNE CTED TO RF AND DC GROUND W ITHOUT
AFFECT ING P E RFORM ANCE . T HE NIC PI NS ARE
TY PICAL LY TIE D TO GND FOR ENHANCE D
THE RM AL PERFO RM ANCE ( BUT NOT REQUIRE D) .
15647-002
GND
15647-003
50Ω
VCC
IN
15647-004
50Ω
OUT
VCC
15647-005
8pF
VCC
15647-006
HMC434-EP Enhanced Product
Rev. B | Page 6 of 7
TYPICAL PERFORMANCE CHARACTERISTICS
In Figure 9, PFEEDTHROUGH is the power of the output spectrum at the input frequency.
Figure 7. Input Sensitivity Window
Figure 8. Output Power vs. Frequency at Various Temperatures
Figure 9. Output Harmonic Content (PIN = 0 dBm)
Figure 10. Input Sensitivity Window at Various Temperatures
Figure 11. SSB Phase Noise (PIN = 0 dBm)
Figure 12. Reverse Leakage (PIN = 0 dBm)
20
–20
–15
–10
–5
0
5
10
15
012345678910
INPUT POW E R ( dBm)
INPUT F RE QUENCY ( GHz)
MI N PIN
MAX PIN
RECOMMENDED
OPERATING WINDOW
15647-007
0
–5
–4
–3
–2
–1
0 1 2 3 4 5 6 7 8 9
OUTPUT P OW E R ( dBm)
INPUT F RE QUENCY ( GHz)
T
A
= –40° C
T
A
= –55° C
T
A
= 0° C
T
A
= +25°C
T
A
= +85°C
T
A
= +105°C
15647-008
0
–60
–55
–50
–45
–40
–35
–30
–25
–20
–15
–10
–5
012345678910
OUTPUT P OW E R ( dBc)
INPUT F RE QUENCY ( GHz)
THIRD HARMO NIC
SECO ND HARM ONI C
PFEEDTHROUGH
15647-009
20
–20
–15
–10
–5
0
5
10
15
0 1 2 3 4 5 6 7 8 9
INPUT POW E R ( dBm)
INPUT F RE QUENCY ( GHz)
15647-010
MAX P
IN
, T
A
= –40° C
MAX P
IN
, T
A
= –55° C
MAX P
IN
, T
A
= 0° C
MAX P
IN
, T
A
= +25°C
MAX P
IN
, T
A
= +85°C
MAX P
IN
, T
A
= +105°C
MI N P
IN
, T
A
= –40° C
MI N P
IN
, T
A
= –55° C
MI N P
IN
, T
A
= 0° C
MI N P
IN
, T
A
= +25°C
MI N P
IN
, T
A
= +85°C
MI N P
IN
, T
A
= +105°C
0
–170
–160
–150
–140
–130
–120
–110
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
100 1k 10k 100k 1M 10M
SSB PHASE NOISE (d Bc/Hz)
OFF SET F REQUENCY (Hz)
15647-011
0
–50
–45
–30
–35
–30
–25
–20
–15
–10
–5
012345678910
POWER LEVEL (d Bm)
INPUT F RE QUENCY ( GHz)
15647-012
Enhanced Product HMC434-EP
Rev. B | Page 7 of 7
OUTLINE DIMENSIONS
Figure 13. 6-Lead Small Outline Transistor Package [SOT-23]
(RJ-6)
Dimensions shown in millimeters
ORDERING GUIDE
Model1 Temperature Range Package Description Package Option Marking Code
HMC434SRJZ-EP-PT –55°C to +105°C 6-Lead Small Outline Transistor Package [SOT-23] RJ-6 34P
HMC434SRJZ-EP-R7 –55°C to +105°C 6-Lead Small Outline Transistor Package [SOT-23] RJ-6 34P
1 Z = RoHs Compliant Part.
COMPLIANT TO JEDEC STANDARDS MO-178-AB
10°
4°
0°
SEATING
PLANE
1.90
BSC
0.95 BSC
0.60
BSC
6 5
1 2 3
4
3.00
2.90
2.80
3.00
2.80
2.60
1.70
1.60
1.50
1.30
1.15
0.90
0.15 MAX
0.05 MIN
1.45 MAX
0.95 MIN
0.20 MAX
0.08 MIN
0.50 MAX
0.30 MIN
0.55
0.45
0.35
PIN 1
INDICATOR
12-16-2008-A
©2017–2019 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D15647-0-3/19(B)